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37 // A compiler barrier, forcing the C++ compiler to invalidate all memory assumptions |
37 // A compiler barrier, forcing the C++ compiler to invalidate all memory assumptions |
38 inline void compiler_barrier() { |
38 inline void compiler_barrier() { |
39 _ReadWriteBarrier(); |
39 _ReadWriteBarrier(); |
40 } |
40 } |
41 |
41 |
42 // Note that in MSVC, volatile memory accesses are explicitly |
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43 // guaranteed to have acquire release semantics (w.r.t. compiler |
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44 // reordering) and therefore does not even need a compiler barrier |
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45 // for normal acquire release accesses. And all generalized |
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46 // bound calls like release_store go through OrderAccess::load |
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47 // and OrderAccess::store which do volatile memory accesses. |
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48 template<> inline void ScopedFence<X_ACQUIRE>::postfix() { } |
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49 template<> inline void ScopedFence<RELEASE_X>::prefix() { } |
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50 template<> inline void ScopedFence<RELEASE_X_FENCE>::prefix() { } |
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51 template<> inline void ScopedFence<RELEASE_X_FENCE>::postfix() { OrderAccess::fence(); } |
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52 |
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53 inline void OrderAccess::loadload() { compiler_barrier(); } |
42 inline void OrderAccess::loadload() { compiler_barrier(); } |
54 inline void OrderAccess::storestore() { compiler_barrier(); } |
43 inline void OrderAccess::storestore() { compiler_barrier(); } |
55 inline void OrderAccess::loadstore() { compiler_barrier(); } |
44 inline void OrderAccess::loadstore() { compiler_barrier(); } |
56 inline void OrderAccess::storeload() { fence(); } |
45 inline void OrderAccess::storeload() { fence(); } |
57 |
46 |
72 inline void OrderAccess::cross_modify_fence() { |
61 inline void OrderAccess::cross_modify_fence() { |
73 int regs[4]; |
62 int regs[4]; |
74 __cpuid(regs, 0); |
63 __cpuid(regs, 0); |
75 } |
64 } |
76 |
65 |
77 #ifndef AMD64 |
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78 template<> |
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79 struct OrderAccess::PlatformOrderedStore<1, RELEASE_X_FENCE> |
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80 { |
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81 template <typename T> |
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82 void operator()(T v, volatile T* p) const { |
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83 __asm { |
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84 mov edx, p; |
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85 mov al, v; |
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86 xchg al, byte ptr [edx]; |
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87 } |
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88 } |
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89 }; |
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90 |
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91 template<> |
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92 struct OrderAccess::PlatformOrderedStore<2, RELEASE_X_FENCE> |
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93 { |
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94 template <typename T> |
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95 void operator()(T v, volatile T* p) const { |
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96 __asm { |
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97 mov edx, p; |
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98 mov ax, v; |
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99 xchg ax, word ptr [edx]; |
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100 } |
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101 } |
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102 }; |
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103 |
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104 template<> |
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105 struct OrderAccess::PlatformOrderedStore<4, RELEASE_X_FENCE> |
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106 { |
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107 template <typename T> |
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108 void operator()(T v, volatile T* p) const { |
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109 __asm { |
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110 mov edx, p; |
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111 mov eax, v; |
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112 xchg eax, dword ptr [edx]; |
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113 } |
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114 } |
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115 }; |
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116 #endif // AMD64 |
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117 |
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118 #endif // OS_CPU_WINDOWS_X86_ORDERACCESS_WINDOWS_X86_HPP |
66 #endif // OS_CPU_WINDOWS_X86_ORDERACCESS_WINDOWS_X86_HPP |