equal
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167 _Atomic_move_long(reinterpret_cast<const volatile int64_t*>(&store_value), reinterpret_cast<volatile int64_t*>(dest)); |
167 _Atomic_move_long(reinterpret_cast<const volatile int64_t*>(&store_value), reinterpret_cast<volatile int64_t*>(dest)); |
168 } |
168 } |
169 |
169 |
170 #endif // AMD64 |
170 #endif // AMD64 |
171 |
171 |
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172 template<> |
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173 struct Atomic::PlatformOrderedStore<1, RELEASE_X_FENCE> |
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174 { |
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175 template <typename T> |
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176 void operator()(T v, volatile T* p) const { |
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177 __asm__ volatile ( "xchgb (%2),%0" |
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178 : "=q" (v) |
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179 : "0" (v), "r" (p) |
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180 : "memory"); |
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181 } |
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182 }; |
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183 |
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184 template<> |
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185 struct Atomic::PlatformOrderedStore<2, RELEASE_X_FENCE> |
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186 { |
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187 template <typename T> |
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188 void operator()(T v, volatile T* p) const { |
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189 __asm__ volatile ( "xchgw (%2),%0" |
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190 : "=r" (v) |
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191 : "0" (v), "r" (p) |
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192 : "memory"); |
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193 } |
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194 }; |
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195 |
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196 template<> |
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197 struct Atomic::PlatformOrderedStore<4, RELEASE_X_FENCE> |
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198 { |
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199 template <typename T> |
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200 void operator()(T v, volatile T* p) const { |
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201 __asm__ volatile ( "xchgl (%2),%0" |
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202 : "=r" (v) |
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203 : "0" (v), "r" (p) |
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204 : "memory"); |
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205 } |
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206 }; |
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207 |
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208 #ifdef AMD64 |
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209 template<> |
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210 struct Atomic::PlatformOrderedStore<8, RELEASE_X_FENCE> |
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211 { |
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212 template <typename T> |
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213 void operator()(T v, volatile T* p) const { |
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214 __asm__ volatile ( "xchgq (%2), %0" |
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215 : "=r" (v) |
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216 : "0" (v), "r" (p) |
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217 : "memory"); |
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218 } |
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219 }; |
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220 #endif // AMD64 |
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221 |
172 #endif // OS_CPU_BSD_X86_ATOMIC_BSD_X86_HPP |
222 #endif // OS_CPU_BSD_X86_ATOMIC_BSD_X86_HPP |