1481 // encoding scheme (opcode, rm, sib, immediate), and call them from C++ |
1481 // encoding scheme (opcode, rm, sib, immediate), and call them from C++ |
1482 // code in the enc_class source block. Emit functions will live in the |
1482 // code in the enc_class source block. Emit functions will live in the |
1483 // main source block for now. In future, we can generalize this by |
1483 // main source block for now. In future, we can generalize this by |
1484 // adding a syntax that specifies the sizes of fields in an order, |
1484 // adding a syntax that specifies the sizes of fields in an order, |
1485 // so that the adlc can build the emit functions automagically |
1485 // so that the adlc can build the emit functions automagically |
1486 enc_class OpcP %{ // Emit opcode |
1486 |
1487 emit_opcode(cbuf,$primary); |
1487 // Emit primary opcode |
1488 %} |
1488 enc_class OpcP %{ |
1489 |
1489 emit_opcode(cbuf, $primary); |
1490 enc_class OpcS %{ // Emit opcode |
1490 %} |
1491 emit_opcode(cbuf,$secondary); |
1491 |
1492 %} |
1492 // Emit secondary opcode |
1493 |
1493 enc_class OpcS %{ |
1494 enc_class Opcode(immI d8 ) %{ // Emit opcode |
1494 emit_opcode(cbuf, $secondary); |
1495 emit_opcode(cbuf,$d8$$constant); |
1495 %} |
|
1496 |
|
1497 // Emit opcode directly |
|
1498 enc_class Opcode(immI d8) %{ |
|
1499 emit_opcode(cbuf, $d8$$constant); |
1496 %} |
1500 %} |
1497 |
1501 |
1498 enc_class SizePrefix %{ |
1502 enc_class SizePrefix %{ |
1499 emit_opcode(cbuf,0x66); |
1503 emit_opcode(cbuf,0x66); |
1500 %} |
1504 %} |
6382 "XCHG $dst.lo $dst.hi" %} |
6386 "XCHG $dst.lo $dst.hi" %} |
6383 |
6387 |
6384 ins_cost(125); |
6388 ins_cost(125); |
6385 ins_encode( bswap_long_bytes(dst) ); |
6389 ins_encode( bswap_long_bytes(dst) ); |
6386 ins_pipe( ialu_reg_reg); |
6390 ins_pipe( ialu_reg_reg); |
|
6391 %} |
|
6392 |
|
6393 |
|
6394 //---------- Population Count Instructions ------------------------------------- |
|
6395 |
|
6396 instruct popCountI(eRegI dst, eRegI src) %{ |
|
6397 predicate(UsePopCountInstruction); |
|
6398 match(Set dst (PopCountI src)); |
|
6399 |
|
6400 format %{ "POPCNT $dst, $src" %} |
|
6401 ins_encode %{ |
|
6402 __ popcntl($dst$$Register, $src$$Register); |
|
6403 %} |
|
6404 ins_pipe(ialu_reg); |
|
6405 %} |
|
6406 |
|
6407 instruct popCountI_mem(eRegI dst, memory mem) %{ |
|
6408 predicate(UsePopCountInstruction); |
|
6409 match(Set dst (PopCountI (LoadI mem))); |
|
6410 |
|
6411 format %{ "POPCNT $dst, $mem" %} |
|
6412 ins_encode %{ |
|
6413 __ popcntl($dst$$Register, $mem$$Address); |
|
6414 %} |
|
6415 ins_pipe(ialu_reg); |
|
6416 %} |
|
6417 |
|
6418 // Note: Long.bitCount(long) returns an int. |
|
6419 instruct popCountL(eRegI dst, eRegL src, eRegI tmp, eFlagsReg cr) %{ |
|
6420 predicate(UsePopCountInstruction); |
|
6421 match(Set dst (PopCountL src)); |
|
6422 effect(KILL cr, TEMP tmp, TEMP dst); |
|
6423 |
|
6424 format %{ "POPCNT $dst, $src.lo\n\t" |
|
6425 "POPCNT $tmp, $src.hi\n\t" |
|
6426 "ADD $dst, $tmp" %} |
|
6427 ins_encode %{ |
|
6428 __ popcntl($dst$$Register, $src$$Register); |
|
6429 __ popcntl($tmp$$Register, HIGH_FROM_LOW($src$$Register)); |
|
6430 __ addl($dst$$Register, $tmp$$Register); |
|
6431 %} |
|
6432 ins_pipe(ialu_reg); |
|
6433 %} |
|
6434 |
|
6435 // Note: Long.bitCount(long) returns an int. |
|
6436 instruct popCountL_mem(eRegI dst, memory mem, eRegI tmp, eFlagsReg cr) %{ |
|
6437 predicate(UsePopCountInstruction); |
|
6438 match(Set dst (PopCountL (LoadL mem))); |
|
6439 effect(KILL cr, TEMP tmp, TEMP dst); |
|
6440 |
|
6441 format %{ "POPCNT $dst, $mem\n\t" |
|
6442 "POPCNT $tmp, $mem+4\n\t" |
|
6443 "ADD $dst, $tmp" %} |
|
6444 ins_encode %{ |
|
6445 //__ popcntl($dst$$Register, $mem$$Address$$first); |
|
6446 //__ popcntl($tmp$$Register, $mem$$Address$$second); |
|
6447 __ popcntl($dst$$Register, Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp, false)); |
|
6448 __ popcntl($tmp$$Register, Address::make_raw($mem$$base, $mem$$index, $mem$$scale, $mem$$disp + 4, false)); |
|
6449 __ addl($dst$$Register, $tmp$$Register); |
|
6450 %} |
|
6451 ins_pipe(ialu_reg); |
6387 %} |
6452 %} |
6388 |
6453 |
6389 |
6454 |
6390 //----------Load/Store/Move Instructions--------------------------------------- |
6455 //----------Load/Store/Move Instructions--------------------------------------- |
6391 //----------Load Instructions-------------------------------------------------- |
6456 //----------Load Instructions-------------------------------------------------- |