jdk-sandbox: comparison hotspot/src/share/vm/c1/c1

equal deleted inserted replaced

-:86dbf3cacacc
+:4d9030fe341f
 #define __ gen()->lir(__FILE__, __LINE__)->
 #else
 #define __ gen()->lir()->
 #endif
+// TODO: ARM - Use some recognizable constant which still fits architectural constraints
+#ifdef ARM
+#define PATCHED_ADDR  (204)
+#else
+#define PATCHED_ADDR  (max_jint)
+#endif
 void PhiResolverState::reset(int max_vregs) {
 // Initialize array sizes
 _virtual_operands.at_put_grow(max_vregs - 1, NULL, NULL);
 _virtual_operands.trunc_to(0);
 }
 void LIRItem::load_item_force(LIR_Opr reg) {
 LIR_Opr r = result();
 if (r != reg) {
+#if !defined(ARM) && !defined(E500V2)
 if (r->type() != reg->type()) {
 // moves between different types need an intervening spill slot
-LIR_Opr tmp = _gen->force_to_spill(r, reg->type());
+r = _gen->force_to_spill(r, reg->type());
-__ move(tmp, reg);
+}
-} else {
+#endif
 __ move(r, reg);
-}
 _result = reg;
 }
 }
 ciObject* LIRItem::get_jobject_constant() const {
 // for handling NullPointerException, use debug info representing just the lock stack before this monitorenter
 __ lock_object(hdr, object, lock, scratch, slow_path, info_for_exception);
 }
-void LIRGenerator::monitor_exit(LIR_Opr object, LIR_Opr lock, LIR_Opr new_hdr, int monitor_no) {
+void LIRGenerator::monitor_exit(LIR_Opr object, LIR_Opr lock, LIR_Opr new_hdr, LIR_Opr scratch, int monitor_no) {
 if (!GenerateSynchronizationCode) return;
 // setup registers
 LIR_Opr hdr = lock;
 lock = new_hdr;
 CodeStub* slow_path = new MonitorExitStub(lock, UseFastLocking, monitor_no);
 __ load_stack_address_monitor(monitor_no, lock);
-__ unlock_object(hdr, object, lock, slow_path);
+__ unlock_object(hdr, object, lock, scratch, slow_path);
 }
 void LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info) {
 jobject2reg_with_patching(klass_reg, klass, info);
 }
 addr = ptr;
 }
 assert(addr->is_register(), "must be a register at this point");
+#ifdef ARM
+// TODO: ARM - move to platform-dependent code
+LIR_Opr tmp = FrameMap::R14_opr;
+if (VM_Version::supports_movw()) {
+__ move((LIR_Opr)card_table_base, tmp);
+} else {
+__ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
+}
+CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
+LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
+if(((int)ct->byte_map_base & 0xff) == 0) {
+__ move(tmp, card_addr);
+} else {
+LIR_Opr tmp_zero = new_register(T_INT);
+__ move(LIR_OprFact::intConst(0), tmp_zero);
+__ move(tmp_zero, card_addr);
+}
+#else // ARM
 LIR_Opr tmp = new_pointer_register();
 if (TwoOperandLIRForm) {
 __ move(addr, tmp);
 __ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
 } else {
 } else {
 __ move(LIR_OprFact::intConst(0),
 new LIR_Address(tmp, load_constant(card_table_base),
 T_BYTE));
 }
+#endif // ARM
 }
 //------------------------field access--------------------------------------
 if (needs_patching) {
 // we need to patch the offset in the instruction so don't allow
 // generate_address to try to be smart about emitting the -1.
 // Otherwise the patching code won't know how to find the
 // instruction to patch.
-address = new LIR_Address(object.result(), max_jint, field_type);
+address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
 } else {
 address = generate_address(object.result(), x->offset(), field_type);
 }
 if (is_volatile && os::is_MP()) {
 if (needs_patching) {
 // we need to patch the offset in the instruction so don't allow
 // generate_address to try to be smart about emitting the -1.
 // Otherwise the patching code won't know how to find the
 // instruction to patch.
-address = new LIR_Address(object.result(), max_jint, field_type);
+address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
 } else {
 address = generate_address(object.result(), x->offset(), field_type);
 }
 if (is_volatile) {
 __ convert(Bytecodes::_i2l, index_op, tmp);
 index_op = tmp;
 }
 #endif
 addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
+#elif defined(ARM)
+addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
 #else
 if (index_op->is_illegal() || log2_scale == 0) {
 #ifdef _LP64
 if (!index_op->is_illegal() && index_op->type() == T_INT) {
 LIR_Opr tmp = new_pointer_register();
 #ifdef _LP64
 if(idx.result()->type() == T_INT) {
 __ convert(Bytecodes::_i2l, idx.result(), index_op);
 } else {
 #endif
+// TODO: ARM also allows embedded shift in the address
 __ move(idx.result(), index_op);
 #ifdef _LP64
 }
 #endif
 __ shift_left(index_op, log2_scale, index_op);
 __ move(src, dest);
 // Assign new location to Local instruction for this local
 Local* local = x->state()->local_at(java_index)->as_Local();
 assert(local != NULL, "Locals for incoming arguments must have been created");
+#ifndef __SOFTFP__
+// The java calling convention passes double as long and float as int.
 assert(as_ValueType(t)->tag() == local->type()->tag(), "check");
+#endif // __SOFTFP__
 local->set_operand(dest);
 _instruction_for_operand.at_put_grow(dest->vreg_number(), local, NULL);
 java_index += type2size[t];
 }

changeset 6176	4d9030fe341f
parent 5707	6c66849ed24e
child 6453	970dc585ab63