hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp
changeset 36562 4d1e93624d6a
parent 35584 bd3f4749a19c
child 36565 8e38f7594806
equal deleted inserted replaced
36561:b18243f4d955 36562:4d1e93624d6a
  1554     ShouldNotReachHere();
  1554     ShouldNotReachHere();
  1555   }
  1555   }
  1556 }
  1556 }
  1557 
  1557 
  1558 void LIR_Assembler::casw(Register addr, Register newval, Register cmpval) {
  1558 void LIR_Assembler::casw(Register addr, Register newval, Register cmpval) {
  1559   Label retry_load, nope;
  1559   if (UseLSE) {
  1560   // flush and load exclusive from the memory location
  1560     __ mov(rscratch1, cmpval);
  1561   // and fail if it is not what we expect
  1561     __ casal(Assembler::word, rscratch1, newval, addr);
  1562   __ bind(retry_load);
  1562     __ cmpw(rscratch1, cmpval);
  1563   __ ldaxrw(rscratch1, addr);
  1563     __ cset(rscratch1, Assembler::NE);
  1564   __ cmpw(rscratch1, cmpval);
  1564   } else {
  1565   __ cset(rscratch1, Assembler::NE);
  1565     Label retry_load, nope;
  1566   __ br(Assembler::NE, nope);
  1566     // flush and load exclusive from the memory location
  1567   // if we store+flush with no intervening write rscratch1 wil be zero
  1567     // and fail if it is not what we expect
  1568   __ stlxrw(rscratch1, newval, addr);
  1568     __ bind(retry_load);
  1569   // retry so we only ever return after a load fails to compare
  1569     __ ldaxrw(rscratch1, addr);
  1570   // ensures we don't return a stale value after a failed write.
  1570     __ cmpw(rscratch1, cmpval);
  1571   __ cbnzw(rscratch1, retry_load);
  1571     __ cset(rscratch1, Assembler::NE);
  1572   __ bind(nope);
  1572     __ br(Assembler::NE, nope);
       
  1573     // if we store+flush with no intervening write rscratch1 wil be zero
       
  1574     __ stlxrw(rscratch1, newval, addr);
       
  1575     // retry so we only ever return after a load fails to compare
       
  1576     // ensures we don't return a stale value after a failed write.
       
  1577     __ cbnzw(rscratch1, retry_load);
       
  1578     __ bind(nope);
       
  1579   }
  1573   __ membar(__ AnyAny);
  1580   __ membar(__ AnyAny);
  1574 }
  1581 }
  1575 
  1582 
  1576 void LIR_Assembler::casl(Register addr, Register newval, Register cmpval) {
  1583 void LIR_Assembler::casl(Register addr, Register newval, Register cmpval) {
  1577   Label retry_load, nope;
  1584   if (UseLSE) {
  1578   // flush and load exclusive from the memory location
  1585     __ mov(rscratch1, cmpval);
  1579   // and fail if it is not what we expect
  1586     __ casal(Assembler::xword, rscratch1, newval, addr);
  1580   __ bind(retry_load);
  1587     __ cmp(rscratch1, cmpval);
  1581   __ ldaxr(rscratch1, addr);
  1588     __ cset(rscratch1, Assembler::NE);
  1582   __ cmp(rscratch1, cmpval);
  1589   } else {
  1583   __ cset(rscratch1, Assembler::NE);
  1590     Label retry_load, nope;
  1584   __ br(Assembler::NE, nope);
  1591     // flush and load exclusive from the memory location
  1585   // if we store+flush with no intervening write rscratch1 wil be zero
  1592     // and fail if it is not what we expect
  1586   __ stlxr(rscratch1, newval, addr);
  1593     __ bind(retry_load);
  1587   // retry so we only ever return after a load fails to compare
  1594     __ ldaxr(rscratch1, addr);
  1588   // ensures we don't return a stale value after a failed write.
  1595     __ cmp(rscratch1, cmpval);
  1589   __ cbnz(rscratch1, retry_load);
  1596     __ cset(rscratch1, Assembler::NE);
  1590   __ bind(nope);
  1597     __ br(Assembler::NE, nope);
       
  1598     // if we store+flush with no intervening write rscratch1 wil be zero
       
  1599     __ stlxr(rscratch1, newval, addr);
       
  1600     // retry so we only ever return after a load fails to compare
       
  1601     // ensures we don't return a stale value after a failed write.
       
  1602     __ cbnz(rscratch1, retry_load);
       
  1603     __ bind(nope);
       
  1604   }
  1591   __ membar(__ AnyAny);
  1605   __ membar(__ AnyAny);
  1592 }
  1606 }
  1593 
  1607 
  1594 
  1608 
  1595 void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {
  1609 void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {