231 |
231 |
232 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, |
232 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, |
233 Register index, |
233 Register index, |
234 int bcp_offset, |
234 int bcp_offset, |
235 size_t index_size) { |
235 size_t index_size) { |
236 assert(cache != index, "must use different registers"); |
236 assert_different_registers(cache, index); |
237 get_cache_index_at_bcp(index, bcp_offset, index_size); |
237 get_cache_index_at_bcp(index, bcp_offset, index_size); |
238 movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize)); |
238 movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize)); |
239 assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below"); |
239 assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below"); |
240 // convert from field index to ConstantPoolCacheEntry index |
240 // convert from field index to ConstantPoolCacheEntry index |
241 shll(index, 2); |
241 shll(index, 2); |
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242 } |
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243 |
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244 |
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245 void InterpreterMacroAssembler::get_cache_and_index_and_bytecode_at_bcp(Register cache, |
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246 Register index, |
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247 Register bytecode, |
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248 int byte_no, |
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249 int bcp_offset, |
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250 size_t index_size) { |
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251 get_cache_and_index_at_bcp(cache, index, bcp_offset, index_size); |
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252 // We use a 32-bit load here since the layout of 64-bit words on |
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253 // little-endian machines allow us that. |
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254 movl(bytecode, Address(cache, index, Address::times_ptr, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset())); |
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255 const int shift_count = (1 + byte_no) * BitsPerByte; |
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256 shrl(bytecode, shift_count); |
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257 andl(bytecode, 0xFF); |
242 } |
258 } |
243 |
259 |
244 |
260 |
245 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, |
261 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, |
246 Register tmp, |
262 Register tmp, |