src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp
changeset 49906 4bb58f644e4e
parent 49397 d3a8aa01f26f
child 49933 c63bdf53a1a7
equal deleted inserted replaced
49905:a09af8ef8e5c 49906:4bb58f644e4e
    31 #include "c1/c1_Runtime1.hpp"
    31 #include "c1/c1_Runtime1.hpp"
    32 #include "c1/c1_ValueStack.hpp"
    32 #include "c1/c1_ValueStack.hpp"
    33 #include "ci/ciArray.hpp"
    33 #include "ci/ciArray.hpp"
    34 #include "ci/ciObjArrayKlass.hpp"
    34 #include "ci/ciObjArrayKlass.hpp"
    35 #include "ci/ciTypeArrayKlass.hpp"
    35 #include "ci/ciTypeArrayKlass.hpp"
       
    36 #include "gc/shared/c1/barrierSetC1.hpp"
    36 #include "runtime/sharedRuntime.hpp"
    37 #include "runtime/sharedRuntime.hpp"
    37 #include "runtime/stubRoutines.hpp"
    38 #include "runtime/stubRoutines.hpp"
    38 #include "vmreg_x86.inline.hpp"
    39 #include "vmreg_x86.inline.hpp"
    39 
    40 
    40 #ifdef ASSERT
    41 #ifdef ASSERT
   150 
   151 
   151 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
   152 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
   152                                             int shift, int disp, BasicType type) {
   153                                             int shift, int disp, BasicType type) {
   153   assert(base->is_register(), "must be");
   154   assert(base->is_register(), "must be");
   154   if (index->is_constant()) {
   155   if (index->is_constant()) {
       
   156     LIR_Const *constant = index->as_constant_ptr();
       
   157 #ifdef _LP64
       
   158     jlong c;
       
   159     if (constant->type() == T_INT) {
       
   160       c = (jlong(index->as_jint()) << shift) + disp;
       
   161     } else {
       
   162       assert(constant->type() == T_LONG, "should be");
       
   163       c = (index->as_jlong() << shift) + disp;
       
   164     }
       
   165     if ((jlong)((jint)c) == c) {
       
   166       return new LIR_Address(base, (jint)c, type);
       
   167     } else {
       
   168       LIR_Opr tmp = new_register(T_LONG);
       
   169       __ move(index, tmp);
       
   170       return new LIR_Address(base, tmp, type);
       
   171     }
       
   172 #else
   155     return new LIR_Address(base,
   173     return new LIR_Address(base,
   156                            ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp,
   174                            ((intx)(constant->as_jint()) << shift) + disp,
   157                            type);
   175                            type);
       
   176 #endif
   158   } else {
   177   } else {
   159     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
   178     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
   160   }
   179   }
   161 }
   180 }
   162 
   181 
   163 
   182 
   164 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
   183 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
   165                                               BasicType type, bool needs_card_mark) {
   184                                               BasicType type) {
   166   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
   185   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
   167 
   186 
   168   LIR_Address* addr;
   187   LIR_Address* addr;
   169   if (index_opr->is_constant()) {
   188   if (index_opr->is_constant()) {
   170     int elem_size = type2aelembytes(type);
   189     int elem_size = type2aelembytes(type);
   181     addr =  new LIR_Address(array_opr,
   200     addr =  new LIR_Address(array_opr,
   182                             index_opr,
   201                             index_opr,
   183                             LIR_Address::scale(type),
   202                             LIR_Address::scale(type),
   184                             offset_in_bytes, type);
   203                             offset_in_bytes, type);
   185   }
   204   }
   186   if (needs_card_mark) {
   205   return addr;
   187     // This store will need a precise card mark, so go ahead and
       
   188     // compute the full adddres instead of computing once for the
       
   189     // store and again for the card mark.
       
   190     LIR_Opr tmp = new_pointer_register();
       
   191     __ leal(LIR_OprFact::address(addr), tmp);
       
   192     return new LIR_Address(tmp, type);
       
   193   } else {
       
   194     return addr;
       
   195   }
       
   196 }
   206 }
   197 
   207 
   198 
   208 
   199 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
   209 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
   200   LIR_Opr r = NULL;
   210   LIR_Opr r = NULL;
   251 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
   261 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
   252   BasicType type = item->type();
   262   BasicType type = item->type();
   253   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
   263   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
   254 }
   264 }
   255 
   265 
       
   266 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
       
   267   LIR_Opr tmp1 = new_register(objectType);
       
   268   LIR_Opr tmp2 = new_register(objectType);
       
   269   LIR_Opr tmp3 = new_register(objectType);
       
   270   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
       
   271 }
       
   272 
   256 //----------------------------------------------------------------------
   273 //----------------------------------------------------------------------
   257 //             visitor functions
   274 //             visitor functions
   258 //----------------------------------------------------------------------
   275 //----------------------------------------------------------------------
   259 
       
   260 
       
   261 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
       
   262   assert(x->is_pinned(),"");
       
   263   bool needs_range_check = x->compute_needs_range_check();
       
   264   bool use_length = x->length() != NULL;
       
   265   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
       
   266   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
       
   267                                          !get_jobject_constant(x->value())->is_null_object() ||
       
   268                                          x->should_profile());
       
   269 
       
   270   LIRItem array(x->array(), this);
       
   271   LIRItem index(x->index(), this);
       
   272   LIRItem value(x->value(), this);
       
   273   LIRItem length(this);
       
   274 
       
   275   array.load_item();
       
   276   index.load_nonconstant();
       
   277 
       
   278   if (use_length && needs_range_check) {
       
   279     length.set_instruction(x->length());
       
   280     length.load_item();
       
   281 
       
   282   }
       
   283   if (needs_store_check || x->check_boolean()) {
       
   284     value.load_item();
       
   285   } else {
       
   286     value.load_for_store(x->elt_type());
       
   287   }
       
   288 
       
   289   set_no_result(x);
       
   290 
       
   291   // the CodeEmitInfo must be duplicated for each different
       
   292   // LIR-instruction because spilling can occur anywhere between two
       
   293   // instructions and so the debug information must be different
       
   294   CodeEmitInfo* range_check_info = state_for(x);
       
   295   CodeEmitInfo* null_check_info = NULL;
       
   296   if (x->needs_null_check()) {
       
   297     null_check_info = new CodeEmitInfo(range_check_info);
       
   298   }
       
   299 
       
   300   // emit array address setup early so it schedules better
       
   301   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
       
   302 
       
   303   if (GenerateRangeChecks && needs_range_check) {
       
   304     if (use_length) {
       
   305       __ cmp(lir_cond_belowEqual, length.result(), index.result());
       
   306       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
       
   307     } else {
       
   308       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
       
   309       // range_check also does the null check
       
   310       null_check_info = NULL;
       
   311     }
       
   312   }
       
   313 
       
   314   if (GenerateArrayStoreCheck && needs_store_check) {
       
   315     LIR_Opr tmp1 = new_register(objectType);
       
   316     LIR_Opr tmp2 = new_register(objectType);
       
   317     LIR_Opr tmp3 = new_register(objectType);
       
   318 
       
   319     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
       
   320     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
       
   321   }
       
   322 
       
   323   if (obj_store) {
       
   324     // Needs GC write barriers.
       
   325     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
       
   326                 true /* do_load */, false /* patch */, NULL);
       
   327     __ move(value.result(), array_addr, null_check_info);
       
   328     // Seems to be a precise
       
   329     post_barrier(LIR_OprFact::address(array_addr), value.result());
       
   330   } else {
       
   331     LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
       
   332     __ move(result, array_addr, null_check_info);
       
   333   }
       
   334 }
       
   335 
       
   336 
   276 
   337 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
   277 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
   338   assert(x->is_pinned(),"");
   278   assert(x->is_pinned(),"");
   339   LIRItem obj(x->obj(), this);
   279   LIRItem obj(x->obj(), this);
   340   obj.load_item();
   280   obj.load_item();
   713   } else {
   653   } else {
   714     Unimplemented();
   654     Unimplemented();
   715   }
   655   }
   716 }
   656 }
   717 
   657 
   718 
   658 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
   719 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
       
   720   assert(x->number_of_arguments() == 4, "wrong type");
       
   721   LIRItem obj   (x->argument_at(0), this);  // object
       
   722   LIRItem offset(x->argument_at(1), this);  // offset of field
       
   723   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
       
   724   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
       
   725 
       
   726   assert(obj.type()->tag() == objectTag, "invalid type");
       
   727 
       
   728   // In 64bit the type can be long, sparc doesn't have this assert
       
   729   // assert(offset.type()->tag() == intTag, "invalid type");
       
   730 
       
   731   assert(cmp.type()->tag() == type->tag(), "invalid type");
       
   732   assert(val.type()->tag() == type->tag(), "invalid type");
       
   733 
       
   734   // get address of field
       
   735   obj.load_item();
       
   736   offset.load_nonconstant();
       
   737 
       
   738   LIR_Opr addr = new_pointer_register();
       
   739   LIR_Address* a;
       
   740   if(offset.result()->is_constant()) {
       
   741 #ifdef _LP64
       
   742     jlong c = offset.result()->as_jlong();
       
   743     if ((jlong)((jint)c) == c) {
       
   744       a = new LIR_Address(obj.result(),
       
   745                           (jint)c,
       
   746                           as_BasicType(type));
       
   747     } else {
       
   748       LIR_Opr tmp = new_register(T_LONG);
       
   749       __ move(offset.result(), tmp);
       
   750       a = new LIR_Address(obj.result(),
       
   751                           tmp,
       
   752                           as_BasicType(type));
       
   753     }
       
   754 #else
       
   755     a = new LIR_Address(obj.result(),
       
   756                         offset.result()->as_jint(),
       
   757                         as_BasicType(type));
       
   758 #endif
       
   759   } else {
       
   760     a = new LIR_Address(obj.result(),
       
   761                         offset.result(),
       
   762                         0,
       
   763                         as_BasicType(type));
       
   764   }
       
   765   __ leal(LIR_OprFact::address(a), addr);
       
   766 
       
   767   if (type == objectType) {  // Write-barrier needed for Object fields.
       
   768     // Do the pre-write barrier, if any.
       
   769     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
       
   770                 true /* do_load */, false /* patch */, NULL);
       
   771   }
       
   772 
       
   773   if (type == objectType) {
       
   774     cmp.load_item_force(FrameMap::rax_oop_opr);
       
   775     val.load_item();
       
   776   } else if (type == intType) {
       
   777     cmp.load_item_force(FrameMap::rax_opr);
       
   778     val.load_item();
       
   779   } else if (type == longType) {
       
   780     cmp.load_item_force(FrameMap::long0_opr);
       
   781     val.load_item_force(FrameMap::long1_opr);
       
   782   } else {
       
   783     ShouldNotReachHere();
       
   784   }
       
   785 
       
   786   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
   659   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
   787   if (type == objectType)
   660   if (type == T_OBJECT || type == T_ARRAY) {
   788     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
   661     cmp_value.load_item_force(FrameMap::rax_oop_opr);
   789   else if (type == intType)
   662     new_value.load_item();
   790     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
   663     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
   791   else if (type == longType)
   664   } else if (type == T_INT) {
   792     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
   665     cmp_value.load_item_force(FrameMap::rax_opr);
   793   else {
   666     new_value.load_item();
   794     ShouldNotReachHere();
   667     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
   795   }
   668   } else if (type == T_LONG) {
   796 
   669     cmp_value.load_item_force(FrameMap::long0_opr);
   797   // generate conditional move of boolean result
   670     new_value.load_item_force(FrameMap::long1_opr);
   798   LIR_Opr result = rlock_result(x);
   671     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
       
   672   } else {
       
   673     Unimplemented();
       
   674   }
       
   675   LIR_Opr result = new_register(T_INT);
   799   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
   676   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
   800            result, as_BasicType(type));
   677            result, type);
   801   if (type == objectType) {   // Write-barrier needed for Object fields.
   678   return result;
   802     // Seems to be precise
   679 }
   803     post_barrier(addr, val.result());
   680 
   804   }
   681 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
       
   682   bool is_oop = type == T_OBJECT || type == T_ARRAY;
       
   683   LIR_Opr result = new_register(type);
       
   684   value.load_item();
       
   685   // Because we want a 2-arg form of xchg and xadd
       
   686   __ move(value.result(), result);
       
   687   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
       
   688   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
       
   689   return result;
       
   690 }
       
   691 
       
   692 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
       
   693   LIR_Opr result = new_register(type);
       
   694   value.load_item();
       
   695   // Because we want a 2-arg form of xchg and xadd
       
   696   __ move(value.result(), result);
       
   697   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
       
   698   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
       
   699   return result;
   805 }
   700 }
   806 
   701 
   807 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
   702 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
   808   assert(x->number_of_arguments() == 3, "wrong type");
   703   assert(x->number_of_arguments() == 3, "wrong type");
   809   assert(UseFMA, "Needs FMA instructions support.");
   704   assert(UseFMA, "Needs FMA instructions support.");
  1568   } else {
  1463   } else {
  1569     __ store(value, address, info);
  1464     __ store(value, address, info);
  1570   }
  1465   }
  1571 }
  1466 }
  1572 
  1467 
  1573 
       
  1574 
       
  1575 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
  1468 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
  1576                                        CodeEmitInfo* info) {
  1469                                        CodeEmitInfo* info) {
  1577   if (address->type() == T_LONG) {
  1470   if (address->type() == T_LONG) {
  1578     address = new LIR_Address(address->base(),
  1471     address = new LIR_Address(address->base(),
  1579                               address->index(), address->scale(),
  1472                               address->index(), address->scale(),
  1591     }
  1484     }
  1592   } else {
  1485   } else {
  1593     __ load(address, result, info);
  1486     __ load(address, result, info);
  1594   }
  1487   }
  1595 }
  1488 }
  1596 
       
  1597 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
       
  1598                                      BasicType type, bool is_volatile) {
       
  1599   if (is_volatile && type == T_LONG) {
       
  1600     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
       
  1601     LIR_Opr tmp = new_register(T_DOUBLE);
       
  1602     __ load(addr, tmp);
       
  1603     LIR_Opr spill = new_register(T_LONG);
       
  1604     set_vreg_flag(spill, must_start_in_memory);
       
  1605     __ move(tmp, spill);
       
  1606     __ move(spill, dst);
       
  1607   } else {
       
  1608     LIR_Address* addr = new LIR_Address(src, offset, type);
       
  1609     __ load(addr, dst);
       
  1610   }
       
  1611 }
       
  1612 
       
  1613 
       
  1614 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
       
  1615                                      BasicType type, bool is_volatile) {
       
  1616   if (is_volatile && type == T_LONG) {
       
  1617     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
       
  1618     LIR_Opr tmp = new_register(T_DOUBLE);
       
  1619     LIR_Opr spill = new_register(T_DOUBLE);
       
  1620     set_vreg_flag(spill, must_start_in_memory);
       
  1621     __ move(data, spill);
       
  1622     __ move(spill, tmp);
       
  1623     __ move(tmp, addr);
       
  1624   } else {
       
  1625     LIR_Address* addr = new LIR_Address(src, offset, type);
       
  1626     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
       
  1627     if (is_obj) {
       
  1628       // Do the pre-write barrier, if any.
       
  1629       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
       
  1630                   true /* do_load */, false /* patch */, NULL);
       
  1631       __ move(data, addr);
       
  1632       assert(src->is_register(), "must be register");
       
  1633       // Seems to be a precise address
       
  1634       post_barrier(LIR_OprFact::address(addr), data);
       
  1635     } else {
       
  1636       __ move(data, addr);
       
  1637     }
       
  1638   }
       
  1639 }
       
  1640 
       
  1641 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
       
  1642   BasicType type = x->basic_type();
       
  1643   LIRItem src(x->object(), this);
       
  1644   LIRItem off(x->offset(), this);
       
  1645   LIRItem value(x->value(), this);
       
  1646 
       
  1647   src.load_item();
       
  1648   value.load_item();
       
  1649   off.load_nonconstant();
       
  1650 
       
  1651   LIR_Opr dst = rlock_result(x, type);
       
  1652   LIR_Opr data = value.result();
       
  1653   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
       
  1654   LIR_Opr offset = off.result();
       
  1655 
       
  1656   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
       
  1657   LIR_Address* addr;
       
  1658   if (offset->is_constant()) {
       
  1659 #ifdef _LP64
       
  1660     jlong c = offset->as_jlong();
       
  1661     if ((jlong)((jint)c) == c) {
       
  1662       addr = new LIR_Address(src.result(), (jint)c, type);
       
  1663     } else {
       
  1664       LIR_Opr tmp = new_register(T_LONG);
       
  1665       __ move(offset, tmp);
       
  1666       addr = new LIR_Address(src.result(), tmp, type);
       
  1667     }
       
  1668 #else
       
  1669     addr = new LIR_Address(src.result(), offset->as_jint(), type);
       
  1670 #endif
       
  1671   } else {
       
  1672     addr = new LIR_Address(src.result(), offset, type);
       
  1673   }
       
  1674 
       
  1675   // Because we want a 2-arg form of xchg and xadd
       
  1676   __ move(data, dst);
       
  1677 
       
  1678   if (x->is_add()) {
       
  1679     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
       
  1680   } else {
       
  1681     if (is_obj) {
       
  1682       // Do the pre-write barrier, if any.
       
  1683       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
       
  1684                   true /* do_load */, false /* patch */, NULL);
       
  1685     }
       
  1686     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
       
  1687     if (is_obj) {
       
  1688       // Seems to be a precise address
       
  1689       post_barrier(LIR_OprFact::address(addr), data);
       
  1690     }
       
  1691   }
       
  1692 }