src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp
changeset 49906 4bb58f644e4e
parent 49480 d7df2dd501ce
child 50102 454fa295105c
equal deleted inserted replaced
49905:a09af8ef8e5c 49906:4bb58f644e4e
   570 }
   570 }
   571 
   571 
   572 void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide) {
   572 void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide) {
   573   assert(src->is_constant(), "should not call otherwise");
   573   assert(src->is_constant(), "should not call otherwise");
   574   assert(dest->is_address(), "should not call otherwise");
   574   assert(dest->is_address(), "should not call otherwise");
   575   // See special case in LIRGenerator::do_StoreIndexed.
   575 
   576   // T_BYTE: Special case for card mark store.
       
   577   assert(type == T_BYTE || !dest->as_address_ptr()->index()->is_valid(), "not supported");
       
   578   LIR_Const* c = src->as_constant_ptr();
   576   LIR_Const* c = src->as_constant_ptr();
   579   Address addr = as_Address(dest->as_address_ptr());
   577   Address addr = as_Address(dest->as_address_ptr());
   580 
   578 
   581   int store_offset = -1;
   579   int store_offset = -1;
   582   unsigned int lmem = 0;
   580 
   583   unsigned int lcon = 0;
   581   if (dest->as_address_ptr()->index()->is_valid()) {
   584   int64_t cbits = 0;
   582     switch (type) {
   585   switch (type) {
   583       case T_INT:    // fall through
   586     case T_INT:    // fall through
   584       case T_FLOAT:
   587     case T_FLOAT:
   585         __ load_const_optimized(Z_R0_scratch, c->as_jint_bits());
   588       lmem = 4; lcon = 4; cbits = c->as_jint_bits();
   586         store_offset = __ offset();
   589       break;
   587         if (Immediate::is_uimm12(addr.disp())) {
   590 
   588           __ z_st(Z_R0_scratch, addr);
   591     case T_ADDRESS:
       
   592       lmem = 8; lcon = 4; cbits = c->as_jint_bits();
       
   593       break;
       
   594 
       
   595     case T_OBJECT:  // fall through
       
   596     case T_ARRAY:
       
   597       if (c->as_jobject() == NULL) {
       
   598         if (UseCompressedOops && !wide) {
       
   599           store_offset = __ store_const(addr, (int32_t)NULL_WORD, 4, 4);
       
   600         } else {
   589         } else {
   601           store_offset = __ store_const(addr, (int64_t)NULL_WORD, 8, 8);
   590           __ z_sty(Z_R0_scratch, addr);
   602         }
   591         }
   603       } else {
   592         break;
   604         jobject2reg(c->as_jobject(), Z_R1_scratch);
   593 
   605         if (UseCompressedOops && !wide) {
   594       case T_ADDRESS:
   606           __ encode_heap_oop(Z_R1_scratch);
   595         __ load_const_optimized(Z_R1_scratch, c->as_jint_bits());
   607           store_offset = __ reg2mem_opt(Z_R1_scratch, addr, false);
   596         store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
       
   597         break;
       
   598 
       
   599       case T_OBJECT:  // fall through
       
   600       case T_ARRAY:
       
   601         if (c->as_jobject() == NULL) {
       
   602           if (UseCompressedOops && !wide) {
       
   603             __ clear_reg(Z_R1_scratch, false);
       
   604             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, false);
       
   605           } else {
       
   606             __ clear_reg(Z_R1_scratch, true);
       
   607             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
       
   608           }
   608         } else {
   609         } else {
   609           store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
   610           jobject2reg(c->as_jobject(), Z_R1_scratch);
       
   611           if (UseCompressedOops && !wide) {
       
   612             __ encode_heap_oop(Z_R1_scratch);
       
   613             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, false);
       
   614           } else {
       
   615             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
       
   616           }
   610         }
   617         }
   611       }
   618         assert(store_offset >= 0, "check");
       
   619         break;
       
   620 
       
   621       case T_LONG:    // fall through
       
   622       case T_DOUBLE:
       
   623         __ load_const_optimized(Z_R1_scratch, (int64_t)(c->as_jlong_bits()));
       
   624         store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
       
   625         break;
       
   626 
       
   627       case T_BOOLEAN: // fall through
       
   628       case T_BYTE:
       
   629         __ load_const_optimized(Z_R0_scratch, (int8_t)(c->as_jint()));
       
   630         store_offset = __ offset();
       
   631         if (Immediate::is_uimm12(addr.disp())) {
       
   632           __ z_stc(Z_R0_scratch, addr);
       
   633         } else {
       
   634           __ z_stcy(Z_R0_scratch, addr);
       
   635         }
       
   636         break;
       
   637 
       
   638       case T_CHAR:    // fall through
       
   639       case T_SHORT:
       
   640         __ load_const_optimized(Z_R0_scratch, (int16_t)(c->as_jint()));
       
   641         store_offset = __ offset();
       
   642         if (Immediate::is_uimm12(addr.disp())) {
       
   643           __ z_sth(Z_R0_scratch, addr);
       
   644         } else {
       
   645           __ z_sthy(Z_R0_scratch, addr);
       
   646         }
       
   647         break;
       
   648 
       
   649       default:
       
   650         ShouldNotReachHere();
       
   651     }
       
   652 
       
   653   } else { // no index
       
   654 
       
   655     unsigned int lmem = 0;
       
   656     unsigned int lcon = 0;
       
   657     int64_t cbits = 0;
       
   658 
       
   659     switch (type) {
       
   660       case T_INT:    // fall through
       
   661       case T_FLOAT:
       
   662         lmem = 4; lcon = 4; cbits = c->as_jint_bits();
       
   663         break;
       
   664 
       
   665       case T_ADDRESS:
       
   666         lmem = 8; lcon = 4; cbits = c->as_jint_bits();
       
   667         break;
       
   668 
       
   669       case T_OBJECT:  // fall through
       
   670       case T_ARRAY:
       
   671         if (c->as_jobject() == NULL) {
       
   672           if (UseCompressedOops && !wide) {
       
   673             store_offset = __ store_const(addr, (int32_t)NULL_WORD, 4, 4);
       
   674           } else {
       
   675             store_offset = __ store_const(addr, (int64_t)NULL_WORD, 8, 8);
       
   676           }
       
   677         } else {
       
   678           jobject2reg(c->as_jobject(), Z_R1_scratch);
       
   679           if (UseCompressedOops && !wide) {
       
   680             __ encode_heap_oop(Z_R1_scratch);
       
   681             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, false);
       
   682           } else {
       
   683             store_offset = __ reg2mem_opt(Z_R1_scratch, addr, true);
       
   684           }
       
   685         }
       
   686         assert(store_offset >= 0, "check");
       
   687         break;
       
   688 
       
   689       case T_LONG:    // fall through
       
   690       case T_DOUBLE:
       
   691         lmem = 8; lcon = 8; cbits = (int64_t)(c->as_jlong_bits());
       
   692         break;
       
   693 
       
   694       case T_BOOLEAN: // fall through
       
   695       case T_BYTE:
       
   696         lmem = 1; lcon = 1; cbits = (int8_t)(c->as_jint());
       
   697         break;
       
   698 
       
   699       case T_CHAR:    // fall through
       
   700       case T_SHORT:
       
   701         lmem = 2; lcon = 2; cbits = (int16_t)(c->as_jint());
       
   702         break;
       
   703 
       
   704       default:
       
   705         ShouldNotReachHere();
       
   706     }
       
   707 
       
   708     if (store_offset == -1) {
       
   709       store_offset = __ store_const(addr, cbits, lmem, lcon);
   612       assert(store_offset >= 0, "check");
   710       assert(store_offset >= 0, "check");
   613       break;
   711     }
   614 
       
   615     case T_LONG:    // fall through
       
   616     case T_DOUBLE:
       
   617       lmem = 8; lcon = 8; cbits = (int64_t)(c->as_jlong_bits());
       
   618       break;
       
   619 
       
   620     case T_BOOLEAN: // fall through
       
   621     case T_BYTE:
       
   622       lmem = 1; lcon = 1; cbits = (int8_t)(c->as_jint());
       
   623       break;
       
   624 
       
   625     case T_CHAR:    // fall through
       
   626     case T_SHORT:
       
   627       lmem = 2; lcon = 2; cbits = (int16_t)(c->as_jint());
       
   628       break;
       
   629 
       
   630     default:
       
   631       ShouldNotReachHere();
       
   632   };
       
   633 
       
   634   // Index register is normally not supported, but for
       
   635   // LIRGenerator::CardTableBarrierSet_post_barrier we make an exception.
       
   636   if (type == T_BYTE && dest->as_address_ptr()->index()->is_valid()) {
       
   637     __ load_const_optimized(Z_R0_scratch, (int8_t)(c->as_jint()));
       
   638     store_offset = __ offset();
       
   639     if (Immediate::is_uimm12(addr.disp())) {
       
   640       __ z_stc(Z_R0_scratch, addr);
       
   641     } else {
       
   642       __ z_stcy(Z_R0_scratch, addr);
       
   643     }
       
   644   }
       
   645 
       
   646   if (store_offset == -1) {
       
   647     store_offset = __ store_const(addr, cbits, lmem, lcon);
       
   648     assert(store_offset >= 0, "check");
       
   649   }
   712   }
   650 
   713 
   651   if (info != NULL) {
   714   if (info != NULL) {
   652     add_debug_info_for_null_check(store_offset, info);
   715     add_debug_info_for_null_check(store_offset, info);
   653   }
   716   }