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1 /* |
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2 * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
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20 * CA 95054 USA or visit www.sun.com if you need additional information or |
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21 * have any questions. |
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22 * |
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23 */ |
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24 |
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25 // Some fun naming (textual) substitutions: |
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26 // |
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27 // RegMask::get_low_elem() ==> RegMask::find_first_elem() |
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28 // RegMask::Special ==> RegMask::Empty |
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29 // RegMask::_flags ==> RegMask::is_AllStack() |
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30 // RegMask::operator<<=() ==> RegMask::Insert() |
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31 // RegMask::operator>>=() ==> RegMask::Remove() |
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32 // RegMask::Union() ==> RegMask::OR |
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33 // RegMask::Inter() ==> RegMask::AND |
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34 // |
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35 // OptoRegister::RegName ==> OptoReg::Name |
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36 // |
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37 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version |
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38 // |
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39 // numregs in chaitin ==> proper degree in chaitin |
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40 |
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41 //-------------Non-zero bit search methods used by RegMask--------------------- |
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42 // Find lowest 1, or return 32 if empty |
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43 int find_lowest_bit( uint32 mask ); |
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44 // Find highest 1, or return 32 if empty |
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45 int find_hihghest_bit( uint32 mask ); |
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46 |
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47 //------------------------------RegMask---------------------------------------- |
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48 // The ADL file describes how to print the machine-specific registers, as well |
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49 // as any notion of register classes. We provide a register mask, which is |
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50 // just a collection of Register numbers. |
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51 |
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52 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. |
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53 // RM_SIZE is the size of a register mask in words. |
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54 // FORALL_BODY replicates a BODY macro once per word in the register mask. |
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55 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. |
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56 // However, it means the ADLC can redefine the unroll macro and all loops |
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57 // over register masks will be unrolled by the correct amount. |
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58 |
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59 class RegMask VALUE_OBJ_CLASS_SPEC { |
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60 union { |
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61 double _dummy_force_double_alignment[RM_SIZE>>1]; |
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62 // Array of Register Mask bits. This array is large enough to cover |
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63 // all the machine registers and all parameters that need to be passed |
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64 // on the stack (stack registers) up to some interesting limit. Methods |
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65 // that need more parameters will NOT be compiled. On Intel, the limit |
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66 // is something like 90+ parameters. |
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67 int _A[RM_SIZE]; |
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68 }; |
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69 |
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70 enum { |
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71 _WordBits = BitsPerInt, |
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72 _LogWordBits = LogBitsPerInt, |
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73 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef |
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74 }; |
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75 |
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76 public: |
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77 enum { CHUNK_SIZE = RM_SIZE*_WordBits }; |
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78 |
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79 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. |
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80 // Also, consider the maximum alignment size for a normally allocated |
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81 // value. Since we allocate register pairs but not register quads (at |
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82 // present), this alignment is SlotsPerLong (== 2). A normally |
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83 // aligned allocated register is either a single register, or a pair |
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84 // of adjacent registers, the lower-numbered being even. |
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85 // See also is_aligned_Pairs() below, and the padding added before |
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86 // Matcher::_new_SP to keep allocated pairs aligned properly. |
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87 // If we ever go to quad-word allocations, SlotsPerQuad will become |
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88 // the controlling alignment constraint. Note that this alignment |
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89 // requirement is internal to the allocator, and independent of any |
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90 // particular platform. |
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91 enum { SlotsPerLong = 2 }; |
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92 |
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93 // A constructor only used by the ADLC output. All mask fields are filled |
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94 // in directly. Calls to this look something like RM(1,2,3,4); |
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95 RegMask( |
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96 # define BODY(I) int a##I, |
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97 FORALL_BODY |
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98 # undef BODY |
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99 int dummy = 0 ) { |
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100 # define BODY(I) _A[I] = a##I; |
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101 FORALL_BODY |
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102 # undef BODY |
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103 } |
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104 |
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105 // Handy copying constructor |
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106 RegMask( RegMask *rm ) { |
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107 # define BODY(I) _A[I] = rm->_A[I]; |
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108 FORALL_BODY |
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109 # undef BODY |
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110 } |
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111 |
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112 // Construct an empty mask |
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113 RegMask( ) { Clear(); } |
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114 |
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115 // Construct a mask with a single bit |
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116 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } |
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117 |
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118 // Check for register being in mask |
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119 int Member( OptoReg::Name reg ) const { |
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120 assert( reg < CHUNK_SIZE, "" ); |
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121 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); |
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122 } |
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123 |
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124 // The last bit in the register mask indicates that the mask should repeat |
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125 // indefinitely with ONE bits. Returns TRUE if mask is infinite or |
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126 // unbounded in size. Returns FALSE if mask is finite size. |
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127 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } |
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128 |
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129 // Work around an -xO3 optimization problme in WS6U1. The old way: |
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130 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } |
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131 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() |
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132 // follows an Insert() loop, like the one found in init_spill_mask(). Using |
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133 // Insert() instead works because the index into _A in computed instead of |
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134 // constant. See bug 4665841. |
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135 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } |
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136 |
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137 // Test for being a not-empty mask. |
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138 int is_NotEmpty( ) const { |
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139 int tmp = 0; |
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140 # define BODY(I) tmp |= _A[I]; |
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141 FORALL_BODY |
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142 # undef BODY |
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143 return tmp; |
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144 } |
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145 |
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146 // Find lowest-numbered register from mask, or BAD if mask is empty. |
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147 OptoReg::Name find_first_elem() const { |
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148 int base, bits; |
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149 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else |
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150 FORALL_BODY |
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151 # undef BODY |
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152 { base = OptoReg::Bad; bits = 1<<0; } |
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153 return OptoReg::Name(base + find_lowest_bit(bits)); |
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154 } |
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155 // Get highest-numbered register from mask, or BAD if mask is empty. |
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156 OptoReg::Name find_last_elem() const { |
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157 int base, bits; |
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158 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else |
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159 FORALL_BODY |
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160 # undef BODY |
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161 { base = OptoReg::Bad; bits = 1<<0; } |
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162 return OptoReg::Name(base + find_hihghest_bit(bits)); |
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163 } |
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164 |
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165 // Find the lowest-numbered register pair in the mask. Return the |
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166 // HIGHEST register number in the pair, or BAD if no pairs. |
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167 // Assert that the mask contains only bit pairs. |
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168 OptoReg::Name find_first_pair() const; |
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169 |
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170 // Clear out partial bits; leave only aligned adjacent bit pairs. |
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171 void ClearToPairs(); |
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172 // Smear out partial bits; leave only aligned adjacent bit pairs. |
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173 void SmearToPairs(); |
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174 // Verify that the mask contains only aligned adjacent bit pairs |
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175 void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); } |
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176 // Test that the mask contains only aligned adjacent bit pairs |
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177 bool is_aligned_Pairs() const; |
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178 |
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179 // mask is a pair of misaligned registers |
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180 bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();} |
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181 // Test for single register |
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182 int is_bound1() const; |
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183 // Test for a single adjacent pair |
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184 int is_bound2() const; |
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185 |
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186 // Fast overlap test. Non-zero if any registers in common. |
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187 int overlap( const RegMask &rm ) const { |
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188 return |
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189 # define BODY(I) (_A[I] & rm._A[I]) | |
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190 FORALL_BODY |
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191 # undef BODY |
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192 0 ; |
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193 } |
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194 |
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195 // Special test for register pressure based splitting |
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196 // UP means register only, Register plus stack, or stack only is DOWN |
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197 bool is_UP() const; |
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198 |
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199 // Clear a register mask |
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200 void Clear( ) { |
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201 # define BODY(I) _A[I] = 0; |
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202 FORALL_BODY |
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203 # undef BODY |
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204 } |
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205 |
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206 // Fill a register mask with 1's |
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207 void Set_All( ) { |
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208 # define BODY(I) _A[I] = -1; |
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209 FORALL_BODY |
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210 # undef BODY |
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211 } |
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212 |
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213 // Insert register into mask |
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214 void Insert( OptoReg::Name reg ) { |
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215 assert( reg < CHUNK_SIZE, "" ); |
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216 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); |
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217 } |
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218 |
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219 // Remove register from mask |
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220 void Remove( OptoReg::Name reg ) { |
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221 assert( reg < CHUNK_SIZE, "" ); |
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222 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); |
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223 } |
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224 |
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225 // OR 'rm' into 'this' |
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226 void OR( const RegMask &rm ) { |
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227 # define BODY(I) this->_A[I] |= rm._A[I]; |
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228 FORALL_BODY |
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229 # undef BODY |
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230 } |
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231 |
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232 // AND 'rm' into 'this' |
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233 void AND( const RegMask &rm ) { |
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234 # define BODY(I) this->_A[I] &= rm._A[I]; |
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235 FORALL_BODY |
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236 # undef BODY |
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237 } |
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238 |
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239 // Subtract 'rm' from 'this' |
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240 void SUBTRACT( const RegMask &rm ) { |
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241 # define BODY(I) _A[I] &= ~rm._A[I]; |
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242 FORALL_BODY |
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243 # undef BODY |
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244 } |
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245 |
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246 // Compute size of register mask: number of bits |
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247 uint Size() const; |
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248 |
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249 #ifndef PRODUCT |
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250 void print() const { dump(); } |
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251 void dump() const; // Print a mask |
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252 #endif |
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253 |
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254 static const RegMask Empty; // Common empty mask |
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255 |
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256 static bool can_represent(OptoReg::Name reg) { |
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257 // NOTE: -1 in computation reflects the usage of the last |
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258 // bit of the regmask as an infinite stack flag. |
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259 return (int)reg < (int)(CHUNK_SIZE-1); |
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260 } |
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261 }; |
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262 |
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263 // Do not use this constant directly in client code! |
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264 #undef RM_SIZE |