1 /*

     2  * Copyright 1997-2006 Sun Microsystems, Inc.  All Rights Reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,

    20  * CA 95054 USA or visit www.sun.com if you need additional information or

    21  * have any questions.

    22  *

    23  */

    24 

    25 // Some fun naming (textual) substitutions:

    26 //

    27 // RegMask::get_low_elem() ==> RegMask::find_first_elem()

    28 // RegMask::Special        ==> RegMask::Empty

    29 // RegMask::_flags         ==> RegMask::is_AllStack()

    30 // RegMask::operator<<=()  ==> RegMask::Insert()

    31 // RegMask::operator>>=()  ==> RegMask::Remove()

    32 // RegMask::Union()        ==> RegMask::OR

    33 // RegMask::Inter()        ==> RegMask::AND

    34 //

    35 // OptoRegister::RegName   ==> OptoReg::Name

    36 //

    37 // OptoReg::stack0()       ==> _last_Mach_Reg  or ZERO in core version

    38 //

    39 // numregs in chaitin      ==> proper degree in chaitin

    40 

    41 //-------------Non-zero bit search methods used by RegMask---------------------

    42 // Find lowest 1, or return 32 if empty

    43 int find_lowest_bit( uint32 mask );

    44 // Find highest 1, or return 32 if empty

    45 int find_hihghest_bit( uint32 mask );

    46 

    47 //------------------------------RegMask----------------------------------------

    48 // The ADL file describes how to print the machine-specific registers, as well

    49 // as any notion of register classes.  We provide a register mask, which is

    50 // just a collection of Register numbers.

    51 

    52 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.

    53 // RM_SIZE is the size of a register mask in words.

    54 // FORALL_BODY replicates a BODY macro once per word in the register mask.

    55 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.

    56 // However, it means the ADLC can redefine the unroll macro and all loops

    57 // over register masks will be unrolled by the correct amount.

    58 

    59 class RegMask VALUE_OBJ_CLASS_SPEC {

    60   union {

    61     double _dummy_force_double_alignment[RM_SIZE>>1];

    62     // Array of Register Mask bits.  This array is large enough to cover

    63     // all the machine registers and all parameters that need to be passed

    64     // on the stack (stack registers) up to some interesting limit.  Methods

    65     // that need more parameters will NOT be compiled.  On Intel, the limit

    66     // is something like 90+ parameters.

    67     int _A[RM_SIZE];

    68   };

    69 

    70   enum {

    71     _WordBits    = BitsPerInt,

    72     _LogWordBits = LogBitsPerInt,

    73     _RM_SIZE     = RM_SIZE   // local constant, imported, then hidden by #undef

    74   };

    75 

    76 public:

    77   enum { CHUNK_SIZE = RM_SIZE*_WordBits };

    78 

    79   // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.

    80   // Also, consider the maximum alignment size for a normally allocated

    81   // value.  Since we allocate register pairs but not register quads (at

    82   // present), this alignment is SlotsPerLong (== 2).  A normally

    83   // aligned allocated register is either a single register, or a pair

    84   // of adjacent registers, the lower-numbered being even.

    85   // See also is_aligned_Pairs() below, and the padding added before

    86   // Matcher::_new_SP to keep allocated pairs aligned properly.

    87   // If we ever go to quad-word allocations, SlotsPerQuad will become

    88   // the controlling alignment constraint.  Note that this alignment

    89   // requirement is internal to the allocator, and independent of any

    90   // particular platform.

    91   enum { SlotsPerLong = 2 };

    92 

    93   // A constructor only used by the ADLC output.  All mask fields are filled

    94   // in directly.  Calls to this look something like RM(1,2,3,4);

    95   RegMask(

    96 #   define BODY(I) int a##I,

    97     FORALL_BODY

    98 #   undef BODY

    99     int dummy = 0 ) {

   100 #   define BODY(I) _A[I] = a##I;

   101     FORALL_BODY

   102 #   undef BODY

   103   }

   104 

   105   // Handy copying constructor

   106   RegMask( RegMask *rm ) {

   107 #   define BODY(I) _A[I] = rm->_A[I];

   108     FORALL_BODY

   109 #   undef BODY

   110   }

   111 

   112   // Construct an empty mask

   113   RegMask( ) { Clear(); }

   114 

   115   // Construct a mask with a single bit

   116   RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); }

   117 

   118   // Check for register being in mask

   119   int Member( OptoReg::Name reg ) const {

   120     assert( reg < CHUNK_SIZE, "" );

   121     return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1)));

   122   }

   123 

   124   // The last bit in the register mask indicates that the mask should repeat

   125   // indefinitely with ONE bits.  Returns TRUE if mask is infinite or

   126   // unbounded in size.  Returns FALSE if mask is finite size.

   127   int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); }

   128 

   129   // Work around an -xO3 optimization problme in WS6U1. The old way:

   130   //   void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }

   131   // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()

   132   // follows an Insert() loop, like the one found in init_spill_mask(). Using

   133   // Insert() instead works because the index into _A in computed instead of

   134   // constant.  See bug 4665841.

   135   void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); }

   136 

   137   // Test for being a not-empty mask.

   138   int is_NotEmpty( ) const {

   139     int tmp = 0;

   140 #   define BODY(I) tmp |= _A[I];

   141     FORALL_BODY

   142 #   undef BODY

   143     return tmp;

   144   }

   145 

   146   // Find lowest-numbered register from mask, or BAD if mask is empty.

   147   OptoReg::Name find_first_elem() const {

   148     int base, bits;

   149 #   define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else

   150     FORALL_BODY

   151 #   undef BODY

   152       { base = OptoReg::Bad; bits = 1<<0; }

   153     return OptoReg::Name(base + find_lowest_bit(bits));

   154   }

   155   // Get highest-numbered register from mask, or BAD if mask is empty.

   156   OptoReg::Name find_last_elem() const {

   157     int base, bits;

   158 #   define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else

   159     FORALL_BODY

   160 #   undef BODY

   161       { base = OptoReg::Bad; bits = 1<<0; }

   162     return OptoReg::Name(base + find_hihghest_bit(bits));

   163   }

   164 

   165   // Find the lowest-numbered register pair in the mask.  Return the

   166   // HIGHEST register number in the pair, or BAD if no pairs.

   167   // Assert that the mask contains only bit pairs.

   168   OptoReg::Name find_first_pair() const;

   169 

   170   // Clear out partial bits; leave only aligned adjacent bit pairs.

   171   void ClearToPairs();

   172   // Smear out partial bits; leave only aligned adjacent bit pairs.

   173   void SmearToPairs();

   174   // Verify that the mask contains only aligned adjacent bit pairs

   175   void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); }

   176   // Test that the mask contains only aligned adjacent bit pairs

   177   bool is_aligned_Pairs() const;

   178 

   179   // mask is a pair of misaligned registers

   180   bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();}

   181   // Test for single register

   182   int is_bound1() const;

   183   // Test for a single adjacent pair

   184   int is_bound2() const;

   185 

   186   // Fast overlap test.  Non-zero if any registers in common.

   187   int overlap( const RegMask &rm ) const {

   188     return

   189 #   define BODY(I) (_A[I] & rm._A[I]) |

   190     FORALL_BODY

   191 #   undef BODY

   192     0 ;

   193   }

   194 

   195   // Special test for register pressure based splitting

   196   // UP means register only, Register plus stack, or stack only is DOWN

   197   bool is_UP() const;

   198 

   199   // Clear a register mask

   200   void Clear( ) {

   201 #   define BODY(I) _A[I] = 0;

   202     FORALL_BODY

   203 #   undef BODY

   204   }

   205 

   206   // Fill a register mask with 1's

   207   void Set_All( ) {

   208 #   define BODY(I) _A[I] = -1;

   209     FORALL_BODY

   210 #   undef BODY

   211   }

   212 

   213   // Insert register into mask

   214   void Insert( OptoReg::Name reg ) {

   215     assert( reg < CHUNK_SIZE, "" );

   216     _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1)));

   217   }

   218 

   219   // Remove register from mask

   220   void Remove( OptoReg::Name reg ) {

   221     assert( reg < CHUNK_SIZE, "" );

   222     _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1)));

   223   }

   224 

   225   // OR 'rm' into 'this'

   226   void OR( const RegMask &rm ) {

   227 #   define BODY(I) this->_A[I] |= rm._A[I];

   228     FORALL_BODY

   229 #   undef BODY

   230   }

   231 

   232   // AND 'rm' into 'this'

   233   void AND( const RegMask &rm ) {

   234 #   define BODY(I) this->_A[I] &= rm._A[I];

   235     FORALL_BODY

   236 #   undef BODY

   237   }

   238 

   239   // Subtract 'rm' from 'this'

   240   void SUBTRACT( const RegMask &rm ) {

   241 #   define BODY(I) _A[I] &= ~rm._A[I];

   242     FORALL_BODY

   243 #   undef BODY

   244   }

   245 

   246   // Compute size of register mask: number of bits

   247   uint Size() const;

   248 

   249 #ifndef PRODUCT

   250   void print() const { dump(); }

   251   void dump() const;            // Print a mask

   252 #endif

   253 

   254   static const RegMask Empty;   // Common empty mask

   255 

   256   static bool can_represent(OptoReg::Name reg) {

   257     // NOTE: -1 in computation reflects the usage of the last

   258     //       bit of the regmask as an infinite stack flag.

   259     return (int)reg < (int)(CHUNK_SIZE-1);

   260   }

   261 };

   262 

   263 // Do not use this constant directly in client code!

   264 #undef RM_SIZE