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1 /* |
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2 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
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20 * CA 95054 USA or visit www.sun.com if you need additional information or |
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21 * have any questions. |
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22 * |
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23 */ |
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24 |
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25 # include "incls/_precompiled.incl" |
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26 # include "incls/_c1_LIR.cpp.incl" |
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27 |
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28 Register LIR_OprDesc::as_register() const { |
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29 return FrameMap::cpu_rnr2reg(cpu_regnr()); |
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30 } |
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31 |
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32 Register LIR_OprDesc::as_register_lo() const { |
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33 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); |
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34 } |
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35 |
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36 Register LIR_OprDesc::as_register_hi() const { |
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37 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); |
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38 } |
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39 |
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40 #ifdef IA32 |
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41 |
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42 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { |
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43 return FrameMap::nr2xmmreg(xmm_regnr()); |
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44 } |
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45 |
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46 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { |
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47 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); |
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48 return FrameMap::nr2xmmreg(xmm_regnrLo()); |
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49 } |
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50 |
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51 #endif |
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52 |
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53 |
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54 #ifdef SPARC |
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55 |
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56 FloatRegister LIR_OprDesc::as_float_reg() const { |
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57 return FrameMap::nr2floatreg(fpu_regnr()); |
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58 } |
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59 |
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60 FloatRegister LIR_OprDesc::as_double_reg() const { |
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61 return FrameMap::nr2floatreg(fpu_regnrHi()); |
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62 } |
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63 |
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64 #endif |
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65 |
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66 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); |
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67 |
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68 LIR_Opr LIR_OprFact::value_type(ValueType* type) { |
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69 ValueTag tag = type->tag(); |
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70 switch (tag) { |
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71 case objectTag : { |
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72 ClassConstant* c = type->as_ClassConstant(); |
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73 if (c != NULL && !c->value()->is_loaded()) { |
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74 return LIR_OprFact::oopConst(NULL); |
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75 } else { |
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76 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); |
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77 } |
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78 } |
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79 case addressTag: return LIR_OprFact::intConst(type->as_AddressConstant()->value()); |
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80 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); |
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81 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); |
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82 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); |
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83 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); |
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84 default: ShouldNotReachHere(); |
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85 } |
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86 } |
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87 |
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88 |
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89 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { |
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90 switch (type->tag()) { |
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91 case objectTag: return LIR_OprFact::oopConst(NULL); |
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92 case addressTag: |
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93 case intTag: return LIR_OprFact::intConst(0); |
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94 case floatTag: return LIR_OprFact::floatConst(0.0); |
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95 case longTag: return LIR_OprFact::longConst(0); |
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96 case doubleTag: return LIR_OprFact::doubleConst(0.0); |
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97 default: ShouldNotReachHere(); |
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98 } |
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99 return illegalOpr; |
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100 } |
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101 |
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102 |
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103 |
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104 //--------------------------------------------------- |
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105 |
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106 |
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107 LIR_Address::Scale LIR_Address::scale(BasicType type) { |
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108 int elem_size = type2aelembytes[type]; |
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109 switch (elem_size) { |
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110 case 1: return LIR_Address::times_1; |
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111 case 2: return LIR_Address::times_2; |
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112 case 4: return LIR_Address::times_4; |
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113 case 8: return LIR_Address::times_8; |
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114 } |
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115 ShouldNotReachHere(); |
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116 return LIR_Address::times_1; |
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117 } |
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118 |
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119 |
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120 #ifndef PRODUCT |
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121 void LIR_Address::verify() const { |
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122 #ifdef SPARC |
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123 assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used"); |
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124 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
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125 #endif |
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126 #ifdef _LP64 |
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127 assert(base()->is_cpu_register(), "wrong base operand"); |
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128 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); |
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129 assert(base()->type() == T_OBJECT || base()->type() == T_LONG, |
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130 "wrong type for addresses"); |
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131 #else |
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132 assert(base()->is_single_cpu(), "wrong base operand"); |
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133 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); |
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134 assert(base()->type() == T_OBJECT || base()->type() == T_INT, |
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135 "wrong type for addresses"); |
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136 #endif |
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137 } |
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138 #endif |
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139 |
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140 |
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141 //--------------------------------------------------- |
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142 |
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143 char LIR_OprDesc::type_char(BasicType t) { |
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144 switch (t) { |
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145 case T_ARRAY: |
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146 t = T_OBJECT; |
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147 case T_BOOLEAN: |
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148 case T_CHAR: |
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149 case T_FLOAT: |
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150 case T_DOUBLE: |
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151 case T_BYTE: |
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152 case T_SHORT: |
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153 case T_INT: |
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154 case T_LONG: |
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155 case T_OBJECT: |
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156 case T_ADDRESS: |
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157 case T_VOID: |
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158 return ::type2char(t); |
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159 |
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160 case T_ILLEGAL: |
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161 return '?'; |
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162 |
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163 default: |
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164 ShouldNotReachHere(); |
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165 } |
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166 } |
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167 |
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168 #ifndef PRODUCT |
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169 void LIR_OprDesc::validate_type() const { |
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170 |
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171 #ifdef ASSERT |
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172 if (!is_pointer() && !is_illegal()) { |
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173 switch (as_BasicType(type_field())) { |
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174 case T_LONG: |
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175 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match"); |
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176 break; |
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177 case T_FLOAT: |
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178 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match"); |
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179 break; |
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180 case T_DOUBLE: |
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181 assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match"); |
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182 break; |
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183 case T_BOOLEAN: |
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184 case T_CHAR: |
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185 case T_BYTE: |
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186 case T_SHORT: |
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187 case T_INT: |
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188 case T_OBJECT: |
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189 case T_ARRAY: |
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190 assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match"); |
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191 break; |
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192 |
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193 case T_ILLEGAL: |
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194 // XXX TKR also means unknown right now |
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195 // assert(is_illegal(), "must match"); |
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196 break; |
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197 |
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198 default: |
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199 ShouldNotReachHere(); |
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200 } |
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201 } |
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202 #endif |
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203 |
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204 } |
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205 #endif // PRODUCT |
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206 |
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207 |
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208 bool LIR_OprDesc::is_oop() const { |
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209 if (is_pointer()) { |
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210 return pointer()->is_oop_pointer(); |
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211 } else { |
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212 OprType t= type_field(); |
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213 assert(t != unknown_type, "not set"); |
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214 return t == object_type; |
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215 } |
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216 } |
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217 |
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218 |
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219 |
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220 void LIR_Op2::verify() const { |
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221 #ifdef ASSERT |
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222 switch (code()) { |
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223 case lir_cmove: |
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224 break; |
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225 |
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226 default: |
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227 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), |
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228 "can't produce oops from arith"); |
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229 } |
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230 |
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231 if (TwoOperandLIRForm) { |
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232 switch (code()) { |
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233 case lir_add: |
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234 case lir_sub: |
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235 case lir_mul: |
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236 case lir_mul_strictfp: |
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237 case lir_div: |
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238 case lir_div_strictfp: |
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239 case lir_rem: |
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240 case lir_logic_and: |
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241 case lir_logic_or: |
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242 case lir_logic_xor: |
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243 case lir_shl: |
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244 case lir_shr: |
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245 assert(in_opr1() == result_opr(), "opr1 and result must match"); |
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246 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); |
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247 break; |
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248 |
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249 // special handling for lir_ushr because of write barriers |
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250 case lir_ushr: |
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251 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); |
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252 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); |
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253 break; |
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254 |
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255 } |
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256 } |
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257 #endif |
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258 } |
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259 |
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260 |
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261 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) |
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262 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) |
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263 , _cond(cond) |
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264 , _type(type) |
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265 , _label(block->label()) |
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266 , _block(block) |
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267 , _ublock(NULL) |
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268 , _stub(NULL) { |
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269 } |
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270 |
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271 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : |
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272 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) |
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273 , _cond(cond) |
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274 , _type(type) |
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275 , _label(stub->entry()) |
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276 , _block(NULL) |
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277 , _ublock(NULL) |
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278 , _stub(stub) { |
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279 } |
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280 |
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281 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) |
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282 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) |
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283 , _cond(cond) |
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284 , _type(type) |
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285 , _label(block->label()) |
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286 , _block(block) |
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287 , _ublock(ublock) |
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288 , _stub(NULL) |
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289 { |
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290 } |
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291 |
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292 void LIR_OpBranch::change_block(BlockBegin* b) { |
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293 assert(_block != NULL, "must have old block"); |
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294 assert(_block->label() == label(), "must be equal"); |
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295 |
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296 _block = b; |
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297 _label = b->label(); |
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298 } |
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299 |
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300 void LIR_OpBranch::change_ublock(BlockBegin* b) { |
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301 assert(_ublock != NULL, "must have old block"); |
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302 _ublock = b; |
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303 } |
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304 |
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305 void LIR_OpBranch::negate_cond() { |
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306 switch (_cond) { |
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307 case lir_cond_equal: _cond = lir_cond_notEqual; break; |
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308 case lir_cond_notEqual: _cond = lir_cond_equal; break; |
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309 case lir_cond_less: _cond = lir_cond_greaterEqual; break; |
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310 case lir_cond_lessEqual: _cond = lir_cond_greater; break; |
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311 case lir_cond_greaterEqual: _cond = lir_cond_less; break; |
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312 case lir_cond_greater: _cond = lir_cond_lessEqual; break; |
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313 default: ShouldNotReachHere(); |
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314 } |
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315 } |
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316 |
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317 |
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318 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, |
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319 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, |
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320 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, |
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321 CodeStub* stub, |
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322 ciMethod* profiled_method, |
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323 int profiled_bci) |
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324 : LIR_Op(code, result, NULL) |
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325 , _object(object) |
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326 , _array(LIR_OprFact::illegalOpr) |
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327 , _klass(klass) |
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328 , _tmp1(tmp1) |
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329 , _tmp2(tmp2) |
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330 , _tmp3(tmp3) |
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331 , _fast_check(fast_check) |
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332 , _stub(stub) |
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333 , _info_for_patch(info_for_patch) |
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334 , _info_for_exception(info_for_exception) |
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335 , _profiled_method(profiled_method) |
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336 , _profiled_bci(profiled_bci) { |
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337 if (code == lir_checkcast) { |
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338 assert(info_for_exception != NULL, "checkcast throws exceptions"); |
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339 } else if (code == lir_instanceof) { |
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340 assert(info_for_exception == NULL, "instanceof throws no exceptions"); |
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341 } else { |
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342 ShouldNotReachHere(); |
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343 } |
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344 } |
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345 |
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346 |
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347 |
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348 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) |
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349 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) |
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350 , _object(object) |
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351 , _array(array) |
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352 , _klass(NULL) |
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353 , _tmp1(tmp1) |
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354 , _tmp2(tmp2) |
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355 , _tmp3(tmp3) |
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356 , _fast_check(false) |
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357 , _stub(NULL) |
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358 , _info_for_patch(NULL) |
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359 , _info_for_exception(info_for_exception) |
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360 , _profiled_method(profiled_method) |
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361 , _profiled_bci(profiled_bci) { |
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362 if (code == lir_store_check) { |
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363 _stub = new ArrayStoreExceptionStub(info_for_exception); |
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364 assert(info_for_exception != NULL, "store_check throws exceptions"); |
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365 } else { |
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366 ShouldNotReachHere(); |
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367 } |
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368 } |
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369 |
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370 |
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371 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, |
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372 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) |
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373 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) |
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374 , _tmp(tmp) |
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375 , _src(src) |
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376 , _src_pos(src_pos) |
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377 , _dst(dst) |
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378 , _dst_pos(dst_pos) |
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379 , _flags(flags) |
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380 , _expected_type(expected_type) |
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381 , _length(length) { |
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382 _stub = new ArrayCopyStub(this); |
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383 } |
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384 |
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385 |
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386 //-------------------verify-------------------------- |
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387 |
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388 void LIR_Op1::verify() const { |
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389 switch(code()) { |
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390 case lir_move: |
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391 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); |
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392 break; |
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393 case lir_null_check: |
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394 assert(in_opr()->is_register(), "must be"); |
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395 break; |
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396 case lir_return: |
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397 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); |
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398 break; |
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399 } |
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400 } |
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401 |
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402 void LIR_OpRTCall::verify() const { |
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403 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); |
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404 } |
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405 |
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406 //-------------------visits-------------------------- |
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407 |
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408 // complete rework of LIR instruction visitor. |
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409 // The virtual calls for each instruction type is replaced by a big |
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410 // switch that adds the operands for each instruction |
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411 |
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412 void LIR_OpVisitState::visit(LIR_Op* op) { |
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413 // copy information from the LIR_Op |
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414 reset(); |
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415 set_op(op); |
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416 |
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417 switch (op->code()) { |
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418 |
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419 // LIR_Op0 |
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420 case lir_word_align: // result and info always invalid |
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421 case lir_backwardbranch_target: // result and info always invalid |
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422 case lir_build_frame: // result and info always invalid |
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423 case lir_fpop_raw: // result and info always invalid |
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424 case lir_24bit_FPU: // result and info always invalid |
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425 case lir_reset_FPU: // result and info always invalid |
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426 case lir_breakpoint: // result and info always invalid |
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427 case lir_membar: // result and info always invalid |
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428 case lir_membar_acquire: // result and info always invalid |
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429 case lir_membar_release: // result and info always invalid |
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430 { |
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431 assert(op->as_Op0() != NULL, "must be"); |
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432 assert(op->_info == NULL, "info not used by this instruction"); |
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433 assert(op->_result->is_illegal(), "not used"); |
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434 break; |
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435 } |
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436 |
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437 case lir_nop: // may have info, result always invalid |
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438 case lir_std_entry: // may have result, info always invalid |
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439 case lir_osr_entry: // may have result, info always invalid |
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440 case lir_get_thread: // may have result, info always invalid |
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441 { |
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442 assert(op->as_Op0() != NULL, "must be"); |
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443 if (op->_info != NULL) do_info(op->_info); |
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444 if (op->_result->is_valid()) do_output(op->_result); |
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445 break; |
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446 } |
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447 |
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448 |
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449 // LIR_OpLabel |
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450 case lir_label: // result and info always invalid |
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451 { |
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452 assert(op->as_OpLabel() != NULL, "must be"); |
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453 assert(op->_info == NULL, "info not used by this instruction"); |
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454 assert(op->_result->is_illegal(), "not used"); |
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455 break; |
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456 } |
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457 |
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458 |
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459 // LIR_Op1 |
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460 case lir_fxch: // input always valid, result and info always invalid |
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461 case lir_fld: // input always valid, result and info always invalid |
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462 case lir_ffree: // input always valid, result and info always invalid |
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463 case lir_push: // input always valid, result and info always invalid |
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464 case lir_pop: // input always valid, result and info always invalid |
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465 case lir_return: // input always valid, result and info always invalid |
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466 case lir_leal: // input and result always valid, info always invalid |
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467 case lir_neg: // input and result always valid, info always invalid |
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468 case lir_monaddr: // input and result always valid, info always invalid |
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469 case lir_null_check: // input and info always valid, result always invalid |
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470 case lir_move: // input and result always valid, may have info |
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471 case lir_prefetchr: // input always valid, result and info always invalid |
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472 case lir_prefetchw: // input always valid, result and info always invalid |
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473 { |
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474 assert(op->as_Op1() != NULL, "must be"); |
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475 LIR_Op1* op1 = (LIR_Op1*)op; |
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476 |
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477 if (op1->_info) do_info(op1->_info); |
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478 if (op1->_opr->is_valid()) do_input(op1->_opr); |
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479 if (op1->_result->is_valid()) do_output(op1->_result); |
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480 |
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481 break; |
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482 } |
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483 |
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484 case lir_safepoint: |
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485 { |
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486 assert(op->as_Op1() != NULL, "must be"); |
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487 LIR_Op1* op1 = (LIR_Op1*)op; |
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488 |
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489 assert(op1->_info != NULL, ""); do_info(op1->_info); |
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490 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register |
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491 assert(op1->_result->is_illegal(), "safepoint does not produce value"); |
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492 |
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493 break; |
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494 } |
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495 |
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496 // LIR_OpConvert; |
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497 case lir_convert: // input and result always valid, info always invalid |
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498 { |
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499 assert(op->as_OpConvert() != NULL, "must be"); |
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500 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; |
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501 |
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502 assert(opConvert->_info == NULL, "must be"); |
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503 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); |
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504 if (opConvert->_result->is_valid()) do_output(opConvert->_result); |
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505 do_stub(opConvert->_stub); |
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506 |
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507 break; |
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508 } |
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509 |
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510 // LIR_OpBranch; |
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511 case lir_branch: // may have info, input and result register always invalid |
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512 case lir_cond_float_branch: // may have info, input and result register always invalid |
|
513 { |
|
514 assert(op->as_OpBranch() != NULL, "must be"); |
|
515 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; |
|
516 |
|
517 if (opBranch->_info != NULL) do_info(opBranch->_info); |
|
518 assert(opBranch->_result->is_illegal(), "not used"); |
|
519 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); |
|
520 |
|
521 break; |
|
522 } |
|
523 |
|
524 |
|
525 // LIR_OpAllocObj |
|
526 case lir_alloc_object: |
|
527 { |
|
528 assert(op->as_OpAllocObj() != NULL, "must be"); |
|
529 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; |
|
530 |
|
531 if (opAllocObj->_info) do_info(opAllocObj->_info); |
|
532 if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr); |
|
533 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); |
|
534 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); |
|
535 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); |
|
536 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); |
|
537 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); |
|
538 do_stub(opAllocObj->_stub); |
|
539 break; |
|
540 } |
|
541 |
|
542 |
|
543 // LIR_OpRoundFP; |
|
544 case lir_roundfp: { |
|
545 assert(op->as_OpRoundFP() != NULL, "must be"); |
|
546 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; |
|
547 |
|
548 assert(op->_info == NULL, "info not used by this instruction"); |
|
549 assert(opRoundFP->_tmp->is_illegal(), "not used"); |
|
550 do_input(opRoundFP->_opr); |
|
551 do_output(opRoundFP->_result); |
|
552 |
|
553 break; |
|
554 } |
|
555 |
|
556 |
|
557 // LIR_Op2 |
|
558 case lir_cmp: |
|
559 case lir_cmp_l2i: |
|
560 case lir_ucmp_fd2i: |
|
561 case lir_cmp_fd2i: |
|
562 case lir_add: |
|
563 case lir_sub: |
|
564 case lir_mul: |
|
565 case lir_div: |
|
566 case lir_rem: |
|
567 case lir_sqrt: |
|
568 case lir_abs: |
|
569 case lir_log: |
|
570 case lir_log10: |
|
571 case lir_logic_and: |
|
572 case lir_logic_or: |
|
573 case lir_logic_xor: |
|
574 case lir_shl: |
|
575 case lir_shr: |
|
576 case lir_ushr: |
|
577 { |
|
578 assert(op->as_Op2() != NULL, "must be"); |
|
579 LIR_Op2* op2 = (LIR_Op2*)op; |
|
580 |
|
581 if (op2->_info) do_info(op2->_info); |
|
582 if (op2->_opr1->is_valid()) do_input(op2->_opr1); |
|
583 if (op2->_opr2->is_valid()) do_input(op2->_opr2); |
|
584 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); |
|
585 if (op2->_result->is_valid()) do_output(op2->_result); |
|
586 |
|
587 break; |
|
588 } |
|
589 |
|
590 // special handling for cmove: right input operand must not be equal |
|
591 // to the result operand, otherwise the backend fails |
|
592 case lir_cmove: |
|
593 { |
|
594 assert(op->as_Op2() != NULL, "must be"); |
|
595 LIR_Op2* op2 = (LIR_Op2*)op; |
|
596 |
|
597 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used"); |
|
598 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); |
|
599 |
|
600 do_input(op2->_opr1); |
|
601 do_input(op2->_opr2); |
|
602 do_temp(op2->_opr2); |
|
603 do_output(op2->_result); |
|
604 |
|
605 break; |
|
606 } |
|
607 |
|
608 // vspecial handling for strict operations: register input operands |
|
609 // as temp to guarantee that they do not overlap with other |
|
610 // registers |
|
611 case lir_mul_strictfp: |
|
612 case lir_div_strictfp: |
|
613 { |
|
614 assert(op->as_Op2() != NULL, "must be"); |
|
615 LIR_Op2* op2 = (LIR_Op2*)op; |
|
616 |
|
617 assert(op2->_info == NULL, "not used"); |
|
618 assert(op2->_opr1->is_valid(), "used"); |
|
619 assert(op2->_opr2->is_valid(), "used"); |
|
620 assert(op2->_result->is_valid(), "used"); |
|
621 |
|
622 do_input(op2->_opr1); do_temp(op2->_opr1); |
|
623 do_input(op2->_opr2); do_temp(op2->_opr2); |
|
624 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); |
|
625 do_output(op2->_result); |
|
626 |
|
627 break; |
|
628 } |
|
629 |
|
630 case lir_throw: |
|
631 case lir_unwind: { |
|
632 assert(op->as_Op2() != NULL, "must be"); |
|
633 LIR_Op2* op2 = (LIR_Op2*)op; |
|
634 |
|
635 if (op2->_info) do_info(op2->_info); |
|
636 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); |
|
637 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter |
|
638 assert(op2->_result->is_illegal(), "no result"); |
|
639 |
|
640 break; |
|
641 } |
|
642 |
|
643 |
|
644 case lir_tan: |
|
645 case lir_sin: |
|
646 case lir_cos: { |
|
647 assert(op->as_Op2() != NULL, "must be"); |
|
648 LIR_Op2* op2 = (LIR_Op2*)op; |
|
649 |
|
650 // sin and cos need two temporary fpu stack slots, so register |
|
651 // two temp operands. Register input operand as temp to |
|
652 // guarantee that they do not overlap |
|
653 assert(op2->_info == NULL, "not used"); |
|
654 assert(op2->_opr1->is_valid(), "used"); |
|
655 do_input(op2->_opr1); do_temp(op2->_opr1); |
|
656 |
|
657 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); |
|
658 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); |
|
659 if (op2->_result->is_valid()) do_output(op2->_result); |
|
660 |
|
661 break; |
|
662 } |
|
663 |
|
664 |
|
665 // LIR_Op3 |
|
666 case lir_idiv: |
|
667 case lir_irem: { |
|
668 assert(op->as_Op3() != NULL, "must be"); |
|
669 LIR_Op3* op3= (LIR_Op3*)op; |
|
670 |
|
671 if (op3->_info) do_info(op3->_info); |
|
672 if (op3->_opr1->is_valid()) do_input(op3->_opr1); |
|
673 |
|
674 // second operand is input and temp, so ensure that second operand |
|
675 // and third operand get not the same register |
|
676 if (op3->_opr2->is_valid()) do_input(op3->_opr2); |
|
677 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); |
|
678 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); |
|
679 |
|
680 if (op3->_result->is_valid()) do_output(op3->_result); |
|
681 |
|
682 break; |
|
683 } |
|
684 |
|
685 |
|
686 // LIR_OpJavaCall |
|
687 case lir_static_call: |
|
688 case lir_optvirtual_call: |
|
689 case lir_icvirtual_call: |
|
690 case lir_virtual_call: { |
|
691 assert(op->as_OpJavaCall() != NULL, "must be"); |
|
692 LIR_OpJavaCall* opJavaCall = (LIR_OpJavaCall*)op; |
|
693 |
|
694 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); |
|
695 |
|
696 // only visit register parameters |
|
697 int n = opJavaCall->_arguments->length(); |
|
698 for (int i = 0; i < n; i++) { |
|
699 if (!opJavaCall->_arguments->at(i)->is_pointer()) { |
|
700 do_input(*opJavaCall->_arguments->adr_at(i)); |
|
701 } |
|
702 } |
|
703 |
|
704 if (opJavaCall->_info) do_info(opJavaCall->_info); |
|
705 do_call(); |
|
706 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); |
|
707 |
|
708 break; |
|
709 } |
|
710 |
|
711 |
|
712 // LIR_OpRTCall |
|
713 case lir_rtcall: { |
|
714 assert(op->as_OpRTCall() != NULL, "must be"); |
|
715 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; |
|
716 |
|
717 // only visit register parameters |
|
718 int n = opRTCall->_arguments->length(); |
|
719 for (int i = 0; i < n; i++) { |
|
720 if (!opRTCall->_arguments->at(i)->is_pointer()) { |
|
721 do_input(*opRTCall->_arguments->adr_at(i)); |
|
722 } |
|
723 } |
|
724 if (opRTCall->_info) do_info(opRTCall->_info); |
|
725 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); |
|
726 do_call(); |
|
727 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); |
|
728 |
|
729 break; |
|
730 } |
|
731 |
|
732 |
|
733 // LIR_OpArrayCopy |
|
734 case lir_arraycopy: { |
|
735 assert(op->as_OpArrayCopy() != NULL, "must be"); |
|
736 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; |
|
737 |
|
738 assert(opArrayCopy->_result->is_illegal(), "unused"); |
|
739 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); |
|
740 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); |
|
741 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); |
|
742 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); |
|
743 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); |
|
744 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); |
|
745 if (opArrayCopy->_info) do_info(opArrayCopy->_info); |
|
746 |
|
747 // the implementation of arraycopy always has a call into the runtime |
|
748 do_call(); |
|
749 |
|
750 break; |
|
751 } |
|
752 |
|
753 |
|
754 // LIR_OpLock |
|
755 case lir_lock: |
|
756 case lir_unlock: { |
|
757 assert(op->as_OpLock() != NULL, "must be"); |
|
758 LIR_OpLock* opLock = (LIR_OpLock*)op; |
|
759 |
|
760 if (opLock->_info) do_info(opLock->_info); |
|
761 |
|
762 // TODO: check if these operands really have to be temp |
|
763 // (or if input is sufficient). This may have influence on the oop map! |
|
764 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); |
|
765 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); |
|
766 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); |
|
767 |
|
768 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); |
|
769 assert(opLock->_result->is_illegal(), "unused"); |
|
770 |
|
771 do_stub(opLock->_stub); |
|
772 |
|
773 break; |
|
774 } |
|
775 |
|
776 |
|
777 // LIR_OpDelay |
|
778 case lir_delay_slot: { |
|
779 assert(op->as_OpDelay() != NULL, "must be"); |
|
780 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; |
|
781 |
|
782 visit(opDelay->delay_op()); |
|
783 break; |
|
784 } |
|
785 |
|
786 // LIR_OpTypeCheck |
|
787 case lir_instanceof: |
|
788 case lir_checkcast: |
|
789 case lir_store_check: { |
|
790 assert(op->as_OpTypeCheck() != NULL, "must be"); |
|
791 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; |
|
792 |
|
793 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); |
|
794 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); |
|
795 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); |
|
796 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); |
|
797 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); |
|
798 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); |
|
799 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); |
|
800 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); |
|
801 do_stub(opTypeCheck->_stub); |
|
802 break; |
|
803 } |
|
804 |
|
805 // LIR_OpCompareAndSwap |
|
806 case lir_cas_long: |
|
807 case lir_cas_obj: |
|
808 case lir_cas_int: { |
|
809 assert(op->as_OpCompareAndSwap() != NULL, "must be"); |
|
810 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; |
|
811 |
|
812 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); |
|
813 if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr); |
|
814 if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value); |
|
815 if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value); |
|
816 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); |
|
817 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); |
|
818 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); |
|
819 |
|
820 break; |
|
821 } |
|
822 |
|
823 |
|
824 // LIR_OpAllocArray; |
|
825 case lir_alloc_array: { |
|
826 assert(op->as_OpAllocArray() != NULL, "must be"); |
|
827 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; |
|
828 |
|
829 if (opAllocArray->_info) do_info(opAllocArray->_info); |
|
830 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); |
|
831 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); |
|
832 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); |
|
833 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); |
|
834 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); |
|
835 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); |
|
836 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); |
|
837 do_stub(opAllocArray->_stub); |
|
838 break; |
|
839 } |
|
840 |
|
841 // LIR_OpProfileCall: |
|
842 case lir_profile_call: { |
|
843 assert(op->as_OpProfileCall() != NULL, "must be"); |
|
844 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; |
|
845 |
|
846 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); |
|
847 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); |
|
848 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); |
|
849 break; |
|
850 } |
|
851 |
|
852 default: |
|
853 ShouldNotReachHere(); |
|
854 } |
|
855 } |
|
856 |
|
857 |
|
858 void LIR_OpVisitState::do_stub(CodeStub* stub) { |
|
859 if (stub != NULL) { |
|
860 stub->visit(this); |
|
861 } |
|
862 } |
|
863 |
|
864 XHandlers* LIR_OpVisitState::all_xhandler() { |
|
865 XHandlers* result = NULL; |
|
866 |
|
867 int i; |
|
868 for (i = 0; i < info_count(); i++) { |
|
869 if (info_at(i)->exception_handlers() != NULL) { |
|
870 result = info_at(i)->exception_handlers(); |
|
871 break; |
|
872 } |
|
873 } |
|
874 |
|
875 #ifdef ASSERT |
|
876 for (i = 0; i < info_count(); i++) { |
|
877 assert(info_at(i)->exception_handlers() == NULL || |
|
878 info_at(i)->exception_handlers() == result, |
|
879 "only one xhandler list allowed per LIR-operation"); |
|
880 } |
|
881 #endif |
|
882 |
|
883 if (result != NULL) { |
|
884 return result; |
|
885 } else { |
|
886 return new XHandlers(); |
|
887 } |
|
888 |
|
889 return result; |
|
890 } |
|
891 |
|
892 |
|
893 #ifdef ASSERT |
|
894 bool LIR_OpVisitState::no_operands(LIR_Op* op) { |
|
895 visit(op); |
|
896 |
|
897 return opr_count(inputMode) == 0 && |
|
898 opr_count(outputMode) == 0 && |
|
899 opr_count(tempMode) == 0 && |
|
900 info_count() == 0 && |
|
901 !has_call() && |
|
902 !has_slow_case(); |
|
903 } |
|
904 #endif |
|
905 |
|
906 //--------------------------------------------------- |
|
907 |
|
908 |
|
909 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { |
|
910 masm->emit_call(this); |
|
911 } |
|
912 |
|
913 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { |
|
914 masm->emit_rtcall(this); |
|
915 } |
|
916 |
|
917 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { |
|
918 masm->emit_opLabel(this); |
|
919 } |
|
920 |
|
921 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { |
|
922 masm->emit_arraycopy(this); |
|
923 masm->emit_code_stub(stub()); |
|
924 } |
|
925 |
|
926 void LIR_Op0::emit_code(LIR_Assembler* masm) { |
|
927 masm->emit_op0(this); |
|
928 } |
|
929 |
|
930 void LIR_Op1::emit_code(LIR_Assembler* masm) { |
|
931 masm->emit_op1(this); |
|
932 } |
|
933 |
|
934 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { |
|
935 masm->emit_alloc_obj(this); |
|
936 masm->emit_code_stub(stub()); |
|
937 } |
|
938 |
|
939 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { |
|
940 masm->emit_opBranch(this); |
|
941 if (stub()) { |
|
942 masm->emit_code_stub(stub()); |
|
943 } |
|
944 } |
|
945 |
|
946 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { |
|
947 masm->emit_opConvert(this); |
|
948 if (stub() != NULL) { |
|
949 masm->emit_code_stub(stub()); |
|
950 } |
|
951 } |
|
952 |
|
953 void LIR_Op2::emit_code(LIR_Assembler* masm) { |
|
954 masm->emit_op2(this); |
|
955 } |
|
956 |
|
957 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { |
|
958 masm->emit_alloc_array(this); |
|
959 masm->emit_code_stub(stub()); |
|
960 } |
|
961 |
|
962 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { |
|
963 masm->emit_opTypeCheck(this); |
|
964 if (stub()) { |
|
965 masm->emit_code_stub(stub()); |
|
966 } |
|
967 } |
|
968 |
|
969 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { |
|
970 masm->emit_compare_and_swap(this); |
|
971 } |
|
972 |
|
973 void LIR_Op3::emit_code(LIR_Assembler* masm) { |
|
974 masm->emit_op3(this); |
|
975 } |
|
976 |
|
977 void LIR_OpLock::emit_code(LIR_Assembler* masm) { |
|
978 masm->emit_lock(this); |
|
979 if (stub()) { |
|
980 masm->emit_code_stub(stub()); |
|
981 } |
|
982 } |
|
983 |
|
984 |
|
985 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { |
|
986 masm->emit_delay(this); |
|
987 } |
|
988 |
|
989 |
|
990 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { |
|
991 masm->emit_profile_call(this); |
|
992 } |
|
993 |
|
994 |
|
995 // LIR_List |
|
996 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) |
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997 : _operations(8) |
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998 , _compilation(compilation) |
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999 #ifndef PRODUCT |
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1000 , _block(block) |
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1001 #endif |
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1002 #ifdef ASSERT |
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1003 , _file(NULL) |
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1004 , _line(0) |
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1005 #endif |
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1006 { } |
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1007 |
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1008 |
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1009 #ifdef ASSERT |
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1010 void LIR_List::set_file_and_line(const char * file, int line) { |
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1011 const char * f = strrchr(file, '/'); |
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1012 if (f == NULL) f = strrchr(file, '\\'); |
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1013 if (f == NULL) { |
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1014 f = file; |
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1015 } else { |
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1016 f++; |
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1017 } |
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1018 _file = f; |
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1019 _line = line; |
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1020 } |
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1021 #endif |
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1022 |
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1023 |
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1024 void LIR_List::append(LIR_InsertionBuffer* buffer) { |
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1025 assert(this == buffer->lir_list(), "wrong lir list"); |
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1026 const int n = _operations.length(); |
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1027 |
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1028 if (buffer->number_of_ops() > 0) { |
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1029 // increase size of instructions list |
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1030 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); |
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1031 // insert ops from buffer into instructions list |
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1032 int op_index = buffer->number_of_ops() - 1; |
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1033 int ip_index = buffer->number_of_insertion_points() - 1; |
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1034 int from_index = n - 1; |
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1035 int to_index = _operations.length() - 1; |
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1036 for (; ip_index >= 0; ip_index --) { |
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1037 int index = buffer->index_at(ip_index); |
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1038 // make room after insertion point |
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1039 while (index < from_index) { |
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1040 _operations.at_put(to_index --, _operations.at(from_index --)); |
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1041 } |
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1042 // insert ops from buffer |
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1043 for (int i = buffer->count_at(ip_index); i > 0; i --) { |
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1044 _operations.at_put(to_index --, buffer->op_at(op_index --)); |
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1045 } |
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1046 } |
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1047 } |
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1048 |
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1049 buffer->finish(); |
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1050 } |
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1051 |
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1052 |
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1053 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { |
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1054 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); |
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1055 } |
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1056 |
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1057 |
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1058 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1059 append(new LIR_Op1( |
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1060 lir_move, |
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1061 LIR_OprFact::address(addr), |
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1062 src, |
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1063 addr->type(), |
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1064 patch_code, |
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1065 info)); |
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1066 } |
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1067 |
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1068 |
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1069 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1070 append(new LIR_Op1( |
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1071 lir_move, |
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1072 LIR_OprFact::address(address), |
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1073 dst, |
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1074 address->type(), |
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1075 patch_code, |
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1076 info, lir_move_volatile)); |
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1077 } |
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1078 |
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1079 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1080 append(new LIR_Op1( |
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1081 lir_move, |
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1082 LIR_OprFact::address(new LIR_Address(base, offset, type)), |
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1083 dst, |
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1084 type, |
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1085 patch_code, |
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1086 info, lir_move_volatile)); |
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1087 } |
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1088 |
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1089 |
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1090 void LIR_List::prefetch(LIR_Address* addr, bool is_store) { |
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1091 append(new LIR_Op1( |
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1092 is_store ? lir_prefetchw : lir_prefetchr, |
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1093 LIR_OprFact::address(addr))); |
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1094 } |
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1095 |
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1096 |
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1097 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1098 append(new LIR_Op1( |
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1099 lir_move, |
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1100 LIR_OprFact::intConst(v), |
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1101 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), |
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1102 type, |
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1103 patch_code, |
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1104 info)); |
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1105 } |
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1106 |
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1107 |
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1108 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1109 append(new LIR_Op1( |
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1110 lir_move, |
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1111 LIR_OprFact::oopConst(o), |
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1112 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), |
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1113 type, |
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1114 patch_code, |
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1115 info)); |
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1116 } |
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1117 |
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1118 |
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1119 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1120 append(new LIR_Op1( |
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1121 lir_move, |
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1122 src, |
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1123 LIR_OprFact::address(addr), |
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1124 addr->type(), |
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1125 patch_code, |
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1126 info)); |
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1127 } |
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1128 |
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1129 |
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1130 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1131 append(new LIR_Op1( |
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1132 lir_move, |
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1133 src, |
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1134 LIR_OprFact::address(addr), |
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1135 addr->type(), |
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1136 patch_code, |
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1137 info, |
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1138 lir_move_volatile)); |
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1139 } |
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1140 |
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1141 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { |
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1142 append(new LIR_Op1( |
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1143 lir_move, |
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1144 src, |
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1145 LIR_OprFact::address(new LIR_Address(base, offset, type)), |
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1146 type, |
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1147 patch_code, |
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1148 info, lir_move_volatile)); |
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1149 } |
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1150 |
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1151 |
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1152 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { |
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1153 append(new LIR_Op3( |
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1154 lir_idiv, |
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1155 left, |
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1156 right, |
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1157 tmp, |
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1158 res, |
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1159 info)); |
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1160 } |
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1161 |
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1162 |
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1163 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { |
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1164 append(new LIR_Op3( |
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1165 lir_idiv, |
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1166 left, |
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1167 LIR_OprFact::intConst(right), |
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1168 tmp, |
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1169 res, |
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1170 info)); |
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1171 } |
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1172 |
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1173 |
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1174 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { |
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1175 append(new LIR_Op3( |
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1176 lir_irem, |
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1177 left, |
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1178 right, |
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1179 tmp, |
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1180 res, |
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1181 info)); |
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1182 } |
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1183 |
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1184 |
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1185 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { |
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1186 append(new LIR_Op3( |
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1187 lir_irem, |
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1188 left, |
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1189 LIR_OprFact::intConst(right), |
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1190 tmp, |
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1191 res, |
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1192 info)); |
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1193 } |
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1194 |
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1195 |
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1196 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { |
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1197 append(new LIR_Op2( |
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1198 lir_cmp, |
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1199 condition, |
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1200 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), |
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1201 LIR_OprFact::intConst(c), |
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1202 info)); |
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1203 } |
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1204 |
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1205 |
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1206 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { |
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1207 append(new LIR_Op2( |
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1208 lir_cmp, |
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1209 condition, |
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1210 reg, |
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1211 LIR_OprFact::address(addr), |
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1212 info)); |
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1213 } |
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1214 |
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1215 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, |
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1216 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { |
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1217 append(new LIR_OpAllocObj( |
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1218 klass, |
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1219 dst, |
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1220 t1, |
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1221 t2, |
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1222 t3, |
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1223 t4, |
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1224 header_size, |
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1225 object_size, |
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1226 init_check, |
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1227 stub)); |
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1228 } |
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1229 |
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1230 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { |
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1231 append(new LIR_OpAllocArray( |
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1232 klass, |
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1233 len, |
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1234 dst, |
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1235 t1, |
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1236 t2, |
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1237 t3, |
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1238 t4, |
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1239 type, |
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1240 stub)); |
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1241 } |
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1242 |
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1243 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { |
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1244 append(new LIR_Op2( |
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1245 lir_shl, |
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1246 value, |
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1247 count, |
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1248 dst, |
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1249 tmp)); |
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1250 } |
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1251 |
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1252 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { |
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1253 append(new LIR_Op2( |
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1254 lir_shr, |
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1255 value, |
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1256 count, |
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1257 dst, |
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1258 tmp)); |
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1259 } |
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1260 |
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1261 |
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1262 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { |
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1263 append(new LIR_Op2( |
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1264 lir_ushr, |
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1265 value, |
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1266 count, |
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1267 dst, |
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1268 tmp)); |
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1269 } |
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1270 |
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1271 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { |
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1272 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, |
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1273 left, |
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1274 right, |
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1275 dst)); |
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1276 } |
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1277 |
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1278 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { |
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1279 append(new LIR_OpLock( |
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1280 lir_lock, |
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1281 hdr, |
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1282 obj, |
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1283 lock, |
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1284 scratch, |
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1285 stub, |
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1286 info)); |
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1287 } |
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1288 |
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1289 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) { |
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1290 append(new LIR_OpLock( |
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1291 lir_unlock, |
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1292 hdr, |
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1293 obj, |
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1294 lock, |
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1295 LIR_OprFact::illegalOpr, |
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1296 stub, |
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1297 NULL)); |
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1298 } |
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1299 |
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1300 |
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1301 void check_LIR() { |
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1302 // cannot do the proper checking as PRODUCT and other modes return different results |
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1303 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); |
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1304 } |
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1305 |
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1306 |
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1307 |
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1308 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
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1309 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, |
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1310 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, |
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1311 ciMethod* profiled_method, int profiled_bci) { |
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1312 append(new LIR_OpTypeCheck(lir_checkcast, result, object, klass, |
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1313 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub, |
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1314 profiled_method, profiled_bci)); |
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1315 } |
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1316 |
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1317 |
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1318 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch) { |
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1319 append(new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL, NULL, 0)); |
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1320 } |
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1321 |
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1322 |
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1323 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) { |
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1324 append(new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception, NULL, 0)); |
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1325 } |
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1326 |
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1327 |
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1328 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { |
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1329 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, |
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1330 // implying successful swap of new_value into addr |
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1331 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2)); |
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1332 } |
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1333 |
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1334 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { |
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1335 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, |
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1336 // implying successful swap of new_value into addr |
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1337 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2)); |
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1338 } |
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1339 |
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1340 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) { |
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1341 // Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value, |
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1342 // implying successful swap of new_value into addr |
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1343 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2)); |
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1344 } |
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1345 |
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1346 |
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1347 #ifdef PRODUCT |
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1348 |
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1349 void print_LIR(BlockList* blocks) { |
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1350 } |
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1351 |
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1352 #else |
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1353 // LIR_OprDesc |
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1354 void LIR_OprDesc::print() const { |
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1355 print(tty); |
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1356 } |
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1357 |
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1358 void LIR_OprDesc::print(outputStream* out) const { |
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1359 if (is_illegal()) { |
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1360 return; |
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1361 } |
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1362 |
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1363 out->print("["); |
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1364 if (is_pointer()) { |
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1365 pointer()->print_value_on(out); |
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1366 } else if (is_single_stack()) { |
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1367 out->print("stack:%d", single_stack_ix()); |
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1368 } else if (is_double_stack()) { |
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1369 out->print("dbl_stack:%d",double_stack_ix()); |
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1370 } else if (is_virtual()) { |
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1371 out->print("R%d", vreg_number()); |
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1372 } else if (is_single_cpu()) { |
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1373 out->print(as_register()->name()); |
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1374 } else if (is_double_cpu()) { |
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1375 out->print(as_register_hi()->name()); |
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1376 out->print(as_register_lo()->name()); |
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1377 #ifdef IA32 |
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1378 } else if (is_single_xmm()) { |
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1379 out->print(as_xmm_float_reg()->name()); |
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1380 } else if (is_double_xmm()) { |
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1381 out->print(as_xmm_double_reg()->name()); |
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1382 } else if (is_single_fpu()) { |
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1383 out->print("fpu%d", fpu_regnr()); |
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1384 } else if (is_double_fpu()) { |
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1385 out->print("fpu%d", fpu_regnrLo()); |
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1386 #else |
|
1387 } else if (is_single_fpu()) { |
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1388 out->print(as_float_reg()->name()); |
|
1389 } else if (is_double_fpu()) { |
|
1390 out->print(as_double_reg()->name()); |
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1391 #endif |
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1392 |
|
1393 } else if (is_illegal()) { |
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1394 out->print("-"); |
|
1395 } else { |
|
1396 out->print("Unknown Operand"); |
|
1397 } |
|
1398 if (!is_illegal()) { |
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1399 out->print("|%c", type_char()); |
|
1400 } |
|
1401 if (is_register() && is_last_use()) { |
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1402 out->print("(last_use)"); |
|
1403 } |
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1404 out->print("]"); |
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1405 } |
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1406 |
|
1407 |
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1408 // LIR_Address |
|
1409 void LIR_Const::print_value_on(outputStream* out) const { |
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1410 switch (type()) { |
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1411 case T_INT: out->print("int:%d", as_jint()); break; |
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1412 case T_LONG: out->print("lng:%lld", as_jlong()); break; |
|
1413 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; |
|
1414 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; |
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1415 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break; |
|
1416 default: out->print("%3d:0x%x",type(), as_jdouble()); break; |
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1417 } |
|
1418 } |
|
1419 |
|
1420 // LIR_Address |
|
1421 void LIR_Address::print_value_on(outputStream* out) const { |
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1422 out->print("Base:"); _base->print(out); |
|
1423 if (!_index->is_illegal()) { |
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1424 out->print(" Index:"); _index->print(out); |
|
1425 switch (scale()) { |
|
1426 case times_1: break; |
|
1427 case times_2: out->print(" * 2"); break; |
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1428 case times_4: out->print(" * 4"); break; |
|
1429 case times_8: out->print(" * 8"); break; |
|
1430 } |
|
1431 } |
|
1432 out->print(" Disp: %d", _disp); |
|
1433 } |
|
1434 |
|
1435 // debug output of block header without InstructionPrinter |
|
1436 // (because phi functions are not necessary for LIR) |
|
1437 static void print_block(BlockBegin* x) { |
|
1438 // print block id |
|
1439 BlockEnd* end = x->end(); |
|
1440 tty->print("B%d ", x->block_id()); |
|
1441 |
|
1442 // print flags |
|
1443 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); |
|
1444 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); |
|
1445 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); |
|
1446 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); |
|
1447 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); |
|
1448 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); |
|
1449 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); |
|
1450 |
|
1451 // print block bci range |
|
1452 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->bci())); |
|
1453 |
|
1454 // print predecessors and successors |
|
1455 if (x->number_of_preds() > 0) { |
|
1456 tty->print("preds: "); |
|
1457 for (int i = 0; i < x->number_of_preds(); i ++) { |
|
1458 tty->print("B%d ", x->pred_at(i)->block_id()); |
|
1459 } |
|
1460 } |
|
1461 |
|
1462 if (x->number_of_sux() > 0) { |
|
1463 tty->print("sux: "); |
|
1464 for (int i = 0; i < x->number_of_sux(); i ++) { |
|
1465 tty->print("B%d ", x->sux_at(i)->block_id()); |
|
1466 } |
|
1467 } |
|
1468 |
|
1469 // print exception handlers |
|
1470 if (x->number_of_exception_handlers() > 0) { |
|
1471 tty->print("xhandler: "); |
|
1472 for (int i = 0; i < x->number_of_exception_handlers(); i++) { |
|
1473 tty->print("B%d ", x->exception_handler_at(i)->block_id()); |
|
1474 } |
|
1475 } |
|
1476 |
|
1477 tty->cr(); |
|
1478 } |
|
1479 |
|
1480 void print_LIR(BlockList* blocks) { |
|
1481 tty->print_cr("LIR:"); |
|
1482 int i; |
|
1483 for (i = 0; i < blocks->length(); i++) { |
|
1484 BlockBegin* bb = blocks->at(i); |
|
1485 print_block(bb); |
|
1486 tty->print("__id_Instruction___________________________________________"); tty->cr(); |
|
1487 bb->lir()->print_instructions(); |
|
1488 } |
|
1489 } |
|
1490 |
|
1491 void LIR_List::print_instructions() { |
|
1492 for (int i = 0; i < _operations.length(); i++) { |
|
1493 _operations.at(i)->print(); tty->cr(); |
|
1494 } |
|
1495 tty->cr(); |
|
1496 } |
|
1497 |
|
1498 // LIR_Ops printing routines |
|
1499 // LIR_Op |
|
1500 void LIR_Op::print_on(outputStream* out) const { |
|
1501 if (id() != -1 || PrintCFGToFile) { |
|
1502 out->print("%4d ", id()); |
|
1503 } else { |
|
1504 out->print(" "); |
|
1505 } |
|
1506 out->print(name()); out->print(" "); |
|
1507 print_instr(out); |
|
1508 if (info() != NULL) out->print(" [bci:%d]", info()->bci()); |
|
1509 #ifdef ASSERT |
|
1510 if (Verbose && _file != NULL) { |
|
1511 out->print(" (%s:%d)", _file, _line); |
|
1512 } |
|
1513 #endif |
|
1514 } |
|
1515 |
|
1516 const char * LIR_Op::name() const { |
|
1517 const char* s = NULL; |
|
1518 switch(code()) { |
|
1519 // LIR_Op0 |
|
1520 case lir_membar: s = "membar"; break; |
|
1521 case lir_membar_acquire: s = "membar_acquire"; break; |
|
1522 case lir_membar_release: s = "membar_release"; break; |
|
1523 case lir_word_align: s = "word_align"; break; |
|
1524 case lir_label: s = "label"; break; |
|
1525 case lir_nop: s = "nop"; break; |
|
1526 case lir_backwardbranch_target: s = "backbranch"; break; |
|
1527 case lir_std_entry: s = "std_entry"; break; |
|
1528 case lir_osr_entry: s = "osr_entry"; break; |
|
1529 case lir_build_frame: s = "build_frm"; break; |
|
1530 case lir_fpop_raw: s = "fpop_raw"; break; |
|
1531 case lir_24bit_FPU: s = "24bit_FPU"; break; |
|
1532 case lir_reset_FPU: s = "reset_FPU"; break; |
|
1533 case lir_breakpoint: s = "breakpoint"; break; |
|
1534 case lir_get_thread: s = "get_thread"; break; |
|
1535 // LIR_Op1 |
|
1536 case lir_fxch: s = "fxch"; break; |
|
1537 case lir_fld: s = "fld"; break; |
|
1538 case lir_ffree: s = "ffree"; break; |
|
1539 case lir_push: s = "push"; break; |
|
1540 case lir_pop: s = "pop"; break; |
|
1541 case lir_null_check: s = "null_check"; break; |
|
1542 case lir_return: s = "return"; break; |
|
1543 case lir_safepoint: s = "safepoint"; break; |
|
1544 case lir_neg: s = "neg"; break; |
|
1545 case lir_leal: s = "leal"; break; |
|
1546 case lir_branch: s = "branch"; break; |
|
1547 case lir_cond_float_branch: s = "flt_cond_br"; break; |
|
1548 case lir_move: s = "move"; break; |
|
1549 case lir_roundfp: s = "roundfp"; break; |
|
1550 case lir_rtcall: s = "rtcall"; break; |
|
1551 case lir_throw: s = "throw"; break; |
|
1552 case lir_unwind: s = "unwind"; break; |
|
1553 case lir_convert: s = "convert"; break; |
|
1554 case lir_alloc_object: s = "alloc_obj"; break; |
|
1555 case lir_monaddr: s = "mon_addr"; break; |
|
1556 // LIR_Op2 |
|
1557 case lir_cmp: s = "cmp"; break; |
|
1558 case lir_cmp_l2i: s = "cmp_l2i"; break; |
|
1559 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; |
|
1560 case lir_cmp_fd2i: s = "comp_fd2i"; break; |
|
1561 case lir_cmove: s = "cmove"; break; |
|
1562 case lir_add: s = "add"; break; |
|
1563 case lir_sub: s = "sub"; break; |
|
1564 case lir_mul: s = "mul"; break; |
|
1565 case lir_mul_strictfp: s = "mul_strictfp"; break; |
|
1566 case lir_div: s = "div"; break; |
|
1567 case lir_div_strictfp: s = "div_strictfp"; break; |
|
1568 case lir_rem: s = "rem"; break; |
|
1569 case lir_abs: s = "abs"; break; |
|
1570 case lir_sqrt: s = "sqrt"; break; |
|
1571 case lir_sin: s = "sin"; break; |
|
1572 case lir_cos: s = "cos"; break; |
|
1573 case lir_tan: s = "tan"; break; |
|
1574 case lir_log: s = "log"; break; |
|
1575 case lir_log10: s = "log10"; break; |
|
1576 case lir_logic_and: s = "logic_and"; break; |
|
1577 case lir_logic_or: s = "logic_or"; break; |
|
1578 case lir_logic_xor: s = "logic_xor"; break; |
|
1579 case lir_shl: s = "shift_left"; break; |
|
1580 case lir_shr: s = "shift_right"; break; |
|
1581 case lir_ushr: s = "ushift_right"; break; |
|
1582 case lir_alloc_array: s = "alloc_array"; break; |
|
1583 // LIR_Op3 |
|
1584 case lir_idiv: s = "idiv"; break; |
|
1585 case lir_irem: s = "irem"; break; |
|
1586 // LIR_OpJavaCall |
|
1587 case lir_static_call: s = "static"; break; |
|
1588 case lir_optvirtual_call: s = "optvirtual"; break; |
|
1589 case lir_icvirtual_call: s = "icvirtual"; break; |
|
1590 case lir_virtual_call: s = "virtual"; break; |
|
1591 // LIR_OpArrayCopy |
|
1592 case lir_arraycopy: s = "arraycopy"; break; |
|
1593 // LIR_OpLock |
|
1594 case lir_lock: s = "lock"; break; |
|
1595 case lir_unlock: s = "unlock"; break; |
|
1596 // LIR_OpDelay |
|
1597 case lir_delay_slot: s = "delay"; break; |
|
1598 // LIR_OpTypeCheck |
|
1599 case lir_instanceof: s = "instanceof"; break; |
|
1600 case lir_checkcast: s = "checkcast"; break; |
|
1601 case lir_store_check: s = "store_check"; break; |
|
1602 // LIR_OpCompareAndSwap |
|
1603 case lir_cas_long: s = "cas_long"; break; |
|
1604 case lir_cas_obj: s = "cas_obj"; break; |
|
1605 case lir_cas_int: s = "cas_int"; break; |
|
1606 // LIR_OpProfileCall |
|
1607 case lir_profile_call: s = "profile_call"; break; |
|
1608 |
|
1609 case lir_none: ShouldNotReachHere();break; |
|
1610 default: s = "illegal_op"; break; |
|
1611 } |
|
1612 return s; |
|
1613 } |
|
1614 |
|
1615 // LIR_OpJavaCall |
|
1616 void LIR_OpJavaCall::print_instr(outputStream* out) const { |
|
1617 out->print("call: "); |
|
1618 out->print("[addr: 0x%x]", address()); |
|
1619 if (receiver()->is_valid()) { |
|
1620 out->print(" [recv: "); receiver()->print(out); out->print("]"); |
|
1621 } |
|
1622 if (result_opr()->is_valid()) { |
|
1623 out->print(" [result: "); result_opr()->print(out); out->print("]"); |
|
1624 } |
|
1625 } |
|
1626 |
|
1627 // LIR_OpLabel |
|
1628 void LIR_OpLabel::print_instr(outputStream* out) const { |
|
1629 out->print("[label:0x%x]", _label); |
|
1630 } |
|
1631 |
|
1632 // LIR_OpArrayCopy |
|
1633 void LIR_OpArrayCopy::print_instr(outputStream* out) const { |
|
1634 src()->print(out); out->print(" "); |
|
1635 src_pos()->print(out); out->print(" "); |
|
1636 dst()->print(out); out->print(" "); |
|
1637 dst_pos()->print(out); out->print(" "); |
|
1638 length()->print(out); out->print(" "); |
|
1639 tmp()->print(out); out->print(" "); |
|
1640 } |
|
1641 |
|
1642 // LIR_OpCompareAndSwap |
|
1643 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { |
|
1644 addr()->print(out); out->print(" "); |
|
1645 cmp_value()->print(out); out->print(" "); |
|
1646 new_value()->print(out); out->print(" "); |
|
1647 tmp1()->print(out); out->print(" "); |
|
1648 tmp2()->print(out); out->print(" "); |
|
1649 |
|
1650 } |
|
1651 |
|
1652 // LIR_Op0 |
|
1653 void LIR_Op0::print_instr(outputStream* out) const { |
|
1654 result_opr()->print(out); |
|
1655 } |
|
1656 |
|
1657 // LIR_Op1 |
|
1658 const char * LIR_Op1::name() const { |
|
1659 if (code() == lir_move) { |
|
1660 switch (move_kind()) { |
|
1661 case lir_move_normal: |
|
1662 return "move"; |
|
1663 case lir_move_unaligned: |
|
1664 return "unaligned move"; |
|
1665 case lir_move_volatile: |
|
1666 return "volatile_move"; |
|
1667 default: |
|
1668 ShouldNotReachHere(); |
|
1669 return "illegal_op"; |
|
1670 } |
|
1671 } else { |
|
1672 return LIR_Op::name(); |
|
1673 } |
|
1674 } |
|
1675 |
|
1676 |
|
1677 void LIR_Op1::print_instr(outputStream* out) const { |
|
1678 _opr->print(out); out->print(" "); |
|
1679 result_opr()->print(out); out->print(" "); |
|
1680 print_patch_code(out, patch_code()); |
|
1681 } |
|
1682 |
|
1683 |
|
1684 // LIR_Op1 |
|
1685 void LIR_OpRTCall::print_instr(outputStream* out) const { |
|
1686 intx a = (intx)addr(); |
|
1687 out->print(Runtime1::name_for_address(addr())); |
|
1688 out->print(" "); |
|
1689 tmp()->print(out); |
|
1690 } |
|
1691 |
|
1692 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { |
|
1693 switch(code) { |
|
1694 case lir_patch_none: break; |
|
1695 case lir_patch_low: out->print("[patch_low]"); break; |
|
1696 case lir_patch_high: out->print("[patch_high]"); break; |
|
1697 case lir_patch_normal: out->print("[patch_normal]"); break; |
|
1698 default: ShouldNotReachHere(); |
|
1699 } |
|
1700 } |
|
1701 |
|
1702 // LIR_OpBranch |
|
1703 void LIR_OpBranch::print_instr(outputStream* out) const { |
|
1704 print_condition(out, cond()); out->print(" "); |
|
1705 if (block() != NULL) { |
|
1706 out->print("[B%d] ", block()->block_id()); |
|
1707 } else if (stub() != NULL) { |
|
1708 out->print("["); |
|
1709 stub()->print_name(out); |
|
1710 out->print(": 0x%x]", stub()); |
|
1711 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->bci()); |
|
1712 } else { |
|
1713 out->print("[label:0x%x] ", label()); |
|
1714 } |
|
1715 if (ublock() != NULL) { |
|
1716 out->print("unordered: [B%d] ", ublock()->block_id()); |
|
1717 } |
|
1718 } |
|
1719 |
|
1720 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { |
|
1721 switch(cond) { |
|
1722 case lir_cond_equal: out->print("[EQ]"); break; |
|
1723 case lir_cond_notEqual: out->print("[NE]"); break; |
|
1724 case lir_cond_less: out->print("[LT]"); break; |
|
1725 case lir_cond_lessEqual: out->print("[LE]"); break; |
|
1726 case lir_cond_greaterEqual: out->print("[GE]"); break; |
|
1727 case lir_cond_greater: out->print("[GT]"); break; |
|
1728 case lir_cond_belowEqual: out->print("[BE]"); break; |
|
1729 case lir_cond_aboveEqual: out->print("[AE]"); break; |
|
1730 case lir_cond_always: out->print("[AL]"); break; |
|
1731 default: out->print("[%d]",cond); break; |
|
1732 } |
|
1733 } |
|
1734 |
|
1735 // LIR_OpConvert |
|
1736 void LIR_OpConvert::print_instr(outputStream* out) const { |
|
1737 print_bytecode(out, bytecode()); |
|
1738 in_opr()->print(out); out->print(" "); |
|
1739 result_opr()->print(out); out->print(" "); |
|
1740 } |
|
1741 |
|
1742 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { |
|
1743 switch(code) { |
|
1744 case Bytecodes::_d2f: out->print("[d2f] "); break; |
|
1745 case Bytecodes::_d2i: out->print("[d2i] "); break; |
|
1746 case Bytecodes::_d2l: out->print("[d2l] "); break; |
|
1747 case Bytecodes::_f2d: out->print("[f2d] "); break; |
|
1748 case Bytecodes::_f2i: out->print("[f2i] "); break; |
|
1749 case Bytecodes::_f2l: out->print("[f2l] "); break; |
|
1750 case Bytecodes::_i2b: out->print("[i2b] "); break; |
|
1751 case Bytecodes::_i2c: out->print("[i2c] "); break; |
|
1752 case Bytecodes::_i2d: out->print("[i2d] "); break; |
|
1753 case Bytecodes::_i2f: out->print("[i2f] "); break; |
|
1754 case Bytecodes::_i2l: out->print("[i2l] "); break; |
|
1755 case Bytecodes::_i2s: out->print("[i2s] "); break; |
|
1756 case Bytecodes::_l2i: out->print("[l2i] "); break; |
|
1757 case Bytecodes::_l2f: out->print("[l2f] "); break; |
|
1758 case Bytecodes::_l2d: out->print("[l2d] "); break; |
|
1759 default: |
|
1760 out->print("[?%d]",code); |
|
1761 break; |
|
1762 } |
|
1763 } |
|
1764 |
|
1765 void LIR_OpAllocObj::print_instr(outputStream* out) const { |
|
1766 klass()->print(out); out->print(" "); |
|
1767 obj()->print(out); out->print(" "); |
|
1768 tmp1()->print(out); out->print(" "); |
|
1769 tmp2()->print(out); out->print(" "); |
|
1770 tmp3()->print(out); out->print(" "); |
|
1771 tmp4()->print(out); out->print(" "); |
|
1772 out->print("[hdr:%d]", header_size()); out->print(" "); |
|
1773 out->print("[obj:%d]", object_size()); out->print(" "); |
|
1774 out->print("[lbl:0x%x]", stub()->entry()); |
|
1775 } |
|
1776 |
|
1777 void LIR_OpRoundFP::print_instr(outputStream* out) const { |
|
1778 _opr->print(out); out->print(" "); |
|
1779 tmp()->print(out); out->print(" "); |
|
1780 result_opr()->print(out); out->print(" "); |
|
1781 } |
|
1782 |
|
1783 // LIR_Op2 |
|
1784 void LIR_Op2::print_instr(outputStream* out) const { |
|
1785 if (code() == lir_cmove) { |
|
1786 print_condition(out, condition()); out->print(" "); |
|
1787 } |
|
1788 in_opr1()->print(out); out->print(" "); |
|
1789 in_opr2()->print(out); out->print(" "); |
|
1790 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); } |
|
1791 result_opr()->print(out); |
|
1792 } |
|
1793 |
|
1794 void LIR_OpAllocArray::print_instr(outputStream* out) const { |
|
1795 klass()->print(out); out->print(" "); |
|
1796 len()->print(out); out->print(" "); |
|
1797 obj()->print(out); out->print(" "); |
|
1798 tmp1()->print(out); out->print(" "); |
|
1799 tmp2()->print(out); out->print(" "); |
|
1800 tmp3()->print(out); out->print(" "); |
|
1801 tmp4()->print(out); out->print(" "); |
|
1802 out->print("[type:0x%x]", type()); out->print(" "); |
|
1803 out->print("[label:0x%x]", stub()->entry()); |
|
1804 } |
|
1805 |
|
1806 |
|
1807 void LIR_OpTypeCheck::print_instr(outputStream* out) const { |
|
1808 object()->print(out); out->print(" "); |
|
1809 if (code() == lir_store_check) { |
|
1810 array()->print(out); out->print(" "); |
|
1811 } |
|
1812 if (code() != lir_store_check) { |
|
1813 klass()->print_name_on(out); out->print(" "); |
|
1814 if (fast_check()) out->print("fast_check "); |
|
1815 } |
|
1816 tmp1()->print(out); out->print(" "); |
|
1817 tmp2()->print(out); out->print(" "); |
|
1818 tmp3()->print(out); out->print(" "); |
|
1819 result_opr()->print(out); out->print(" "); |
|
1820 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->bci()); |
|
1821 } |
|
1822 |
|
1823 |
|
1824 // LIR_Op3 |
|
1825 void LIR_Op3::print_instr(outputStream* out) const { |
|
1826 in_opr1()->print(out); out->print(" "); |
|
1827 in_opr2()->print(out); out->print(" "); |
|
1828 in_opr3()->print(out); out->print(" "); |
|
1829 result_opr()->print(out); |
|
1830 } |
|
1831 |
|
1832 |
|
1833 void LIR_OpLock::print_instr(outputStream* out) const { |
|
1834 hdr_opr()->print(out); out->print(" "); |
|
1835 obj_opr()->print(out); out->print(" "); |
|
1836 lock_opr()->print(out); out->print(" "); |
|
1837 if (_scratch->is_valid()) { |
|
1838 _scratch->print(out); out->print(" "); |
|
1839 } |
|
1840 out->print("[lbl:0x%x]", stub()->entry()); |
|
1841 } |
|
1842 |
|
1843 |
|
1844 void LIR_OpDelay::print_instr(outputStream* out) const { |
|
1845 _op->print_on(out); |
|
1846 } |
|
1847 |
|
1848 |
|
1849 // LIR_OpProfileCall |
|
1850 void LIR_OpProfileCall::print_instr(outputStream* out) const { |
|
1851 profiled_method()->name()->print_symbol_on(out); |
|
1852 out->print("."); |
|
1853 profiled_method()->holder()->name()->print_symbol_on(out); |
|
1854 out->print(" @ %d ", profiled_bci()); |
|
1855 mdo()->print(out); out->print(" "); |
|
1856 recv()->print(out); out->print(" "); |
|
1857 tmp1()->print(out); out->print(" "); |
|
1858 } |
|
1859 |
|
1860 |
|
1861 #endif // PRODUCT |
|
1862 |
|
1863 // Implementation of LIR_InsertionBuffer |
|
1864 |
|
1865 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { |
|
1866 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); |
|
1867 |
|
1868 int i = number_of_insertion_points() - 1; |
|
1869 if (i < 0 || index_at(i) < index) { |
|
1870 append_new(index, 1); |
|
1871 } else { |
|
1872 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); |
|
1873 assert(count_at(i) > 0, "check"); |
|
1874 set_count_at(i, count_at(i) + 1); |
|
1875 } |
|
1876 _ops.push(op); |
|
1877 |
|
1878 DEBUG_ONLY(verify()); |
|
1879 } |
|
1880 |
|
1881 #ifdef ASSERT |
|
1882 void LIR_InsertionBuffer::verify() { |
|
1883 int sum = 0; |
|
1884 int prev_idx = -1; |
|
1885 |
|
1886 for (int i = 0; i < number_of_insertion_points(); i++) { |
|
1887 assert(prev_idx < index_at(i), "index must be ordered ascending"); |
|
1888 sum += count_at(i); |
|
1889 } |
|
1890 assert(sum == number_of_ops(), "wrong total sum"); |
|
1891 } |
|
1892 #endif |