|
1 /* |
|
2 * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved. |
|
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
|
4 * |
|
5 * This code is free software; you can redistribute it and/or modify it |
|
6 * under the terms of the GNU General Public License version 2 only, as |
|
7 * published by the Free Software Foundation. |
|
8 * |
|
9 * This code is distributed in the hope that it will be useful, but WITHOUT |
|
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
12 * version 2 for more details (a copy is included in the LICENSE file that |
|
13 * accompanied this code). |
|
14 * |
|
15 * You should have received a copy of the GNU General Public License version |
|
16 * 2 along with this work; if not, write to the Free Software Foundation, |
|
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
|
18 * |
|
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
|
20 * CA 95054 USA or visit www.sun.com if you need additional information or |
|
21 * have any questions. |
|
22 * |
|
23 */ |
|
24 |
|
25 # include "incls/_precompiled.incl" |
|
26 # include "incls/_c1_FrameMap_x86.cpp.incl" |
|
27 |
|
28 const int FrameMap::pd_c_runtime_reserved_arg_size = 0; |
|
29 |
|
30 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) { |
|
31 LIR_Opr opr = LIR_OprFact::illegalOpr; |
|
32 VMReg r_1 = reg->first(); |
|
33 VMReg r_2 = reg->second(); |
|
34 if (r_1->is_stack()) { |
|
35 // Convert stack slot to an SP offset |
|
36 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value |
|
37 // so we must add it in here. |
|
38 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; |
|
39 opr = LIR_OprFact::address(new LIR_Address(rsp_opr, st_off, type)); |
|
40 } else if (r_1->is_Register()) { |
|
41 Register reg = r_1->as_Register(); |
|
42 if (r_2->is_Register()) { |
|
43 Register reg2 = r_2->as_Register(); |
|
44 opr = as_long_opr(reg2, reg); |
|
45 } else if (type == T_OBJECT) { |
|
46 opr = as_oop_opr(reg); |
|
47 } else { |
|
48 opr = as_opr(reg); |
|
49 } |
|
50 } else if (r_1->is_FloatRegister()) { |
|
51 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); |
|
52 int num = r_1->as_FloatRegister()->encoding(); |
|
53 if (type == T_FLOAT) { |
|
54 opr = LIR_OprFact::single_fpu(num); |
|
55 } else { |
|
56 opr = LIR_OprFact::double_fpu(num); |
|
57 } |
|
58 } else if (r_1->is_XMMRegister()) { |
|
59 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); |
|
60 int num = r_1->as_XMMRegister()->encoding(); |
|
61 if (type == T_FLOAT) { |
|
62 opr = LIR_OprFact::single_xmm(num); |
|
63 } else { |
|
64 opr = LIR_OprFact::double_xmm(num); |
|
65 } |
|
66 } else { |
|
67 ShouldNotReachHere(); |
|
68 } |
|
69 return opr; |
|
70 } |
|
71 |
|
72 |
|
73 LIR_Opr FrameMap::rsi_opr; |
|
74 LIR_Opr FrameMap::rdi_opr; |
|
75 LIR_Opr FrameMap::rbx_opr; |
|
76 LIR_Opr FrameMap::rax_opr; |
|
77 LIR_Opr FrameMap::rdx_opr; |
|
78 LIR_Opr FrameMap::rcx_opr; |
|
79 LIR_Opr FrameMap::rsp_opr; |
|
80 LIR_Opr FrameMap::rbp_opr; |
|
81 |
|
82 LIR_Opr FrameMap::receiver_opr; |
|
83 |
|
84 LIR_Opr FrameMap::rsi_oop_opr; |
|
85 LIR_Opr FrameMap::rdi_oop_opr; |
|
86 LIR_Opr FrameMap::rbx_oop_opr; |
|
87 LIR_Opr FrameMap::rax_oop_opr; |
|
88 LIR_Opr FrameMap::rdx_oop_opr; |
|
89 LIR_Opr FrameMap::rcx_oop_opr; |
|
90 |
|
91 LIR_Opr FrameMap::rax_rdx_long_opr; |
|
92 LIR_Opr FrameMap::rbx_rcx_long_opr; |
|
93 LIR_Opr FrameMap::fpu0_float_opr; |
|
94 LIR_Opr FrameMap::fpu0_double_opr; |
|
95 LIR_Opr FrameMap::xmm0_float_opr; |
|
96 LIR_Opr FrameMap::xmm0_double_opr; |
|
97 |
|
98 LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; |
|
99 LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, }; |
|
100 LIR_Opr FrameMap::_caller_save_xmm_regs[] = { 0, }; |
|
101 |
|
102 XMMRegister FrameMap::_xmm_regs [8] = { 0, }; |
|
103 |
|
104 XMMRegister FrameMap::nr2xmmreg(int rnr) { |
|
105 assert(_init_done, "tables not initialized"); |
|
106 return _xmm_regs[rnr]; |
|
107 } |
|
108 |
|
109 //-------------------------------------------------------- |
|
110 // FrameMap |
|
111 //-------------------------------------------------------- |
|
112 |
|
113 void FrameMap::init() { |
|
114 if (_init_done) return; |
|
115 |
|
116 assert(nof_cpu_regs == 8, "wrong number of CPU registers"); |
|
117 map_register(0, rsi); rsi_opr = LIR_OprFact::single_cpu(0); rsi_oop_opr = LIR_OprFact::single_cpu_oop(0); |
|
118 map_register(1, rdi); rdi_opr = LIR_OprFact::single_cpu(1); rdi_oop_opr = LIR_OprFact::single_cpu_oop(1); |
|
119 map_register(2, rbx); rbx_opr = LIR_OprFact::single_cpu(2); rbx_oop_opr = LIR_OprFact::single_cpu_oop(2); |
|
120 map_register(3, rax); rax_opr = LIR_OprFact::single_cpu(3); rax_oop_opr = LIR_OprFact::single_cpu_oop(3); |
|
121 map_register(4, rdx); rdx_opr = LIR_OprFact::single_cpu(4); rdx_oop_opr = LIR_OprFact::single_cpu_oop(4); |
|
122 map_register(5, rcx); rcx_opr = LIR_OprFact::single_cpu(5); rcx_oop_opr = LIR_OprFact::single_cpu_oop(5); |
|
123 map_register(6, rsp); rsp_opr = LIR_OprFact::single_cpu(6); |
|
124 map_register(7, rbp); rbp_opr = LIR_OprFact::single_cpu(7); |
|
125 |
|
126 rax_rdx_long_opr = LIR_OprFact::double_cpu(3 /*eax*/, 4 /*edx*/); |
|
127 rbx_rcx_long_opr = LIR_OprFact::double_cpu(2 /*ebx*/, 5 /*ecx*/); |
|
128 fpu0_float_opr = LIR_OprFact::single_fpu(0); |
|
129 fpu0_double_opr = LIR_OprFact::double_fpu(0); |
|
130 xmm0_float_opr = LIR_OprFact::single_xmm(0); |
|
131 xmm0_double_opr = LIR_OprFact::double_xmm(0); |
|
132 |
|
133 _caller_save_cpu_regs[0] = rsi_opr; |
|
134 _caller_save_cpu_regs[1] = rdi_opr; |
|
135 _caller_save_cpu_regs[2] = rbx_opr; |
|
136 _caller_save_cpu_regs[3] = rax_opr; |
|
137 _caller_save_cpu_regs[4] = rdx_opr; |
|
138 _caller_save_cpu_regs[5] = rcx_opr; |
|
139 |
|
140 |
|
141 _xmm_regs[0] = xmm0; |
|
142 _xmm_regs[1] = xmm1; |
|
143 _xmm_regs[2] = xmm2; |
|
144 _xmm_regs[3] = xmm3; |
|
145 _xmm_regs[4] = xmm4; |
|
146 _xmm_regs[5] = xmm5; |
|
147 _xmm_regs[6] = xmm6; |
|
148 _xmm_regs[7] = xmm7; |
|
149 |
|
150 for (int i = 0; i < 8; i++) { |
|
151 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); |
|
152 _caller_save_xmm_regs[i] = LIR_OprFact::single_xmm(i); |
|
153 } |
|
154 |
|
155 _init_done = true; |
|
156 |
|
157 VMRegPair regs; |
|
158 BasicType sig_bt = T_OBJECT; |
|
159 SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true); |
|
160 receiver_opr = as_oop_opr(regs.first()->as_Register()); |
|
161 assert(receiver_opr == rcx_oop_opr, "rcvr ought to be rcx"); |
|
162 } |
|
163 |
|
164 |
|
165 Address FrameMap::make_new_address(ByteSize sp_offset) const { |
|
166 // for rbp, based address use this: |
|
167 // return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4); |
|
168 return Address(rsp, in_bytes(sp_offset)); |
|
169 } |
|
170 |
|
171 |
|
172 // ----------------mapping----------------------- |
|
173 // all mapping is based on rbp, addressing, except for simple leaf methods where we access |
|
174 // the locals rsp based (and no frame is built) |
|
175 |
|
176 |
|
177 // Frame for simple leaf methods (quick entries) |
|
178 // |
|
179 // +----------+ |
|
180 // | ret addr | <- TOS |
|
181 // +----------+ |
|
182 // | args | |
|
183 // | ...... | |
|
184 |
|
185 // Frame for standard methods |
|
186 // |
|
187 // | .........| <- TOS |
|
188 // | locals | |
|
189 // +----------+ |
|
190 // | old rbp, | <- EBP |
|
191 // +----------+ |
|
192 // | ret addr | |
|
193 // +----------+ |
|
194 // | args | |
|
195 // | .........| |
|
196 |
|
197 |
|
198 // For OopMaps, map a local variable or spill index to an VMRegImpl name. |
|
199 // This is the offset from sp() in the frame of the slot for the index, |
|
200 // skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.) |
|
201 // |
|
202 // framesize + |
|
203 // stack0 stack0 0 <- VMReg |
|
204 // | | <registers> | |
|
205 // ...........|..............|.............| |
|
206 // 0 1 2 3 x x 4 5 6 ... | <- local indices |
|
207 // ^ ^ sp() ( x x indicate link |
|
208 // | | and return addr) |
|
209 // arguments non-argument locals |
|
210 |
|
211 |
|
212 VMReg FrameMap::fpu_regname (int n) { |
|
213 // Return the OptoReg name for the fpu stack slot "n" |
|
214 // A spilled fpu stack slot comprises to two single-word OptoReg's. |
|
215 return as_FloatRegister(n)->as_VMReg(); |
|
216 } |
|
217 |
|
218 LIR_Opr FrameMap::stack_pointer() { |
|
219 return FrameMap::rsp_opr; |
|
220 } |
|
221 |
|
222 |
|
223 bool FrameMap::validate_frame() { |
|
224 return true; |
|
225 } |