hotspot/src/cpu/x86/vm/register_x86.hpp
changeset 30624 2e1803c8a26d
parent 25715 d5a8dbdc5150
child 33160 c59f1676d27e
child 33105 294e48b4f704
equal deleted inserted replaced
30596:0322b394e7fd 30624:2e1803c8a26d
    43 class RegisterImpl: public AbstractRegisterImpl {
    43 class RegisterImpl: public AbstractRegisterImpl {
    44  public:
    44  public:
    45   enum {
    45   enum {
    46 #ifndef AMD64
    46 #ifndef AMD64
    47     number_of_registers      = 8,
    47     number_of_registers      = 8,
    48     number_of_byte_registers = 4
    48     number_of_byte_registers = 4,
       
    49     max_slots_per_register   = 1
    49 #else
    50 #else
    50     number_of_registers      = 16,
    51     number_of_registers      = 16,
    51     number_of_byte_registers = 16
    52     number_of_byte_registers = 16,
       
    53     max_slots_per_register   = 1
    52 #endif // AMD64
    54 #endif // AMD64
    53   };
    55   };
    54 
    56 
    55   // derived registers, offsets, and addresses
    57   // derived registers, offsets, and addresses
    56   Register successor() const                          { return as_Register(encoding() + 1); }
    58   Register successor() const                          { return as_Register(encoding() + 1); }
   141 // The implementation of XMM registers for the IA32 architecture
   143 // The implementation of XMM registers for the IA32 architecture
   142 class XMMRegisterImpl: public AbstractRegisterImpl {
   144 class XMMRegisterImpl: public AbstractRegisterImpl {
   143  public:
   145  public:
   144   enum {
   146   enum {
   145 #ifndef AMD64
   147 #ifndef AMD64
   146     number_of_registers = 8
   148     number_of_registers = 8,
       
   149     max_slots_per_register = 16   // 512-bit
   147 #else
   150 #else
   148     number_of_registers = 16
   151     number_of_registers = 32,
       
   152     max_slots_per_register = 16   // 512-bit
   149 #endif // AMD64
   153 #endif // AMD64
   150   };
   154   };
   151 
   155 
   152   // construction
   156   // construction
   153   friend XMMRegister as_XMMRegister(int encoding);
   157   friend XMMRegister as_XMMRegister(int encoding);
   181 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11,    (11));
   185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11,    (11));
   182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12,    (12));
   186 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm12,    (12));
   183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13,    (13));
   187 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm13,    (13));
   184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14,    (14));
   188 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm14,    (14));
   185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15,    (15));
   189 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm15,    (15));
       
   190 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm16,    (16));
       
   191 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm17,    (17));
       
   192 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm18,    (18));
       
   193 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm19,    (19));
       
   194 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm20,    (20));
       
   195 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm21,    (21));
       
   196 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm22,    (22));
       
   197 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm23,    (23));
       
   198 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm24,    (24));
       
   199 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm25,    (25));
       
   200 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm26,    (26));
       
   201 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm27,    (27));
       
   202 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm28,    (28));
       
   203 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm29,    (29));
       
   204 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm30,    (30));
       
   205 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm31,    (31));
   186 #endif // AMD64
   206 #endif // AMD64
   187 
   207 
   188 // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence
   208 // Only used by the 32bit stubGenerator. These can't be described by vmreg and hence
   189 // can't be described in oopMaps and therefore can't be used by the compilers (at least
   209 // can't be described in oopMaps and therefore can't be used by the compilers (at least
   190 // were deopt might wan't to see them).
   210 // were deopt might wan't to see them).
   198 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4));
   218 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx4 , ( 4));
   199 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5));
   219 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx5 , ( 5));
   200 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6));
   220 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx6 , ( 6));
   201 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7));
   221 CONSTANT_REGISTER_DECLARATION(MMXRegister, mmx7 , ( 7));
   202 
   222 
       
   223 // Use XMMRegister as shortcut
       
   224 class KRegisterImpl;
       
   225 typedef KRegisterImpl* KRegister;
       
   226 
       
   227 inline KRegister as_KRegister(int encoding) {
       
   228   return (KRegister)(intptr_t)encoding;
       
   229 }
       
   230 
       
   231 // The implementation of XMM registers for the IA32 architecture
       
   232 class KRegisterImpl : public AbstractRegisterImpl {
       
   233 public:
       
   234   enum {
       
   235     number_of_registers = 8,
       
   236     max_slots_per_register = 1
       
   237   };
       
   238 
       
   239   // construction
       
   240   friend KRegister as_KRegister(int encoding);
       
   241 
       
   242   inline VMReg as_VMReg();
       
   243 
       
   244   // derived registers, offsets, and addresses
       
   245   KRegister successor() const                          { return as_KRegister(encoding() + 1); }
       
   246 
       
   247   // accessors
       
   248   int   encoding() const                          { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this)); return (intptr_t)this; }
       
   249   bool  is_valid() const                          { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
       
   250   const char* name() const;
       
   251 };
       
   252 
       
   253 // The Mask registers, for AVX3 enabled and up chips
       
   254 CONSTANT_REGISTER_DECLARATION(KRegister, knoreg, (-1));
       
   255 CONSTANT_REGISTER_DECLARATION(KRegister, k0, (0));
       
   256 CONSTANT_REGISTER_DECLARATION(KRegister, k1, (1));
       
   257 CONSTANT_REGISTER_DECLARATION(KRegister, k2, (2));
       
   258 CONSTANT_REGISTER_DECLARATION(KRegister, k3, (3));
       
   259 CONSTANT_REGISTER_DECLARATION(KRegister, k4, (4));
       
   260 CONSTANT_REGISTER_DECLARATION(KRegister, k5, (5));
       
   261 CONSTANT_REGISTER_DECLARATION(KRegister, k6, (6));
       
   262 CONSTANT_REGISTER_DECLARATION(KRegister, k7, (7));
   203 
   263 
   204 // Need to know the total number of registers of all sorts for SharedInfo.
   264 // Need to know the total number of registers of all sorts for SharedInfo.
   205 // Define a class that exports it.
   265 // Define a class that exports it.
   206 class ConcreteRegisterImpl : public AbstractRegisterImpl {
   266 class ConcreteRegisterImpl : public AbstractRegisterImpl {
   207  public:
   267  public:
   209   // A big enough number for C2: all the registers plus flags
   269   // A big enough number for C2: all the registers plus flags
   210   // This number must be large enough to cover REG_COUNT (defined by c2) registers.
   270   // This number must be large enough to cover REG_COUNT (defined by c2) registers.
   211   // There is no requirement that any ordering here matches any ordering c2 gives
   271   // There is no requirement that any ordering here matches any ordering c2 gives
   212   // it's optoregs.
   272   // it's optoregs.
   213 
   273 
   214     number_of_registers =      RegisterImpl::number_of_registers +
   274     number_of_registers = RegisterImpl::number_of_registers +
   215 #ifdef AMD64
   275 #ifdef AMD64
   216                                RegisterImpl::number_of_registers +  // "H" half of a 64bit register
   276       RegisterImpl::number_of_registers +  // "H" half of a 64bit register
   217 #endif // AMD64
   277 #endif // AMD64
   218                            2 * FloatRegisterImpl::number_of_registers +
   278       2 * FloatRegisterImpl::number_of_registers +
   219                            8 * XMMRegisterImpl::number_of_registers +
   279       XMMRegisterImpl::max_slots_per_register * XMMRegisterImpl::number_of_registers +
   220                            1 // eflags
   280       KRegisterImpl::number_of_registers + // mask registers
       
   281       1 // eflags
   221   };
   282   };
   222 
   283 
   223   static const int max_gpr;
   284   static const int max_gpr;
   224   static const int max_fpr;
   285   static const int max_fpr;
   225   static const int max_xmm;
   286   static const int max_xmm;
       
   287   static const int max_kpr;
   226 
   288 
   227 };
   289 };
   228 
   290 
   229 #endif // CPU_X86_VM_REGISTER_X86_HPP
   291 #endif // CPU_X86_VM_REGISTER_X86_HPP