1 /*

     2  * Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    20  * or visit www.oracle.com if you need additional information or have any

    21  * questions.

    22  *

    23  */

    24 

    25 #ifndef CPU_ARM_VM_ICACHE_ARM_HPP

    26 #define CPU_ARM_VM_ICACHE_ARM_HPP

    27 

    28 // Interface for updating the instruction cache.  Whenever the VM modifies

    29 // code, part of the processor instruction cache potentially has to be flushed.

    30 

    31 class ICache : public AbstractICache {

    32  public:

    33   enum {

    34     stub_size      = 32,                // Size of the icache flush stub in bytes

    35     line_size      = BytesPerWord,      // conservative

    36     log2_line_size = LogBytesPerWord    // log2(line_size)

    37   };

    38 };

    39 

    40 #endif // CPU_ARM_VM_ICACHE_ARM_HPP