1 /*

     2  * Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.

     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

     4  *

     5  * This code is free software; you can redistribute it and/or modify it

     6  * under the terms of the GNU General Public License version 2 only, as

     7  * published by the Free Software Foundation.

     8  *

     9  * This code is distributed in the hope that it will be useful, but WITHOUT

    10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

    12  * version 2 for more details (a copy is included in the LICENSE file that

    13  * accompanied this code).

    14  *

    15  * You should have received a copy of the GNU General Public License version

    16  * 2 along with this work; if not, write to the Free Software Foundation,

    17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

    18  *

    19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

    20  * or visit www.oracle.com if you need additional information or have any

    21  * questions.

    22  *

    23  */

    24 

    25 #ifndef CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP

    26 #define CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP

    27 

    28  public:

    29 

    30   enum {

    31     first_available_sp_in_frame = 0,

    32     frame_pad_in_bytes = 2*wordSize      // Account for FP/LR saved at build_frame().

    33   };

    34 

    35   static LIR_Opr R0_opr;

    36   static LIR_Opr R1_opr;

    37   static LIR_Opr R2_opr;

    38   static LIR_Opr R3_opr;

    39   static LIR_Opr R4_opr;

    40   static LIR_Opr R5_opr;

    41   // add more predefined register oprs as needed

    42 

    43   static LIR_Opr R0_oop_opr;

    44   static LIR_Opr R1_oop_opr;

    45   static LIR_Opr R2_oop_opr;

    46   static LIR_Opr R3_oop_opr;

    47   static LIR_Opr R4_oop_opr;

    48   static LIR_Opr R5_oop_opr;

    49 

    50   static LIR_Opr R0_metadata_opr;

    51   static LIR_Opr R1_metadata_opr;

    52   static LIR_Opr R2_metadata_opr;

    53   static LIR_Opr R3_metadata_opr;

    54   static LIR_Opr R4_metadata_opr;

    55   static LIR_Opr R5_metadata_opr;

    56 

    57 #ifdef AARCH64

    58   static LIR_Opr ZR_opr;

    59 #endif // AARCH64

    60 

    61   static LIR_Opr LR_opr;

    62   static LIR_Opr LR_oop_opr;

    63   static LIR_Opr LR_ptr_opr;

    64 

    65   static LIR_Opr FP_opr;

    66   static LIR_Opr SP_opr;

    67   static LIR_Opr Rthread_opr;

    68 

    69   static LIR_Opr Int_result_opr;

    70   static LIR_Opr Long_result_opr;

    71   static LIR_Opr Object_result_opr;

    72   static LIR_Opr Float_result_opr;

    73   static LIR_Opr Double_result_opr;

    74 

    75   static LIR_Opr Exception_oop_opr;

    76   static LIR_Opr Exception_pc_opr;

    77 

    78 #ifdef AARCH64

    79   static LIR_Opr as_long_opr(Register r) {

    80     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));

    81   }

    82 

    83   static LIR_Opr as_pointer_opr(Register r) {

    84     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));

    85   }

    86 

    87   static LIR_Opr as_double_opr(FloatRegister r) {

    88     return LIR_OprFact::double_fpu(r->encoding());

    89   }

    90 #else

    91   static LIR_Opr as_long_opr(Register r, Register r2) {

    92     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));

    93   }

    94 

    95   static LIR_Opr as_pointer_opr(Register r) {

    96     return LIR_OprFact::single_cpu(cpu_reg2rnr(r));

    97   }

    98 

    99   static LIR_Opr as_double_opr(FloatRegister r) {

   100     return LIR_OprFact::double_fpu(r->encoding(), r->successor()->encoding());

   101   }

   102 #endif

   103 

   104   static LIR_Opr as_float_opr(FloatRegister r) {

   105     return LIR_OprFact::single_fpu(r->encoding());

   106   }

   107 

   108   static VMReg fpu_regname(int n);

   109 

   110   static bool is_caller_save_register(LIR_Opr opr) {

   111     return true;

   112   }

   113 

   114   static int adjust_reg_range(int range) {

   115     // Reduce the number of available regs (to free Rheap_base) in case of compressed oops

   116     if (UseCompressedOops || UseCompressedClassPointers) return range - 1;

   117     return range;

   118   }

   119 

   120   static int nof_caller_save_cpu_regs() {

   121     return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map);

   122   }

   123 

   124   static int last_cpu_reg() {

   125     return pd_last_cpu_reg;

   126   }

   127 

   128 #endif // CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP