hotspot/src/cpu/x86/vm/x86_32.ad
changeset 17095 24f63661bb5e
parent 17094 29c4955396d2
parent 17008 fe66415573bf
child 20289 35d78de0c547
child 20282 7f9cbdf89af2
child 22832 03720a5b7595
equal deleted inserted replaced
17094:29c4955396d2 17095:24f63661bb5e
     1 //
     1 //
     2 // Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
     2 // Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
     3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4 //
     4 //
     5 // This code is free software; you can redistribute it and/or modify it
     5 // This code is free software; you can redistribute it and/or modify it
     6 // under the terms of the GNU General Public License version 2 only, as
     6 // under the terms of the GNU General Public License version 2 only, as
     7 // published by the Free Software Foundation.
     7 // published by the Free Software Foundation.
  2278     // ADD $p,$tmp
  2278     // ADD $p,$tmp
  2279     emit_opcode(cbuf,0x03);
  2279     emit_opcode(cbuf,0x03);
  2280     emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
  2280     emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
  2281   %}
  2281   %}
  2282 
  2282 
  2283   enc_class enc_cmpLTP_mem(rRegI p, rRegI q, memory mem, eCXRegI tmp) %{    // cadd_cmpLT
       
  2284     int tmpReg = $tmp$$reg;
       
  2285 
       
  2286     // SUB $p,$q
       
  2287     emit_opcode(cbuf,0x2B);
       
  2288     emit_rm(cbuf, 0x3, $p$$reg, $q$$reg);
       
  2289     // SBB $tmp,$tmp
       
  2290     emit_opcode(cbuf,0x1B);
       
  2291     emit_rm(cbuf, 0x3, tmpReg, tmpReg);
       
  2292     // AND $tmp,$y
       
  2293     cbuf.set_insts_mark();       // Mark start of opcode for reloc info in mem operand
       
  2294     emit_opcode(cbuf,0x23);
       
  2295     int reg_encoding = tmpReg;
       
  2296     int base  = $mem$$base;
       
  2297     int index = $mem$$index;
       
  2298     int scale = $mem$$scale;
       
  2299     int displace = $mem$$disp;
       
  2300     relocInfo::relocType disp_reloc = $mem->disp_reloc();
       
  2301     encode_RegMem(cbuf, reg_encoding, base, index, scale, displace, disp_reloc);
       
  2302     // ADD $p,$tmp
       
  2303     emit_opcode(cbuf,0x03);
       
  2304     emit_rm(cbuf, 0x3, $p$$reg, tmpReg);
       
  2305   %}
       
  2306 
       
  2307   enc_class shift_left_long( eRegL dst, eCXRegI shift ) %{
  2283   enc_class shift_left_long( eRegL dst, eCXRegI shift ) %{
  2308     // TEST shift,32
  2284     // TEST shift,32
  2309     emit_opcode(cbuf,0xF7);
  2285     emit_opcode(cbuf,0xF7);
  2310     emit_rm(cbuf, 0x3, 0, ECX_enc);
  2286     emit_rm(cbuf, 0x3, 0, ECX_enc);
  2311     emit_d32(cbuf,0x20);
  2287     emit_d32(cbuf,0x20);
  8883     movP_nocopy(dst,src);
  8859     movP_nocopy(dst,src);
  8884     cp2b(dst,src,cr);
  8860     cp2b(dst,src,cr);
  8885   %}
  8861   %}
  8886 %}
  8862 %}
  8887 
  8863 
  8888 instruct cmpLTMask( eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr ) %{
  8864 instruct cmpLTMask(eCXRegI dst, ncxRegI p, ncxRegI q, eFlagsReg cr) %{
  8889   match(Set dst (CmpLTMask p q));
  8865   match(Set dst (CmpLTMask p q));
  8890   effect( KILL cr );
  8866   effect(KILL cr);
  8891   ins_cost(400);
  8867   ins_cost(400);
  8892 
  8868 
  8893   // SETlt can only use low byte of EAX,EBX, ECX, or EDX as destination
  8869   // SETlt can only use low byte of EAX,EBX, ECX, or EDX as destination
  8894   format %{ "XOR    $dst,$dst\n\t"
  8870   format %{ "XOR    $dst,$dst\n\t"
  8895             "CMP    $p,$q\n\t"
  8871             "CMP    $p,$q\n\t"
  8896             "SETlt  $dst\n\t"
  8872             "SETlt  $dst\n\t"
  8897             "NEG    $dst" %}
  8873             "NEG    $dst" %}
  8898   ins_encode( OpcRegReg(0x33,dst,dst),
  8874   ins_encode %{
  8899               OpcRegReg(0x3B,p,q),
  8875     Register Rp = $p$$Register;
  8900               setLT_reg(dst), neg_reg(dst) );
  8876     Register Rq = $q$$Register;
  8901   ins_pipe( pipe_slow );
  8877     Register Rd = $dst$$Register;
  8902 %}
  8878     Label done;
  8903 
  8879     __ xorl(Rd, Rd);
  8904 instruct cmpLTMask0( rRegI dst, immI0 zero, eFlagsReg cr ) %{
  8880     __ cmpl(Rp, Rq);
       
  8881     __ setb(Assembler::less, Rd);
       
  8882     __ negl(Rd);
       
  8883   %}
       
  8884 
       
  8885   ins_pipe(pipe_slow);
       
  8886 %}
       
  8887 
       
  8888 instruct cmpLTMask0(rRegI dst, immI0 zero, eFlagsReg cr) %{
  8905   match(Set dst (CmpLTMask dst zero));
  8889   match(Set dst (CmpLTMask dst zero));
  8906   effect( DEF dst, KILL cr );
  8890   effect(DEF dst, KILL cr);
  8907   ins_cost(100);
  8891   ins_cost(100);
  8908 
  8892 
  8909   format %{ "SAR    $dst,31" %}
  8893   format %{ "SAR    $dst,31\t# cmpLTMask0" %}
  8910   opcode(0xC1, 0x7);  /* C1 /7 ib */
  8894   ins_encode %{
  8911   ins_encode( RegOpcImm( dst, 0x1F ) );
  8895   __ sarl($dst$$Register, 31);
  8912   ins_pipe( ialu_reg );
  8896   %}
  8913 %}
  8897   ins_pipe(ialu_reg);
  8914 
  8898 %}
  8915 
  8899 
  8916 instruct cadd_cmpLTMask( ncxRegI p, ncxRegI q, ncxRegI y, eCXRegI tmp, eFlagsReg cr ) %{
  8900 /* better to save a register than avoid a branch */
       
  8901 instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
  8917   match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
  8902   match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
  8918   effect( KILL tmp, KILL cr );
  8903   effect(KILL cr);
  8919   ins_cost(400);
  8904   ins_cost(400);
  8920   // annoyingly, $tmp has no edges so you cant ask for it in
  8905   format %{ "SUB    $p,$q\t# cadd_cmpLTMask\n\t"
  8921   // any format or encoding
  8906             "JGE    done\n\t"
  8922   format %{ "SUB    $p,$q\n\t"
  8907             "ADD    $p,$y\n"
  8923             "SBB    ECX,ECX\n\t"
  8908             "done:  " %}
  8924             "AND    ECX,$y\n\t"
  8909   ins_encode %{
  8925             "ADD    $p,ECX" %}
  8910     Register Rp = $p$$Register;
  8926   ins_encode( enc_cmpLTP(p,q,y,tmp) );
  8911     Register Rq = $q$$Register;
  8927   ins_pipe( pipe_cmplt );
  8912     Register Ry = $y$$Register;
       
  8913     Label done;
       
  8914     __ subl(Rp, Rq);
       
  8915     __ jccb(Assembler::greaterEqual, done);
       
  8916     __ addl(Rp, Ry);
       
  8917     __ bind(done);
       
  8918   %}
       
  8919 
       
  8920   ins_pipe(pipe_cmplt);
       
  8921 %}
       
  8922 
       
  8923 /* better to save a register than avoid a branch */
       
  8924 instruct and_cmpLTMask(rRegI p, rRegI q, rRegI y, eFlagsReg cr) %{
       
  8925   match(Set y (AndI (CmpLTMask p q) y));
       
  8926   effect(KILL cr);
       
  8927 
       
  8928   ins_cost(300);
       
  8929 
       
  8930   format %{ "CMPL     $p, $q\t# and_cmpLTMask\n\t"
       
  8931             "JLT      done\n\t"
       
  8932             "XORL     $y, $y\n"
       
  8933             "done:  " %}
       
  8934   ins_encode %{
       
  8935     Register Rp = $p$$Register;
       
  8936     Register Rq = $q$$Register;
       
  8937     Register Ry = $y$$Register;
       
  8938     Label done;
       
  8939     __ cmpl(Rp, Rq);
       
  8940     __ jccb(Assembler::less, done);
       
  8941     __ xorl(Ry, Ry);
       
  8942     __ bind(done);
       
  8943   %}
       
  8944 
       
  8945   ins_pipe(pipe_cmplt);
  8928 %}
  8946 %}
  8929 
  8947 
  8930 /* If I enable this, I encourage spilling in the inner loop of compress.
  8948 /* If I enable this, I encourage spilling in the inner loop of compress.
  8931 instruct cadd_cmpLTMask_mem( ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr ) %{
  8949 instruct cadd_cmpLTMask_mem(ncxRegI p, ncxRegI q, memory y, eCXRegI tmp, eFlagsReg cr) %{
  8932   match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q)));
  8950   match(Set p (AddI (AndI (CmpLTMask p q) (LoadI y)) (SubI p q)));
  8933   effect( USE_KILL tmp, KILL cr );
       
  8934   ins_cost(400);
       
  8935 
       
  8936   format %{ "SUB    $p,$q\n\t"
       
  8937             "SBB    ECX,ECX\n\t"
       
  8938             "AND    ECX,$y\n\t"
       
  8939             "ADD    $p,ECX" %}
       
  8940   ins_encode( enc_cmpLTP_mem(p,q,y,tmp) );
       
  8941 %}
       
  8942 */
  8951 */
  8943 
  8952 
  8944 //----------Long Instructions------------------------------------------------
  8953 //----------Long Instructions------------------------------------------------
  8945 // Add Long Register with Register
  8954 // Add Long Register with Register
  8946 instruct addL_eReg(eRegL dst, eRegL src, eFlagsReg cr) %{
  8955 instruct addL_eReg(eRegL dst, eRegL src, eFlagsReg cr) %{