680             lrg._is_bound = 1;

   680             lrg._is_bound = 1;

   681           }

   681           }

   682           break;

   682           break;

   683         case Op_RegF:

   683         case Op_RegF:

   684         case Op_RegI:

   684         case Op_RegI:

   685         case Op_RegFlags:

   686         case Op_RegFlags:

   686         case 0:                 // not an ideal register

   687         case 0:                 // not an ideal register

   687           lrg.set_num_regs(1);

   688           lrg.set_num_regs(1);

   688 #ifdef SPARC

   689 #ifdef SPARC

   689           lrg.set_reg_pressure(2);

   690           lrg.set_reg_pressure(2);