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1840 |
1840 |
1841 // Should the Matcher clone shifts on addressing modes, expecting them to |
1841 // Should the Matcher clone shifts on addressing modes, expecting them to |
1842 // be subsumed into complex addressing expressions or compute them into |
1842 // be subsumed into complex addressing expressions or compute them into |
1843 // registers? True for Intel but false for most RISCs |
1843 // registers? True for Intel but false for most RISCs |
1844 const bool Matcher::clone_shift_expressions = false; |
1844 const bool Matcher::clone_shift_expressions = false; |
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1845 |
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1846 // Do we need to mask the count passed to shift instructions or does |
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1847 // the cpu only look at the lower 5/6 bits anyway? |
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1848 const bool Matcher::need_masked_shift_count = false; |
1845 |
1849 |
1846 bool Matcher::narrow_oop_use_complex_address() { |
1850 bool Matcher::narrow_oop_use_complex_address() { |
1847 NOT_LP64(ShouldNotCallThis()); |
1851 NOT_LP64(ShouldNotCallThis()); |
1848 assert(UseCompressedOops, "only for compressed oops code"); |
1852 assert(UseCompressedOops, "only for compressed oops code"); |
1849 return false; |
1853 return false; |