hotspot/src/cpu/sparc/vm/sparc.ad
changeset 8868 1bae515b806b
parent 8324 a9933c6c5a95
child 10027 20cd71f29262
equal deleted inserted replaced
8866:8e33f415f111 8868:1bae515b806b
  1840 
  1840 
  1841 // Should the Matcher clone shifts on addressing modes, expecting them to
  1841 // Should the Matcher clone shifts on addressing modes, expecting them to
  1842 // be subsumed into complex addressing expressions or compute them into
  1842 // be subsumed into complex addressing expressions or compute them into
  1843 // registers?  True for Intel but false for most RISCs
  1843 // registers?  True for Intel but false for most RISCs
  1844 const bool Matcher::clone_shift_expressions = false;
  1844 const bool Matcher::clone_shift_expressions = false;
       
  1845 
       
  1846 // Do we need to mask the count passed to shift instructions or does
       
  1847 // the cpu only look at the lower 5/6 bits anyway?
       
  1848 const bool Matcher::need_masked_shift_count = false;
  1845 
  1849 
  1846 bool Matcher::narrow_oop_use_complex_address() {
  1850 bool Matcher::narrow_oop_use_complex_address() {
  1847   NOT_LP64(ShouldNotCallThis());
  1851   NOT_LP64(ShouldNotCallThis());
  1848   assert(UseCompressedOops, "only for compressed oops code");
  1852   assert(UseCompressedOops, "only for compressed oops code");
  1849   return false;
  1853   return false;