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src/hotspot/cpu/x86/x86.ad
changeset 48309 1a0499fd252e
parent 48089 22c9856fc2c2
child 49384 b242a1e3f9cf
equal deleted inserted replaced
48308:00bd985f3dec 48309:1a0499fd252e 
  1261     case Op_CompareAndSwapP:
 
  1261     case Op_CompareAndSwapP:
 
  1262 #endif
 
  1262 #endif
 
  1263       if (!VM_Version::supports_cx8())
 
  1263       if (!VM_Version::supports_cx8())
 
  1264         ret_value = false;
 
  1264         ret_value = false;
 
  1265       break;
 
  1265       break;
 
       
  1266     case Op_CMoveVF:
 
  1266     case Op_CMoveVD:
 
  1267     case Op_CMoveVD:
 
  1267       if (UseAVX < 1 || UseAVX > 2)
 
  1268       if (UseAVX < 1 || UseAVX > 2)
 
  1268         ret_value = false;
 
  1269         ret_value = false;
 
  1269       break;
 
  1270       break;
 
  1270     case Op_StrIndexOf:
 
  1271     case Op_StrIndexOf:
 
  1302       case Op_AddVS:
 
  1303       case Op_AddVS:
 
  1303       case Op_SubVS:
 
  1304       case Op_SubVS:
 
  1304         if ((vlen == 32) && (VM_Version::supports_avx512bw() == false))
 
  1305         if ((vlen == 32) && (VM_Version::supports_avx512bw() == false))
 
  1305           ret_value = false;
 
  1306           ret_value = false;
 
  1306         break;
 
  1307         break;
 
       
  1308       case Op_CMoveVF:
 
       
  1309         if (vlen != 8)
 
       
  1310           ret_value  = false;
 
  1307       case Op_CMoveVD:
 
  1311       case Op_CMoveVD:
 
  1308         if (vlen != 4)
 
  1312         if (vlen != 4)
 
  1309           ret_value  = false;
 
  1313           ret_value  = false;
 
  1310         break;
 
  1314         break;
 
  1311     }
 
  1315     }
 
  8168     __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector_len);
 
  8172     __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector_len);
 
  8169   %}
 
  8173   %}
 
  8170   ins_pipe( pipe_slow );
 
  8174   ins_pipe( pipe_slow );
 
  8171 %}
 
  8175 %}
 
  8172 
  8176 
       
  8177 instruct vcmov8F_reg(vecY dst, vecY src1, vecY src2, immI8 cop, cmpOp_vcmppd copnd) %{
 
       
  8178   predicate(UseAVX > 0 && UseAVX < 3 && n->as_Vector()->length() == 8);
 
       
  8179   match(Set dst (CMoveVF (Binary copnd cop) (Binary src1 src2)));
 
       
  8180   effect(TEMP dst, USE src1, USE src2);
 
       
  8181   format %{ "cmpps.$copnd  $dst, $src1, $src2  ! vcmovevf, cond=$cop\n\t"
 
       
  8182             "blendvps $dst,$src1,$src2,$dst ! vcmovevf\n\t"
 
       
  8183          %}
 
       
  8184   ins_encode %{
 
       
  8185     int vector_len = 1;
 
       
  8186     int cond = (Assembler::Condition)($copnd$$cmpcode);
 
       
  8187     __ cmpps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, cond, vector_len);
 
       
  8188     __ blendvps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, $dst$$XMMRegister, vector_len);
 
       
  8189   %}
 
       
  8190   ins_pipe( pipe_slow );
 
       
  8191 %}
 
       
  8192 
  8173 instruct vcmov4D_reg(vecY dst, vecY src1, vecY src2, immI8 cop, cmpOp_vcmppd copnd) %{
 
  8193 instruct vcmov4D_reg(vecY dst, vecY src1, vecY src2, immI8 cop, cmpOp_vcmppd copnd) %{
 
  8174   predicate(UseAVX > 0 && UseAVX < 3 && n->as_Vector()->length() == 4);
 
  8194   predicate(UseAVX > 0 && UseAVX < 3 && n->as_Vector()->length() == 4);
 
  8175   match(Set dst (CMoveVD (Binary copnd cop) (Binary src1 src2)));
 
  8195   match(Set dst (CMoveVD (Binary copnd cop) (Binary src1 src2)));
 
  8176   effect(TEMP dst, USE src1, USE src2);
 
  8196   effect(TEMP dst, USE src1, USE src2);
 
  8177   format %{ "cmppd.$copnd  $dst, $src1, $src2  ! vcmovevd, cond=$cop\n\t"
 
  8197   format %{ "cmppd.$copnd  $dst, $src1, $src2  ! vcmovevd, cond=$cop\n\t"
jdk-sandbox