jdk-sandbox: comparison src/hotspot/cpu/x86/macroAssembler

equal deleted inserted replaced

-:0c2e1808f800
+:14fa9e70ae71
 assert(tmpReg == rax, "");
 assert(scrReg == rdx, "");
 Label L_rtm_retry, L_decrement_retry, L_on_abort;
 int owner_offset = OM_OFFSET_NO_MONITOR_VALUE_TAG(owner);
-// Without cast to int32_t a movptr will destroy r10 which is typically obj
+// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
 movptr(Address(boxReg, 0), (int32_t)intptr_t(markWord::unused_mark().value()));
 movptr(boxReg, tmpReg); // Save ObjectMonitor address
 if (RTMRetryCount > 0) {
 movl(retry_on_busy_count_Reg, RTMRetryCount);  // Retry on lock busy
 }
 }
 #endif //  INCLUDE_RTM_OPT
-// Fast_Lock and Fast_Unlock used by C2
+// fast_lock and fast_unlock used by C2
 // Because the transitions from emitted code to the runtime
 // monitorenter/exit helper stubs are so slow it's critical that
-// we inline both the stack-locking fast-path and the inflated fast path.
+// we inline both the stack-locking fast path and the inflated fast path.
 //
 // See also: cmpFastLock and cmpFastUnlock.
 //
 // What follows is a specialized inline transliteration of the code
 // in enter() and exit(). If we're concerned about I$ bloat another
 // option would be to emit TrySlowEnter and TrySlowExit methods
 // at startup-time.  These methods would accept arguments as
 // (rax,=Obj, rbx=Self, rcx=box, rdx=Scratch) and return success-failure
-// indications in the icc.ZFlag.  Fast_Lock and Fast_Unlock would simply
+// indications in the icc.ZFlag.  fast_lock and fast_unlock would simply
 // marshal the arguments and emit calls to TrySlowEnter and TrySlowExit.
 // In practice, however, the # of lock sites is bounded and is usually small.
 // Besides the call overhead, TrySlowEnter and TrySlowExit might suffer
 // if the processor uses simple bimodal branch predictors keyed by EIP
 // Since the helper routines would be called from multiple synchronization
 // to (a) prevent compiler-JIT reordering of non-volatile accesses, and
 // (b) explicit barriers or fence operations.
 //
 // TODO:
 //
-// *  Arrange for C2 to pass "Self" into Fast_Lock and Fast_Unlock in one of the registers (scr).
+// *  Arrange for C2 to pass "Self" into fast_lock and fast_unlock in one of the registers (scr).
-//    This avoids manifesting the Self pointer in the Fast_Lock and Fast_Unlock terminals.
+//    This avoids manifesting the Self pointer in the fast_lock and fast_unlock terminals.
 //    Given TLAB allocation, Self is usually manifested in a register, so passing it into
 //    the lock operators would typically be faster than reifying Self.
 //
 // *  Ideally I'd define the primitives as:
 //       fast_lock   (nax Obj, nax box, EAX tmp, nax scr) where box, tmp and scr are KILLED.
 //    avoid the expensive JNI call to JVM_Notify() and JVM_NotifyAll().
 //
 // *  use jccb and jmpb instead of jcc and jmp to improve code density.
 //    But beware of excessive branch density on AMD Opterons.
 //
-// *  Both Fast_Lock and Fast_Unlock set the ICC.ZF to indicate success
+// *  Both fast_lock and fast_unlock set the ICC.ZF to indicate success
-//    or failure of the fast-path.  If the fast-path fails then we pass
+//    or failure of the fast path.  If the fast path fails then we pass
-//    control to the slow-path, typically in C.  In Fast_Lock and
+//    control to the slow path, typically in C.  In fast_lock and
-//    Fast_Unlock we often branch to DONE_LABEL, just to find that C2
+//    fast_unlock we often branch to DONE_LABEL, just to find that C2
 //    will emit a conditional branch immediately after the node.
 //    So we have branches to branches and lots of ICC.ZF games.
 //    Instead, it might be better to have C2 pass a "FailureLabel"
-//    into Fast_Lock and Fast_Unlock.  In the case of success, control
+//    into fast_lock and fast_unlock.  In the case of success, control
 //    will drop through the node.  ICC.ZF is undefined at exit.
 //    In the case of failure, the node will branch directly to the
 //    FailureLabel
 // update _owner from BasicLock to thread
 get_thread (scrReg);                    // beware: clobbers ICCs
 movptr(Address(boxReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), scrReg);
 xorptr(boxReg, boxReg);                 // set icc.ZFlag = 1 to indicate success
-// If the CAS fails we can either retry or pass control to the slow-path.
+// If the CAS fails we can either retry or pass control to the slow path.
 // We use the latter tactic.
 // Pass the CAS result in the icc.ZFlag into DONE_LABEL
 // If the CAS was successful ...
 //   Self has acquired the lock
 //   Invariant: m->_recursions should already be 0, so we don't need to explicitly set it.
 // Intentional fall-through into DONE_LABEL ...
 #else // _LP64
-// It's inflated
+// It's inflated and we use scrReg for ObjectMonitor* in this section.
 movq(scrReg, tmpReg);
 xorq(tmpReg, tmpReg);
 lock();
 cmpxchgptr(r15_thread, Address(scrReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
 // Unconditionally set box->_displaced_header = markWord::unused_mark().
-// Without cast to int32_t movptr will destroy r10 which is typically obj.
+// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
 movptr(Address(boxReg, 0), (int32_t)intptr_t(markWord::unused_mark().value()));
 // Intentional fall-through into DONE_LABEL ...
 // Propagate ICC.ZF from CAS above into DONE_LABEL.
 #endif // _LP64
 #if INCLUDE_RTM_OPT
 // most efficient "long" NOP encodings.
 // Unfortunately none of our alignment mechanisms suffice.
 bind(DONE_LABEL);
 // At DONE_LABEL the icc ZFlag is set as follows ...
-// Fast_Unlock uses the same protocol.
+// fast_unlock uses the same protocol.
 // ZFlag == 1 -> Success
-// ZFlag == 0 -> Failure - force control through the slow-path
+// ZFlag == 0 -> Failure - force control through the slow path
 }
 // obj: object to unlock
 // box: box address (displaced header location), killed.  Must be EAX.
 // tmp: killed, cannot be obj nor box.
 //
 // Some commentary on balanced locking:
 //
-// Fast_Lock and Fast_Unlock are emitted only for provably balanced lock sites.
+// fast_lock and fast_unlock are emitted only for provably balanced lock sites.
 // Methods that don't have provably balanced locking are forced to run in the
 // interpreter - such methods won't be compiled to use fast_lock and fast_unlock.
 // The interpreter provides two properties:
 // I1:  At return-time the interpreter automatically and quietly unlocks any
 //      objects acquired the current activation (frame).  Recall that the
 // The only other source of unbalanced locking would be JNI.  The "Java Native Interface:
 // Programmer's Guide and Specification" claims that an object locked by jni_monitorenter
 // should not be unlocked by "normal" java-level locking and vice-versa.  The specification
 // doesn't specify what will occur if a program engages in such mixed-mode locking, however.
 // Arguably given that the spec legislates the JNI case as undefined our implementation
-// could reasonably *avoid* checking owner in Fast_Unlock().
+// could reasonably *avoid* checking owner in fast_unlock().
 // In the interest of performance we elide m->Owner==Self check in unlock.
 // A perfectly viable alternative is to elide the owner check except when
 // Xcheck:jni is enabled.
 void MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register tmpReg, bool use_rtm) {
 //
 // If there's no contention try a 1-0 exit.  That is, exit without
 // a costly MEMBAR or CAS.  See synchronizer.cpp for details on how
 // we detect and recover from the race that the 1-0 exit admits.
 //
-// Conceptually Fast_Unlock() must execute a STST|LDST "release" barrier
+// Conceptually fast_unlock() must execute a STST|LDST "release" barrier
 // before it STs null into _owner, releasing the lock.  Updates
 // to data protected by the critical section must be visible before
 // we drop the lock (and thus before any other thread could acquire
 // the lock and observe the fields protected by the lock).
 // IA32's memory-model is SPO, so STs are ordered with respect to
 orptr(boxReg, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)));
 jccb  (Assembler::notZero, DONE_LABEL);
 movptr(boxReg, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)));
 orptr(boxReg, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)));
 jccb  (Assembler::notZero, CheckSucc);
+// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
 movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), (int32_t)NULL_WORD);
 jmpb  (DONE_LABEL);
 // Try to avoid passing control into the slow_path ...
 Label LSuccess, LGoSlowPath ;
 bind  (CheckSucc);
 // The following optional optimization can be elided if necessary
-// Effectively: if (succ == null) goto SlowPath
+// Effectively: if (succ == null) goto slow path
 // The code reduces the window for a race, however,
 // and thus benefits performance.
 cmpptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), (int32_t)NULL_WORD);
 jccb  (Assembler::zero, LGoSlowPath);
 xorptr(boxReg, boxReg);
+// Without cast to int32_t this style of movptr will destroy r10 which is typically obj.
 movptr(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), (int32_t)NULL_WORD);
 // Memory barrier/fence
 // Dekker pivot point -- fulcrum : ST Owner; MEMBAR; LD Succ
 // Instead of MFENCE we use a dummy locked add of 0 to the top-of-stack.
 cmpxchgptr(r15_thread, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
 // There's no successor so we tried to regrab the lock.
 // If that didn't work, then another thread grabbed the
 // lock so we're done (and exit was a success).
 jccb  (Assembler::notEqual, LSuccess);
-// Intentional fall-through into slow-path
+// Intentional fall-through into slow path
 bind  (LGoSlowPath);
 orl   (boxReg, 1);                      // set ICC.ZF=0 to indicate failure
 jmpb  (DONE_LABEL);

changeset 59156	14fa9e70ae71
parent 58977	c6a789f495fe