9826 

  9826 instruct powD_reg(regD dst, regD src0, regD src1, rax_RegI rax, rdx_RegI rdx, rcx_RegI rcx, rFlagsReg cr) %{

  9827   match(Set dst (PowD src0 src1));  // Raise src0 to the src1'th power

  9828   effect(KILL rax, KILL rdx, KILL rcx, KILL cr);

  9829   format %{ "fast_pow $src0 $src1 -> $dst  // KILL $rax, $rcx, $rdx" %}

  9830   ins_encode %{

  9831     __ subptr(rsp, 8);

  9832     __ movdbl(Address(rsp, 0), $src1$$XMMRegister);

  9833     __ fld_d(Address(rsp, 0));

  9834     __ movdbl(Address(rsp, 0), $src0$$XMMRegister);

  9835     __ fld_d(Address(rsp, 0));

  9836     __ fast_pow();

  9837     __ fstp_d(Address(rsp, 0));

  9838     __ movdbl($dst$$XMMRegister, Address(rsp, 0));

  9839     __ addptr(rsp, 8);

  9840   %}

  9841   ins_pipe( pipe_slow );

  9842 %}

  9843 

  9844 instruct expD_reg(regD dst, regD src, rax_RegI rax, rdx_RegI rdx, rcx_RegI rcx, rFlagsReg cr) %{

  9845   match(Set dst (ExpD src));

  9846   effect(KILL rax, KILL rcx, KILL rdx, KILL cr);

  9847   format %{ "fast_exp $dst -> $src  // KILL $rax, $rcx, $rdx" %}

  9848   ins_encode %{

  9849     __ subptr(rsp, 8);

  9850     __ movdbl(Address(rsp, 0), $src$$XMMRegister);

  9851     __ fld_d(Address(rsp, 0));

  9852     __ fast_exp();

  9853     __ fstp_d(Address(rsp, 0));

  9854     __ movdbl($dst$$XMMRegister, Address(rsp, 0));

  9855     __ addptr(rsp, 8);

  9856   %}

  9857   ins_pipe( pipe_slow );

  9858 %}