src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64HotSpotReturnOp.java
changeset 59095 03fbcd06b4c0
parent 51228 087c3ba2d138
equal deleted inserted replaced
59094:5d4c3724e4c7 59095:03fbcd06b4c0
     1 /*
     1 /*
     2  * Copyright (c) 2012, 2018, Oracle and/or its affiliates. All rights reserved.
     2  * Copyright (c) 2012, 2019, Oracle and/or its affiliates. All rights reserved.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
     4  *
     4  *
     5  * This code is free software; you can redistribute it and/or modify it
     5  * This code is free software; you can redistribute it and/or modify it
     6  * under the terms of the GNU General Public License version 2 only, as
     6  * under the terms of the GNU General Public License version 2 only, as
     7  * published by the Free Software Foundation.
     7  * published by the Free Software Foundation.
   109             /*
   109             /*
   110              * We potentially return to the interpreter, and that's an AVX-SSE transition. The only
   110              * We potentially return to the interpreter, and that's an AVX-SSE transition. The only
   111              * live value at this point should be the return value in either rax, or in xmm0 with
   111              * live value at this point should be the return value in either rax, or in xmm0 with
   112              * the upper half of the register unused, so we don't destroy any value here.
   112              * the upper half of the register unused, so we don't destroy any value here.
   113              */
   113              */
   114             if (masm.supports(CPUFeature.AVX)) {
   114             if (masm.supports(CPUFeature.AVX) && crb.needsClearUpperVectorRegisters()) {
       
   115                 // If we decide to perform vzeroupper also for stubs (like what JDK9+ C2 does for
       
   116                 // intrinsics that employ AVX2 instruction), we need to be careful that it kills all
       
   117                 // the xmm registers (at least the upper halves).
   115                 masm.vzeroupper();
   118                 masm.vzeroupper();
   116             }
   119             }
   117         }
   120         }
   118         masm.ret(0);
   121         masm.ret(0);
   119     }
   122     }
       
   123 
   120 }
   124 }