970 add(tmp, tmp, offset); |
970 add(tmp, tmp, offset); |
971 |
971 |
972 return RegisterOrConstant(tmp); |
972 return RegisterOrConstant(tmp); |
973 } |
973 } |
974 |
974 |
975 |
|
976 void MacroAssembler:: notify(int type) { |
|
977 if (type == bytecode_start) { |
|
978 // set_last_Java_frame(esp, rfp, (address)NULL); |
|
979 Assembler:: notify(type); |
|
980 // reset_last_Java_frame(true); |
|
981 } |
|
982 else |
|
983 Assembler:: notify(type); |
|
984 } |
|
985 |
|
986 // Look up the method for a megamorphic invokeinterface call. |
975 // Look up the method for a megamorphic invokeinterface call. |
987 // The target method is determined by <intf_klass, itable_index>. |
976 // The target method is determined by <intf_klass, itable_index>. |
988 // The receiver klass is in recv_klass. |
977 // The receiver klass is in recv_klass. |
989 // On success, the result will be in method_result, and execution falls through. |
978 // On success, the result will be in method_result, and execution falls through. |
990 // On failure, execution transfers to the given label. |
979 // On failure, execution transfers to the given label. |
1423 } |
1412 } |
1424 |
1413 |
1425 void MacroAssembler::call_VM_leaf_base(address entry_point, |
1414 void MacroAssembler::call_VM_leaf_base(address entry_point, |
1426 int number_of_arguments, |
1415 int number_of_arguments, |
1427 Label *retaddr) { |
1416 Label *retaddr) { |
1428 call_VM_leaf_base1(entry_point, number_of_arguments, 0, ret_type_integral, retaddr); |
|
1429 } |
|
1430 |
|
1431 void MacroAssembler::call_VM_leaf_base1(address entry_point, |
|
1432 int number_of_gp_arguments, |
|
1433 int number_of_fp_arguments, |
|
1434 ret_type type, |
|
1435 Label *retaddr) { |
|
1436 Label E, L; |
1417 Label E, L; |
1437 |
1418 |
1438 stp(rscratch1, rmethod, Address(pre(sp, -2 * wordSize))); |
1419 stp(rscratch1, rmethod, Address(pre(sp, -2 * wordSize))); |
1439 |
1420 |
1440 // We add 1 to number_of_arguments because the thread in arg0 is |
|
1441 // not counted |
|
1442 mov(rscratch1, entry_point); |
1421 mov(rscratch1, entry_point); |
1443 blrt(rscratch1, number_of_gp_arguments + 1, number_of_fp_arguments, type); |
1422 blr(rscratch1); |
1444 if (retaddr) |
1423 if (retaddr) |
1445 bind(*retaddr); |
1424 bind(*retaddr); |
1446 |
1425 |
1447 ldp(rscratch1, rmethod, Address(post(sp, 2 * wordSize))); |
1426 ldp(rscratch1, rmethod, Address(post(sp, 2 * wordSize))); |
1448 maybe_isb(); |
1427 maybe_isb(); |
2196 pusha(); |
2175 pusha(); |
2197 mov(c_rarg0, (address)msg); |
2176 mov(c_rarg0, (address)msg); |
2198 mov(c_rarg1, (address)ip); |
2177 mov(c_rarg1, (address)ip); |
2199 mov(c_rarg2, sp); |
2178 mov(c_rarg2, sp); |
2200 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64)); |
2179 mov(c_rarg3, CAST_FROM_FN_PTR(address, MacroAssembler::debug64)); |
2201 // call(c_rarg3); |
2180 blr(c_rarg3); |
2202 blrt(c_rarg3, 3, 0, 1); |
|
2203 hlt(0); |
2181 hlt(0); |
2204 } |
2182 } |
2205 |
2183 |
2206 void MacroAssembler::warn(const char* msg) { |
2184 void MacroAssembler::warn(const char* msg) { |
2207 pusha(); |
2185 pusha(); |
2208 mov(c_rarg0, (address)msg); |
2186 mov(c_rarg0, (address)msg); |
2209 mov(lr, CAST_FROM_FN_PTR(address, warning)); |
2187 mov(lr, CAST_FROM_FN_PTR(address, warning)); |
2210 blrt(lr, 1, 0, MacroAssembler::ret_type_void); |
2188 blr(lr); |
2211 popa(); |
2189 popa(); |
2212 } |
2190 } |
2213 |
2191 |
2214 void MacroAssembler::unimplemented(const char* what) { |
2192 void MacroAssembler::unimplemented(const char* what) { |
2215 const char* buf = NULL; |
2193 const char* buf = NULL; |
2585 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", |
2563 ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", |
2586 msg); |
2564 msg); |
2587 assert(false, "DEBUG MESSAGE: %s", msg); |
2565 assert(false, "DEBUG MESSAGE: %s", msg); |
2588 } |
2566 } |
2589 } |
2567 } |
2590 |
|
2591 #ifdef BUILTIN_SIM |
|
2592 // routine to generate an x86 prolog for a stub function which |
|
2593 // bootstraps into the generated ARM code which directly follows the |
|
2594 // stub |
|
2595 // |
|
2596 // the argument encodes the number of general and fp registers |
|
2597 // passed by the caller and the callng convention (currently just |
|
2598 // the number of general registers and assumes C argument passing) |
|
2599 |
|
2600 extern "C" { |
|
2601 int aarch64_stub_prolog_size(); |
|
2602 void aarch64_stub_prolog(); |
|
2603 void aarch64_prolog(); |
|
2604 } |
|
2605 |
|
2606 void MacroAssembler::c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type, |
|
2607 address *prolog_ptr) |
|
2608 { |
|
2609 int calltype = (((ret_type & 0x3) << 8) | |
|
2610 ((fp_arg_count & 0xf) << 4) | |
|
2611 (gp_arg_count & 0xf)); |
|
2612 |
|
2613 // the addresses for the x86 to ARM entry code we need to use |
|
2614 address start = pc(); |
|
2615 // printf("start = %lx\n", start); |
|
2616 int byteCount = aarch64_stub_prolog_size(); |
|
2617 // printf("byteCount = %x\n", byteCount); |
|
2618 int instructionCount = (byteCount + 3)/ 4; |
|
2619 // printf("instructionCount = %x\n", instructionCount); |
|
2620 for (int i = 0; i < instructionCount; i++) { |
|
2621 nop(); |
|
2622 } |
|
2623 |
|
2624 memcpy(start, (void*)aarch64_stub_prolog, byteCount); |
|
2625 |
|
2626 // write the address of the setup routine and the call format at the |
|
2627 // end of into the copied code |
|
2628 u_int64_t *patch_end = (u_int64_t *)(start + byteCount); |
|
2629 if (prolog_ptr) |
|
2630 patch_end[-2] = (u_int64_t)prolog_ptr; |
|
2631 patch_end[-1] = calltype; |
|
2632 } |
|
2633 #endif |
|
2634 |
2568 |
2635 void MacroAssembler::push_call_clobbered_registers() { |
2569 void MacroAssembler::push_call_clobbered_registers() { |
2636 int step = 4 * wordSize; |
2570 int step = 4 * wordSize; |
2637 push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp); |
2571 push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp); |
2638 sub(sp, sp, step); |
2572 sub(sp, sp, step); |
5676 NEXT_32_START, NEXT_32_PRFM_START; |
5610 NEXT_32_START, NEXT_32_PRFM_START; |
5677 Register tmp1 = rscratch1, tmp2 = rscratch2; |
5611 Register tmp1 = rscratch1, tmp2 = rscratch2; |
5678 |
5612 |
5679 mov(result, len); // Save initial len |
5613 mov(result, len); // Save initial len |
5680 |
5614 |
5681 #ifndef BUILTIN_SIM |
|
5682 cmp(len, (u1)8); // handle shortest strings first |
5615 cmp(len, (u1)8); // handle shortest strings first |
5683 br(LT, LOOP_1); |
5616 br(LT, LOOP_1); |
5684 cmp(len, (u1)32); |
5617 cmp(len, (u1)32); |
5685 br(LT, NEXT_8); |
5618 br(LT, NEXT_8); |
5686 // The following code uses the SIMD 'uzp1' and 'uzp2' instructions |
5619 // The following code uses the SIMD 'uzp1' and 'uzp2' instructions |
5891 void MacroAssembler::get_thread(Register dst) { |
5824 void MacroAssembler::get_thread(Register dst) { |
5892 RegSet saved_regs = RegSet::range(r0, r1) + lr - dst; |
5825 RegSet saved_regs = RegSet::range(r0, r1) + lr - dst; |
5893 push(saved_regs, sp); |
5826 push(saved_regs, sp); |
5894 |
5827 |
5895 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)); |
5828 mov(lr, CAST_FROM_FN_PTR(address, JavaThread::aarch64_get_thread_helper)); |
5896 blrt(lr, 1, 0, 1); |
5829 blr(lr); |
5897 if (dst != c_rarg0) { |
5830 if (dst != c_rarg0) { |
5898 mov(dst, c_rarg0); |
5831 mov(dst, c_rarg0); |
5899 } |
5832 } |
5900 |
5833 |
5901 pop(saved_regs, sp); |
5834 pop(saved_regs, sp); |