author | stefank |
Thu, 09 May 2019 14:28:30 +0200 | |
changeset 54786 | ebf733a324d4 |
parent 53244 | 9807daeb47c4 |
permissions | -rw-r--r-- |
40010 | 1 |
/* |
53244
9807daeb47c4
8216167: Update include guards to reflect correct directories
coleenp
parents:
47216
diff
changeset
|
2 |
* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved. |
40010 | 3 |
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 |
* |
|
5 |
* This code is free software; you can redistribute it and/or modify it |
|
6 |
* under the terms of the GNU General Public License version 2 only, as |
|
7 |
* published by the Free Software Foundation. |
|
8 |
* |
|
9 |
* This code is distributed in the hope that it will be useful, but WITHOUT |
|
10 |
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
11 |
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
12 |
* version 2 for more details (a copy is included in the LICENSE file that |
|
13 |
* accompanied this code). |
|
14 |
* |
|
15 |
* You should have received a copy of the GNU General Public License version |
|
16 |
* 2 along with this work; if not, write to the Free Software Foundation, |
|
17 |
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
|
18 |
* |
|
19 |
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
20 |
* or visit www.oracle.com if you need additional information or have any |
|
21 |
* questions. |
|
22 |
* |
|
23 |
*/ |
|
24 |
||
53244
9807daeb47c4
8216167: Update include guards to reflect correct directories
coleenp
parents:
47216
diff
changeset
|
25 |
#ifndef CPU_ZERO_MACROASSEMBLER_ZERO_INLINE_HPP |
9807daeb47c4
8216167: Update include guards to reflect correct directories
coleenp
parents:
47216
diff
changeset
|
26 |
#define CPU_ZERO_MACROASSEMBLER_ZERO_INLINE_HPP |
40010 | 27 |
|
28 |
// Needed for includes in shared files. |
|
29 |
||
53244
9807daeb47c4
8216167: Update include guards to reflect correct directories
coleenp
parents:
47216
diff
changeset
|
30 |
#endif // CPU_ZERO_MACROASSEMBLER_ZERO_INLINE_HPP |