/*

 * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.

 * Copyright (c) 2012, 2016 SAP SE. All rights reserved.

 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.

 *

 * This code is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 only, as

 * published by the Free Software Foundation.

 *

 * This code is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * version 2 for more details (a copy is included in the LICENSE file that

 * accompanied this code).

 *

 * You should have received a copy of the GNU General Public License version

 * 2 along with this work; if not, write to the Free Software Foundation,

 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.

 *

 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA

 * or visit www.oracle.com if you need additional information or have any

 * questions.

 *

 */

#include "precompiled.hpp"

#include "asm/macroAssembler.inline.hpp"

#include "code/debugInfoRec.hpp"

#include "code/icBuffer.hpp"

#include "code/vtableStubs.hpp"

#include "frame_ppc.hpp"

#include "interpreter/interpreter.hpp"

#include "interpreter/interp_masm.hpp"

#include "memory/resourceArea.hpp"

#include "oops/compiledICHolder.hpp"

#include "prims/jvmtiRedefineClassesTrace.hpp"

#include "runtime/sharedRuntime.hpp"

#include "runtime/vframeArray.hpp"

#include "vmreg_ppc.inline.hpp"

#ifdef COMPILER1

#include "c1/c1_Runtime1.hpp"

#endif

#ifdef COMPILER2

#include "adfiles/ad_ppc_64.hpp"

#include "opto/runtime.hpp"

#endif

#include <alloca.h>

#define __ masm->

#ifdef PRODUCT

#define BLOCK_COMMENT(str) // nothing

#else

#define BLOCK_COMMENT(str) __ block_comment(str)

#endif

#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")

class RegisterSaver {

 // Used for saving volatile registers.

 public:

  // Support different return pc locations.

  enum ReturnPCLocation {

    return_pc_is_lr,

    return_pc_is_pre_saved,

    return_pc_is_thread_saved_exception_pc

  };

  static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,

                         int* out_frame_size_in_bytes,

                         bool generate_oop_map,

                         int return_pc_adjustment,

                         ReturnPCLocation return_pc_location);

  static void    restore_live_registers_and_pop_frame(MacroAssembler* masm,

                         int frame_size_in_bytes,

                         bool restore_ctr);

  static void push_frame_and_save_argument_registers(MacroAssembler* masm,

                         Register r_temp,

                         int frame_size,

                         int total_args,

                         const VMRegPair *regs, const VMRegPair *regs2 = NULL);

  static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,

                         int frame_size,

                         int total_args,

                         const VMRegPair *regs, const VMRegPair *regs2 = NULL);

  // During deoptimization only the result registers need to be restored

  // all the other values have already been extracted.

  static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);

  // Constants and data structures:

  typedef enum {

    int_reg           = 0,

    float_reg         = 1,

    special_reg       = 2

  } RegisterType;

  typedef enum {

    reg_size          = 8,

    half_reg_size     = reg_size / 2,

  } RegisterConstants;

  typedef struct {

    RegisterType        reg_type;

    int                 reg_num;

    VMReg               vmreg;

  } LiveRegType;

};

#define RegisterSaver_LiveSpecialReg(regname) \

  { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }

#define RegisterSaver_LiveIntReg(regname) \

  { RegisterSaver::int_reg,     regname->encoding(), regname->as_VMReg() }

#define RegisterSaver_LiveFloatReg(regname) \

  { RegisterSaver::float_reg,   regname->encoding(), regname->as_VMReg() }

static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {

  // Live registers which get spilled to the stack. Register

  // positions in this array correspond directly to the stack layout.

  //

  // live special registers:

  //

  RegisterSaver_LiveSpecialReg(SR_CTR),

  //

  // live float registers:

  //

  RegisterSaver_LiveFloatReg( F0  ),

  RegisterSaver_LiveFloatReg( F1  ),

  RegisterSaver_LiveFloatReg( F2  ),

  RegisterSaver_LiveFloatReg( F3  ),

  RegisterSaver_LiveFloatReg( F4  ),

  RegisterSaver_LiveFloatReg( F5  ),

  RegisterSaver_LiveFloatReg( F6  ),

  RegisterSaver_LiveFloatReg( F7  ),

  RegisterSaver_LiveFloatReg( F8  ),

  RegisterSaver_LiveFloatReg( F9  ),

  RegisterSaver_LiveFloatReg( F10 ),

  RegisterSaver_LiveFloatReg( F11 ),

  RegisterSaver_LiveFloatReg( F12 ),

  RegisterSaver_LiveFloatReg( F13 ),

  RegisterSaver_LiveFloatReg( F14 ),

  RegisterSaver_LiveFloatReg( F15 ),

  RegisterSaver_LiveFloatReg( F16 ),

  RegisterSaver_LiveFloatReg( F17 ),

  RegisterSaver_LiveFloatReg( F18 ),

  RegisterSaver_LiveFloatReg( F19 ),

  RegisterSaver_LiveFloatReg( F20 ),

  RegisterSaver_LiveFloatReg( F21 ),

  RegisterSaver_LiveFloatReg( F22 ),

  RegisterSaver_LiveFloatReg( F23 ),

  RegisterSaver_LiveFloatReg( F24 ),

  RegisterSaver_LiveFloatReg( F25 ),

  RegisterSaver_LiveFloatReg( F26 ),

  RegisterSaver_LiveFloatReg( F27 ),

  RegisterSaver_LiveFloatReg( F28 ),

  RegisterSaver_LiveFloatReg( F29 ),

  RegisterSaver_LiveFloatReg( F30 ),

  RegisterSaver_LiveFloatReg( F31 ),

  //

  // live integer registers:

  //

  RegisterSaver_LiveIntReg(   R0  ),

  //RegisterSaver_LiveIntReg( R1  ), // stack pointer

  RegisterSaver_LiveIntReg(   R2  ),

  RegisterSaver_LiveIntReg(   R3  ),

  RegisterSaver_LiveIntReg(   R4  ),

  RegisterSaver_LiveIntReg(   R5  ),

  RegisterSaver_LiveIntReg(   R6  ),

  RegisterSaver_LiveIntReg(   R7  ),

  RegisterSaver_LiveIntReg(   R8  ),

  RegisterSaver_LiveIntReg(   R9  ),

  RegisterSaver_LiveIntReg(   R10 ),

  RegisterSaver_LiveIntReg(   R11 ),

  RegisterSaver_LiveIntReg(   R12 ),

  //RegisterSaver_LiveIntReg( R13 ), // system thread id

  RegisterSaver_LiveIntReg(   R14 ),

  RegisterSaver_LiveIntReg(   R15 ),

  RegisterSaver_LiveIntReg(   R16 ),

  RegisterSaver_LiveIntReg(   R17 ),

  RegisterSaver_LiveIntReg(   R18 ),

  RegisterSaver_LiveIntReg(   R19 ),

  RegisterSaver_LiveIntReg(   R20 ),

  RegisterSaver_LiveIntReg(   R21 ),

  RegisterSaver_LiveIntReg(   R22 ),

  RegisterSaver_LiveIntReg(   R23 ),

  RegisterSaver_LiveIntReg(   R24 ),

  RegisterSaver_LiveIntReg(   R25 ),

  RegisterSaver_LiveIntReg(   R26 ),

  RegisterSaver_LiveIntReg(   R27 ),

  RegisterSaver_LiveIntReg(   R28 ),

  RegisterSaver_LiveIntReg(   R29 ),

  RegisterSaver_LiveIntReg(   R30 ),

  RegisterSaver_LiveIntReg(   R31 ), // must be the last register (see save/restore functions below)

};

OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,

                         int* out_frame_size_in_bytes,

                         bool generate_oop_map,

                         int return_pc_adjustment,

                         ReturnPCLocation return_pc_location) {

  // Push an abi_reg_args-frame and store all registers which may be live.

  // If requested, create an OopMap: Record volatile registers as

  // callee-save values in an OopMap so their save locations will be

  // propagated to the RegisterMap of the caller frame during

  // StackFrameStream construction (needed for deoptimization; see

  // compiledVFrame::create_stack_value).

  // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.

  int i;

  int offset;

  // calcualte frame size

  const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /

                                   sizeof(RegisterSaver::LiveRegType);

  const int register_save_size   = regstosave_num * reg_size;

  const int frame_size_in_bytes  = round_to(register_save_size, frame::alignment_in_bytes)

                                   + frame::abi_reg_args_size;

  *out_frame_size_in_bytes       = frame_size_in_bytes;

  const int frame_size_in_slots  = frame_size_in_bytes / sizeof(jint);

  const int register_save_offset = frame_size_in_bytes - register_save_size;

  // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.

  OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;

  BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");

  // Save r31 in the last slot of the not yet pushed frame so that we

  // can use it as scratch reg.

  __ std(R31, -reg_size, R1_SP);

  assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),

         "consistency check");

  // save the flags

  // Do the save_LR_CR by hand and adjust the return pc if requested.

  __ mfcr(R31);

  __ std(R31, _abi(cr), R1_SP);

  switch (return_pc_location) {

    case return_pc_is_lr: __ mflr(R31); break;

    case return_pc_is_pre_saved: assert(return_pc_adjustment == 0, "unsupported"); break;

    case return_pc_is_thread_saved_exception_pc: __ ld(R31, thread_(saved_exception_pc)); break;

    default: ShouldNotReachHere();

  }

  if (return_pc_location != return_pc_is_pre_saved) {

    if (return_pc_adjustment != 0) {

      __ addi(R31, R31, return_pc_adjustment);

    }

    __ std(R31, _abi(lr), R1_SP);

  }

  // push a new frame

  __ push_frame(frame_size_in_bytes, R31);

  // save all registers (ints and floats)

  offset = register_save_offset;

  for (int i = 0; i < regstosave_num; i++) {

    int reg_num  = RegisterSaver_LiveRegs[i].reg_num;

    int reg_type = RegisterSaver_LiveRegs[i].reg_type;

    switch (reg_type) {

      case RegisterSaver::int_reg: {

        if (reg_num != 31) { // We spilled R31 right at the beginning.

          __ std(as_Register(reg_num), offset, R1_SP);

        }

        break;

      }

      case RegisterSaver::float_reg: {

        __ stfd(as_FloatRegister(reg_num), offset, R1_SP);

        break;

      }

      case RegisterSaver::special_reg: {

        if (reg_num == SR_CTR_SpecialRegisterEnumValue) {

          __ mfctr(R31);

          __ std(R31, offset, R1_SP);

        } else {

          Unimplemented();

        }

        break;

      }

      default:

        ShouldNotReachHere();

    }

    if (generate_oop_map) {

      map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),

                            RegisterSaver_LiveRegs[i].vmreg);

      map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),

                            RegisterSaver_LiveRegs[i].vmreg->next());

    }

    offset += reg_size;

  }

  BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");

  // And we're done.

  return map;

}

// Pop the current frame and restore all the registers that we

// saved.

void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,

                                                         int frame_size_in_bytes,

                                                         bool restore_ctr) {

  int i;

  int offset;

  const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /

                                   sizeof(RegisterSaver::LiveRegType);

  const int register_save_size   = regstosave_num * reg_size;

  const int register_save_offset = frame_size_in_bytes - register_save_size;

  BLOCK_COMMENT("restore_live_registers_and_pop_frame {");

  // restore all registers (ints and floats)

  offset = register_save_offset;

  for (int i = 0; i < regstosave_num; i++) {

    int reg_num  = RegisterSaver_LiveRegs[i].reg_num;

    int reg_type = RegisterSaver_LiveRegs[i].reg_type;

    switch (reg_type) {

      case RegisterSaver::int_reg: {

        if (reg_num != 31) // R31 restored at the end, it's the tmp reg!

          __ ld(as_Register(reg_num), offset, R1_SP);

        break;

      }

      case RegisterSaver::float_reg: {

        __ lfd(as_FloatRegister(reg_num), offset, R1_SP);

        break;

      }

      case RegisterSaver::special_reg: {

        if (reg_num == SR_CTR_SpecialRegisterEnumValue) {

          if (restore_ctr) { // Nothing to do here if ctr already contains the next address.

            __ ld(R31, offset, R1_SP);

            __ mtctr(R31);

          }

        } else {

          Unimplemented();

        }

        break;

      }

      default:

        ShouldNotReachHere();

    }

    offset += reg_size;

  }

  // pop the frame

  __ pop_frame();

  // restore the flags

  __ restore_LR_CR(R31);

  // restore scratch register's value

  __ ld(R31, -reg_size, R1_SP);

  BLOCK_COMMENT("} restore_live_registers_and_pop_frame");

}

void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,

                                                           int frame_size,int total_args, const VMRegPair *regs,

                                                           const VMRegPair *regs2) {

  __ push_frame(frame_size, r_temp);

  int st_off = frame_size - wordSize;

  for (int i = 0; i < total_args; i++) {

    VMReg r_1 = regs[i].first();

    VMReg r_2 = regs[i].second();

    if (!r_1->is_valid()) {

      assert(!r_2->is_valid(), "");

      continue;

    }

    if (r_1->is_Register()) {

      Register r = r_1->as_Register();

      __ std(r, st_off, R1_SP);

      st_off -= wordSize;

    } else if (r_1->is_FloatRegister()) {

      FloatRegister f = r_1->as_FloatRegister();

      __ stfd(f, st_off, R1_SP);

      st_off -= wordSize;

    }

  }

  if (regs2 != NULL) {

    for (int i = 0; i < total_args; i++) {

      VMReg r_1 = regs2[i].first();

      VMReg r_2 = regs2[i].second();

      if (!r_1->is_valid()) {

        assert(!r_2->is_valid(), "");

        continue;

      }

      if (r_1->is_Register()) {

        Register r = r_1->as_Register();

        __ std(r, st_off, R1_SP);

        st_off -= wordSize;

      } else if (r_1->is_FloatRegister()) {

        FloatRegister f = r_1->as_FloatRegister();

        __ stfd(f, st_off, R1_SP);

        st_off -= wordSize;

      }

    }

  }

}

void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,

                                                             int total_args, const VMRegPair *regs,

                                                             const VMRegPair *regs2) {

  int st_off = frame_size - wordSize;

  for (int i = 0; i < total_args; i++) {

    VMReg r_1 = regs[i].first();

    VMReg r_2 = regs[i].second();

    if (r_1->is_Register()) {

      Register r = r_1->as_Register();

      __ ld(r, st_off, R1_SP);

      st_off -= wordSize;

    } else if (r_1->is_FloatRegister()) {

      FloatRegister f = r_1->as_FloatRegister();

      __ lfd(f, st_off, R1_SP);

      st_off -= wordSize;

    }

  }

  if (regs2 != NULL)

    for (int i = 0; i < total_args; i++) {

      VMReg r_1 = regs2[i].first();

      VMReg r_2 = regs2[i].second();

      if (r_1->is_Register()) {

        Register r = r_1->as_Register();

        __ ld(r, st_off, R1_SP);

        st_off -= wordSize;

      } else if (r_1->is_FloatRegister()) {

        FloatRegister f = r_1->as_FloatRegister();

        __ lfd(f, st_off, R1_SP);

        st_off -= wordSize;

      }

    }

  __ pop_frame();

}

// Restore the registers that might be holding a result.

void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {

  int i;

  int offset;

  const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /

                                   sizeof(RegisterSaver::LiveRegType);

  const int register_save_size   = regstosave_num * reg_size;

  const int register_save_offset = frame_size_in_bytes - register_save_size;

  // restore all result registers (ints and floats)

  offset = register_save_offset;

  for (int i = 0; i < regstosave_num; i++) {

    int reg_num  = RegisterSaver_LiveRegs[i].reg_num;

    int reg_type = RegisterSaver_LiveRegs[i].reg_type;

    switch (reg_type) {

      case RegisterSaver::int_reg: {

        if (as_Register(reg_num)==R3_RET) // int result_reg

          __ ld(as_Register(reg_num), offset, R1_SP);

        break;

      }

      case RegisterSaver::float_reg: {

        if (as_FloatRegister(reg_num)==F1_RET) // float result_reg

          __ lfd(as_FloatRegister(reg_num), offset, R1_SP);

        break;

      }

      case RegisterSaver::special_reg: {

        // Special registers don't hold a result.

        break;

      }

      default:

        ShouldNotReachHere();

    }

    offset += reg_size;

  }

}

// Is vector's size (in bytes) bigger than a size saved by default?

bool SharedRuntime::is_wide_vector(int size) {

  // Note, MaxVectorSize == 8 on PPC64.

  assert(size <= 8, "%d bytes vectors are not supported", size);

  return size > 8;

}

#ifdef COMPILER2

static int reg2slot(VMReg r) {

  return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();

}

static int reg2offset(VMReg r) {

  return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;

}

#endif

// ---------------------------------------------------------------------------

// Read the array of BasicTypes from a signature, and compute where the

// arguments should go. Values in the VMRegPair regs array refer to 4-byte

// quantities. Values less than VMRegImpl::stack0 are registers, those above

// refer to 4-byte stack slots. All stack slots are based off of the stack pointer

// as framesizes are fixed.

// VMRegImpl::stack0 refers to the first slot 0(sp).

// and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register

// up to RegisterImpl::number_of_registers) are the 64-bit

// integer registers.

// Note: the INPUTS in sig_bt are in units of Java argument words, which are

// either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit

// units regardless of build. Of course for i486 there is no 64 bit build