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/*
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* Copyright 1999-2008 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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#include "incls/_precompiled.incl"
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#include "incls/_c1_CodeStubs_x86.cpp.incl"
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#define __ ce->masm()->
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float ConversionStub::float_zero = 0.0;
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double ConversionStub::double_zero = 0.0;
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void ConversionStub::emit_code(LIR_Assembler* ce) {
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__ bind(_entry);
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assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
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if (input()->is_single_xmm()) {
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__ comiss(input()->as_xmm_float_reg(),
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ExternalAddress((address)&float_zero));
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} else if (input()->is_double_xmm()) {
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__ comisd(input()->as_xmm_double_reg(),
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ExternalAddress((address)&double_zero));
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} else {
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LP64_ONLY(ShouldNotReachHere());
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__ push(rax);
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1
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__ ftst();
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__ fnstsw_ax();
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__ sahf();
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__ pop(rax);
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1
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}
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Label NaN, do_return;
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__ jccb(Assembler::parity, NaN);
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__ jccb(Assembler::below, do_return);
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// input is > 0 -> return maxInt
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// result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
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__ decrement(result()->as_register());
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__ jmpb(do_return);
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// input is NaN -> return 0
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__ bind(NaN);
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__ xorptr(result()->as_register(), result()->as_register());
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__ bind(do_return);
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__ jmp(_continuation);
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}
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#ifdef TIERED
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void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
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__ bind(_entry);
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ce->store_parameter(_bci, 0);
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
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ce->add_call_info_here(_info);
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ce->verify_oop_map(_info);
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__ jmp(_continuation);
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}
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#endif // TIERED
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RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
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bool throw_index_out_of_bounds_exception)
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: _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
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, _index(index)
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{
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_info = info == NULL ? NULL : new CodeEmitInfo(info);
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}
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void RangeCheckStub::emit_code(LIR_Assembler* ce) {
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__ bind(_entry);
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// pass the array index on stack because all registers must be preserved
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if (_index->is_cpu_register()) {
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ce->store_parameter(_index->as_register(), 0);
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} else {
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ce->store_parameter(_index->as_jint(), 0);
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}
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Runtime1::StubID stub_id;
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if (_throw_index_out_of_bounds_exception) {
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stub_id = Runtime1::throw_index_exception_id;
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} else {
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stub_id = Runtime1::throw_range_check_failed_id;
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}
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__ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
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ce->add_call_info_here(_info);
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debug_only(__ should_not_reach_here());
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}
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void DivByZeroStub::emit_code(LIR_Assembler* ce) {
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if (_offset != -1) {
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ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
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}
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__ bind(_entry);
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
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ce->add_call_info_here(_info);
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debug_only(__ should_not_reach_here());
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}
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// Implementation of NewInstanceStub
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NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
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_result = result;
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_klass = klass;
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_klass_reg = klass_reg;
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_info = new CodeEmitInfo(info);
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assert(stub_id == Runtime1::new_instance_id ||
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stub_id == Runtime1::fast_new_instance_id ||
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stub_id == Runtime1::fast_new_instance_init_check_id,
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"need new_instance id");
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_stub_id = stub_id;
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}
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void NewInstanceStub::emit_code(LIR_Assembler* ce) {
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assert(__ rsp_offset() == 0, "frame size should be fixed");
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__ bind(_entry);
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__ movptr(rdx, _klass_reg->as_register());
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__ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
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ce->add_call_info_here(_info);
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ce->verify_oop_map(_info);
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assert(_result->as_register() == rax, "result must in rax,");
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__ jmp(_continuation);
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}
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// Implementation of NewTypeArrayStub
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NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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_klass_reg = klass_reg;
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_length = length;
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_result = result;
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_info = new CodeEmitInfo(info);
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}
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void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
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assert(__ rsp_offset() == 0, "frame size should be fixed");
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__ bind(_entry);
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assert(_length->as_register() == rbx, "length must in rbx,");
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assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
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ce->add_call_info_here(_info);
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ce->verify_oop_map(_info);
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assert(_result->as_register() == rax, "result must in rax,");
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__ jmp(_continuation);
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}
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// Implementation of NewObjectArrayStub
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NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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_klass_reg = klass_reg;
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_result = result;
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_length = length;
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_info = new CodeEmitInfo(info);
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}
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void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
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assert(__ rsp_offset() == 0, "frame size should be fixed");
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__ bind(_entry);
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assert(_length->as_register() == rbx, "length must in rbx,");
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assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
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ce->add_call_info_here(_info);
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ce->verify_oop_map(_info);
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assert(_result->as_register() == rax, "result must in rax,");
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__ jmp(_continuation);
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}
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// Implementation of MonitorAccessStubs
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MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
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: MonitorAccessStub(obj_reg, lock_reg)
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{
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_info = new CodeEmitInfo(info);
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}
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void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
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assert(__ rsp_offset() == 0, "frame size should be fixed");
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__ bind(_entry);
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ce->store_parameter(_obj_reg->as_register(), 1);
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ce->store_parameter(_lock_reg->as_register(), 0);
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Runtime1::StubID enter_id;
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if (ce->compilation()->has_fpu_code()) {
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enter_id = Runtime1::monitorenter_id;
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} else {
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enter_id = Runtime1::monitorenter_nofpu_id;
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}
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__ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
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ce->add_call_info_here(_info);
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ce->verify_oop_map(_info);
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__ jmp(_continuation);
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}
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void MonitorExitStub::emit_code(LIR_Assembler* ce) {
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__ bind(_entry);
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if (_compute_lock) {
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// lock_reg was destroyed by fast unlocking attempt => recompute it
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ce->monitor_address(_monitor_ix, _lock_reg);
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}
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ce->store_parameter(_lock_reg->as_register(), 0);
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// note: non-blocking leaf routine => no call info needed
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Runtime1::StubID exit_id;
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if (ce->compilation()->has_fpu_code()) {
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exit_id = Runtime1::monitorexit_id;
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} else {
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exit_id = Runtime1::monitorexit_nofpu_id;
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}
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__ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
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__ jmp(_continuation);
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}
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// Implementation of patching:
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// - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
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// - Replace original code with a call to the stub
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// At Runtime:
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// - call to stub, jump to runtime
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// - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
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// - in runtime: after initializing class, restore original code, reexecute instruction
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int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
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void PatchingStub::align_patch_site(MacroAssembler* masm) {
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// We're patching a 5-7 byte instruction on intel and we need to
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// make sure that we don't see a piece of the instruction. It
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// appears mostly impossible on Intel to simply invalidate other
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// processors caches and since they may do aggressive prefetch it's
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// very hard to make a guess about what code might be in the icache.
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// Force the instruction to be double word aligned so that it
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// doesn't span a cache line.
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masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
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}
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void PatchingStub::emit_code(LIR_Assembler* ce) {
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assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
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Label call_patch;
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// static field accesses have special semantics while the class
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// initializer is being run so we emit a test which can be used to
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// check that this code is being executed by the initializing
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// thread.
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address being_initialized_entry = __ pc();
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if (CommentedAssembly) {
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__ block_comment(" patch template");
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}
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if (_id == load_klass_id) {
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// produce a copy of the load klass instruction for use by the being initialized case
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address start = __ pc();
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jobject o = NULL;
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__ movoop(_obj, o);
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#ifdef ASSERT
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for (int i = 0; i < _bytes_to_copy; i++) {
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address ptr = (address)(_pc_start + i);
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int a_byte = (*ptr) & 0xFF;
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assert(a_byte == *start++, "should be the same code");
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}
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#endif
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} else {
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// make a copy the code which is going to be patched.
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for ( int i = 0; i < _bytes_to_copy; i++) {
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address ptr = (address)(_pc_start + i);
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int a_byte = (*ptr) & 0xFF;
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__ a_byte (a_byte);
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*ptr = 0x90; // make the site look like a nop
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}
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}
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address end_of_patch = __ pc();
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int bytes_to_skip = 0;
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if (_id == load_klass_id) {
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int offset = __ offset();
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if (CommentedAssembly) {
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__ block_comment(" being_initialized check");
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}
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assert(_obj != noreg, "must be a valid register");
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Register tmp = rax;
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if (_obj == tmp) tmp = rbx;
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__ push(tmp);
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__ get_thread(tmp);
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__ cmpptr(tmp, Address(_obj, instanceKlass::init_thread_offset_in_bytes() + sizeof(klassOopDesc)));
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__ pop(tmp);
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__ jcc(Assembler::notEqual, call_patch);
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// access_field patches may execute the patched code before it's
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// copied back into place so we need to jump back into the main
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// code of the nmethod to continue execution.
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__ jmp(_patch_site_continuation);
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// make sure this extra code gets skipped
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bytes_to_skip += __ offset() - offset;
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}
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if (CommentedAssembly) {
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__ block_comment("patch data encoded as movl");
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}
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// Now emit the patch record telling the runtime how to find the
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// pieces of the patch. We only need 3 bytes but for readability of
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// the disassembly we make the data look like a movl reg, imm32,
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// which requires 5 bytes
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int sizeof_patch_record = 5;
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bytes_to_skip += sizeof_patch_record;
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// emit the offsets needed to find the code to patch
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int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
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__ a_byte(0xB8);
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__ a_byte(0);
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__ a_byte(being_initialized_entry_offset);
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__ a_byte(bytes_to_skip);
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__ a_byte(_bytes_to_copy);
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address patch_info_pc = __ pc();
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assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
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address entry = __ pc();
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NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
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address target = NULL;
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switch (_id) {
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case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
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case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
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default: ShouldNotReachHere();
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}
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__ bind(call_patch);
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if (CommentedAssembly) {
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__ block_comment("patch entry point");
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}
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__ call(RuntimeAddress(target));
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assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
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ce->add_call_info_here(_info);
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int jmp_off = __ offset();
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__ jmp(_patch_site_entry);
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// Add enough nops so deoptimization can overwrite the jmp above with a call
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// and not destroy the world.
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for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
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__ nop();
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}
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if (_id == load_klass_id) {
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CodeSection* cs = __ code_section();
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RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
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relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, relocInfo::oop_type, relocInfo::none);
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}
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}
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void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
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ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
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__ bind(_entry);
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|
379 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
|
|
380 |
ce->add_call_info_here(_info);
|
|
381 |
debug_only(__ should_not_reach_here());
|
|
382 |
}
|
|
383 |
|
|
384 |
|
|
385 |
void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
|
|
386 |
assert(__ rsp_offset() == 0, "frame size should be fixed");
|
|
387 |
|
|
388 |
__ bind(_entry);
|
|
389 |
// pass the object on stack because all registers must be preserved
|
|
390 |
if (_obj->is_cpu_register()) {
|
|
391 |
ce->store_parameter(_obj->as_register(), 0);
|
|
392 |
}
|
|
393 |
__ call(RuntimeAddress(Runtime1::entry_for(_stub)));
|
|
394 |
ce->add_call_info_here(_info);
|
|
395 |
debug_only(__ should_not_reach_here());
|
|
396 |
}
|
|
397 |
|
|
398 |
|
|
399 |
ArrayStoreExceptionStub::ArrayStoreExceptionStub(CodeEmitInfo* info):
|
|
400 |
_info(info) {
|
|
401 |
}
|
|
402 |
|
|
403 |
|
|
404 |
void ArrayStoreExceptionStub::emit_code(LIR_Assembler* ce) {
|
|
405 |
assert(__ rsp_offset() == 0, "frame size should be fixed");
|
|
406 |
__ bind(_entry);
|
|
407 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_array_store_exception_id)));
|
|
408 |
ce->add_call_info_here(_info);
|
|
409 |
debug_only(__ should_not_reach_here());
|
|
410 |
}
|
|
411 |
|
|
412 |
|
|
413 |
void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
|
|
414 |
//---------------slow case: call to native-----------------
|
|
415 |
__ bind(_entry);
|
|
416 |
// Figure out where the args should go
|
|
417 |
// This should really convert the IntrinsicID to the methodOop and signature
|
|
418 |
// but I don't know how to do that.
|
|
419 |
//
|
|
420 |
VMRegPair args[5];
|
|
421 |
BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
|
|
422 |
SharedRuntime::java_calling_convention(signature, args, 5, true);
|
|
423 |
|
|
424 |
// push parameters
|
|
425 |
// (src, src_pos, dest, destPos, length)
|
|
426 |
Register r[5];
|
|
427 |
r[0] = src()->as_register();
|
|
428 |
r[1] = src_pos()->as_register();
|
|
429 |
r[2] = dst()->as_register();
|
|
430 |
r[3] = dst_pos()->as_register();
|
|
431 |
r[4] = length()->as_register();
|
|
432 |
|
|
433 |
// next registers will get stored on the stack
|
|
434 |
for (int i = 0; i < 5 ; i++ ) {
|
|
435 |
VMReg r_1 = args[i].first();
|
|
436 |
if (r_1->is_stack()) {
|
|
437 |
int st_off = r_1->reg2stack() * wordSize;
|
1066
|
438 |
__ movptr (Address(rsp, st_off), r[i]);
|
1
|
439 |
} else {
|
|
440 |
assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
|
|
441 |
}
|
|
442 |
}
|
|
443 |
|
|
444 |
ce->align_call(lir_static_call);
|
|
445 |
|
|
446 |
ce->emit_static_call_stub();
|
|
447 |
AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
|
|
448 |
relocInfo::static_call_type);
|
|
449 |
__ call(resolve);
|
|
450 |
ce->add_call_info_here(info());
|
|
451 |
|
|
452 |
#ifndef PRODUCT
|
1066
|
453 |
__ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
|
1
|
454 |
#endif
|
|
455 |
|
|
456 |
__ jmp(_continuation);
|
|
457 |
}
|
|
458 |
|
1374
|
459 |
/////////////////////////////////////////////////////////////////////////////
|
|
460 |
#ifndef SERIALGC
|
|
461 |
|
|
462 |
void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
|
|
463 |
|
|
464 |
// At this point we know that marking is in progress
|
|
465 |
|
|
466 |
__ bind(_entry);
|
|
467 |
assert(pre_val()->is_register(), "Precondition.");
|
|
468 |
|
|
469 |
Register pre_val_reg = pre_val()->as_register();
|
|
470 |
|
|
471 |
ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false);
|
|
472 |
|
1394
|
473 |
__ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
|
1374
|
474 |
__ jcc(Assembler::equal, _continuation);
|
|
475 |
ce->store_parameter(pre_val()->as_register(), 0);
|
|
476 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
|
|
477 |
__ jmp(_continuation);
|
|
478 |
|
|
479 |
}
|
|
480 |
|
|
481 |
jbyte* G1PostBarrierStub::_byte_map_base = NULL;
|
|
482 |
|
|
483 |
jbyte* G1PostBarrierStub::byte_map_base_slow() {
|
|
484 |
BarrierSet* bs = Universe::heap()->barrier_set();
|
|
485 |
assert(bs->is_a(BarrierSet::G1SATBCTLogging),
|
|
486 |
"Must be if we're using this.");
|
|
487 |
return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
|
|
488 |
}
|
|
489 |
|
|
490 |
void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
|
|
491 |
__ bind(_entry);
|
|
492 |
assert(addr()->is_register(), "Precondition.");
|
|
493 |
assert(new_val()->is_register(), "Precondition.");
|
|
494 |
Register new_val_reg = new_val()->as_register();
|
1394
|
495 |
__ cmpptr(new_val_reg, (int32_t) NULL_WORD);
|
1374
|
496 |
__ jcc(Assembler::equal, _continuation);
|
|
497 |
ce->store_parameter(addr()->as_register(), 0);
|
|
498 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
|
|
499 |
__ jmp(_continuation);
|
|
500 |
}
|
|
501 |
|
|
502 |
#endif // SERIALGC
|
|
503 |
/////////////////////////////////////////////////////////////////////////////
|
1
|
504 |
|
|
505 |
#undef __
|