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/*
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* Copyright (c) 2013, 2019, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*/
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package org.graalvm.compiler.lir.aarch64;
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import static jdk.vm.ci.aarch64.AArch64.sp;
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import static jdk.vm.ci.aarch64.AArch64.zr;
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import static jdk.vm.ci.code.ValueUtil.asAllocatableValue;
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import static jdk.vm.ci.code.ValueUtil.asRegister;
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import static jdk.vm.ci.code.ValueUtil.asStackSlot;
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import static jdk.vm.ci.code.ValueUtil.isRegister;
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import static jdk.vm.ci.code.ValueUtil.isStackSlot;
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import static org.graalvm.compiler.core.common.GraalOptions.GeneratePIC;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.COMPOSITE;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.CONST;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.HINT;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK;
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import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.UNINITIALIZED;
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import static org.graalvm.compiler.lir.LIRValueUtil.asJavaConstant;
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import static org.graalvm.compiler.lir.LIRValueUtil.isJavaConstant;
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import org.graalvm.compiler.asm.Label;
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import org.graalvm.compiler.asm.aarch64.AArch64Address;
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import org.graalvm.compiler.asm.aarch64.AArch64Assembler;
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import org.graalvm.compiler.asm.aarch64.AArch64MacroAssembler;
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import org.graalvm.compiler.asm.aarch64.AArch64MacroAssembler.ScratchRegister;
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import org.graalvm.compiler.core.common.CompressEncoding;
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import org.graalvm.compiler.core.common.LIRKind;
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import org.graalvm.compiler.core.common.spi.LIRKindTool;
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import org.graalvm.compiler.core.common.type.DataPointerConstant;
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import org.graalvm.compiler.debug.GraalError;
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import org.graalvm.compiler.lir.LIRFrameState;
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import org.graalvm.compiler.lir.LIRInstructionClass;
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import org.graalvm.compiler.lir.Opcode;
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import org.graalvm.compiler.lir.StandardOp;
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import org.graalvm.compiler.lir.StandardOp.LoadConstantOp;
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import org.graalvm.compiler.lir.StandardOp.NullCheck;
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import org.graalvm.compiler.lir.StandardOp.ValueMoveOp;
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import org.graalvm.compiler.lir.VirtualStackSlot;
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import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
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import org.graalvm.compiler.options.OptionValues;
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import jdk.vm.ci.aarch64.AArch64Kind;
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import jdk.vm.ci.code.MemoryBarriers;
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import jdk.vm.ci.code.Register;
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import jdk.vm.ci.code.StackSlot;
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import jdk.vm.ci.meta.AllocatableValue;
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import jdk.vm.ci.meta.Constant;
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import jdk.vm.ci.meta.JavaConstant;
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import jdk.vm.ci.meta.PlatformKind;
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import jdk.vm.ci.meta.Value;
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public class AArch64Move {
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public static class LoadInlineConstant extends AArch64LIRInstruction implements LoadConstantOp {
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public static final LIRInstructionClass<LoadInlineConstant> TYPE = LIRInstructionClass.create(LoadInlineConstant.class);
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private JavaConstant constant;
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@Def({REG, STACK}) AllocatableValue result;
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public LoadInlineConstant(JavaConstant constant, AllocatableValue result) {
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super(TYPE);
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this.constant = constant;
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this.result = result;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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if (isRegister(result)) {
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const2reg(crb, masm, result, constant);
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} else if (isStackSlot(result)) {
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StackSlot slot = asStackSlot(result);
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const2stack(crb, masm, slot, constant);
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}
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}
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@Override
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public Constant getConstant() {
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return constant;
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}
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@Override
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public AllocatableValue getResult() {
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return result;
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}
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}
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@Opcode("MOVE")
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public static class Move extends AArch64LIRInstruction implements ValueMoveOp {
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public static final LIRInstructionClass<Move> TYPE = LIRInstructionClass.create(Move.class);
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@Def({REG, STACK, HINT}) protected AllocatableValue result;
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@Use({REG, STACK}) protected AllocatableValue input;
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public Move(AllocatableValue result, AllocatableValue input) {
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super(TYPE);
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this.result = result;
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this.input = input;
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assert !(isStackSlot(result) && isStackSlot(input));
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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move(crb, masm, getResult(), getInput());
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}
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@Override
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public AllocatableValue getInput() {
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return input;
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}
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@Override
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public AllocatableValue getResult() {
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return result;
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}
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}
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public static class LoadAddressOp extends AArch64LIRInstruction {
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public static final LIRInstructionClass<LoadAddressOp> TYPE = LIRInstructionClass.create(LoadAddressOp.class);
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@Def protected AllocatableValue result;
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@Use(COMPOSITE) protected AArch64AddressValue address;
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public LoadAddressOp(AllocatableValue result, AArch64AddressValue address) {
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super(TYPE);
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this.result = result;
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this.address = address;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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Register dst = asRegister(result);
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AArch64Address adr = address.toAddress();
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masm.loadAddress(dst, adr, address.getScaleFactor());
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}
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}
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public static class LoadDataOp extends AArch64LIRInstruction {
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public static final LIRInstructionClass<LoadDataOp> TYPE = LIRInstructionClass.create(LoadDataOp.class);
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@Def protected AllocatableValue result;
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private final DataPointerConstant data;
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public LoadDataOp(AllocatableValue result, DataPointerConstant data) {
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super(TYPE);
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this.result = result;
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this.data = data;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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Register dst = asRegister(result);
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if (crb.compilationResult.isImmutablePIC()) {
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crb.recordDataReferenceInCode(data);
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masm.addressOf(dst);
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} else {
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masm.loadAddress(dst, (AArch64Address) crb.recordDataReferenceInCode(data), data.getAlignment());
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}
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}
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}
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public static class StackLoadAddressOp extends AArch64LIRInstruction {
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public static final LIRInstructionClass<StackLoadAddressOp> TYPE = LIRInstructionClass.create(StackLoadAddressOp.class);
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@Def protected AllocatableValue result;
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@Use({STACK, UNINITIALIZED}) protected AllocatableValue slot;
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public StackLoadAddressOp(AllocatableValue result, AllocatableValue slot) {
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super(TYPE);
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assert slot instanceof VirtualStackSlot || slot instanceof StackSlot;
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this.result = result;
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this.slot = slot;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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try (ScratchRegister addrReg = masm.getScratchRegister()) {
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AArch64Address address = loadStackSlotAddress(crb, masm, (StackSlot) slot, addrReg.getRegister());
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PlatformKind kind = AArch64Kind.QWORD;
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masm.loadAddress(asRegister(result, kind), address, kind.getSizeInBytes());
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}
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}
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}
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public static class MembarOp extends AArch64LIRInstruction {
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public static final LIRInstructionClass<MembarOp> TYPE = LIRInstructionClass.create(MembarOp.class);
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// For future use.
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@SuppressWarnings("unused") private final int barriers;
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public MembarOp(int barriers) {
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super(TYPE);
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this.barriers = barriers;
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}
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@Override
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// The odd-looking @SuppressWarnings("all") is here because of
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// a compiler bug which warns that crb is unused, and also
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// warns that @SuppressWarnings("unused") is unnecessary.
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public void emitCode(@SuppressWarnings("all") CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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assert barriers >= MemoryBarriers.LOAD_LOAD && barriers <= (MemoryBarriers.STORE_STORE | MemoryBarriers.STORE_LOAD | MemoryBarriers.LOAD_STORE | MemoryBarriers.LOAD_LOAD);
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switch (barriers) {
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case MemoryBarriers.STORE_STORE:
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masm.dmb(AArch64MacroAssembler.BarrierKind.STORE_STORE);
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break;
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case MemoryBarriers.LOAD_LOAD:
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case MemoryBarriers.LOAD_STORE:
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case MemoryBarriers.LOAD_LOAD | MemoryBarriers.LOAD_STORE:
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masm.dmb(AArch64MacroAssembler.BarrierKind.LOAD_LOAD);
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break;
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default:
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masm.dmb(AArch64MacroAssembler.BarrierKind.ANY_ANY);
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break;
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}
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}
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}
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abstract static class MemOp extends AArch64LIRInstruction implements StandardOp.ImplicitNullCheck {
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protected final AArch64Kind kind;
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@Use({COMPOSITE}) protected AArch64AddressValue addressValue;
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@State protected LIRFrameState state;
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MemOp(LIRInstructionClass<? extends MemOp> c, AArch64Kind kind, AArch64AddressValue address, LIRFrameState state) {
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super(c);
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this.kind = kind;
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this.addressValue = address;
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this.state = state;
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}
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protected abstract void emitMemAccess(CompilationResultBuilder crb, AArch64MacroAssembler masm);
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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if (state != null) {
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crb.recordImplicitException(masm.position(), state);
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}
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emitMemAccess(crb, masm);
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}
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@Override
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public boolean makeNullCheckFor(Value value, LIRFrameState nullCheckState, int implicitNullCheckLimit) {
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int displacement = addressValue.getDisplacement();
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if (state == null && value.equals(addressValue.getBase()) && addressValue.getOffset().equals(Value.ILLEGAL) && displacement >= 0 && displacement < implicitNullCheckLimit) {
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state = nullCheckState;
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return true;
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}
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return false;
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}
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}
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public static final class LoadOp extends MemOp {
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public static final LIRInstructionClass<LoadOp> TYPE = LIRInstructionClass.create(LoadOp.class);
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@Def protected AllocatableValue result;
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public LoadOp(AArch64Kind kind, AllocatableValue result, AArch64AddressValue address, LIRFrameState state) {
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super(TYPE, kind, address, state);
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this.result = result;
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}
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@Override
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protected void emitMemAccess(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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AArch64Address address = addressValue.toAddress();
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Register dst = asRegister(result);
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int destSize = result.getPlatformKind().getSizeInBytes() * Byte.SIZE;
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int srcSize = kind.getSizeInBytes() * Byte.SIZE;
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if (kind.isInteger()) {
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masm.ldr(srcSize, dst, address);
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} else {
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assert srcSize == destSize;
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masm.fldr(srcSize, dst, address);
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}
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}
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}
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public static class StoreOp extends MemOp {
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public static final LIRInstructionClass<StoreOp> TYPE = LIRInstructionClass.create(StoreOp.class);
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@Use protected AllocatableValue input;
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public StoreOp(AArch64Kind kind, AArch64AddressValue address, AllocatableValue input, LIRFrameState state) {
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super(TYPE, kind, address, state);
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this.input = input;
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}
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@Override
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protected void emitMemAccess(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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emitStore(crb, masm, kind, addressValue.toAddress(), input);
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}
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}
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public static final class StoreConstantOp extends MemOp {
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public static final LIRInstructionClass<StoreConstantOp> TYPE = LIRInstructionClass.create(StoreConstantOp.class);
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protected final JavaConstant input;
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public StoreConstantOp(AArch64Kind kind, AArch64AddressValue address, JavaConstant input, LIRFrameState state) {
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super(TYPE, kind, address, state);
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this.input = input;
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if (!input.isDefaultForKind()) {
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throw GraalError.shouldNotReachHere("Can only store null constants to memory");
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}
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}
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@Override
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public void emitMemAccess(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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emitStore(crb, masm, kind, addressValue.toAddress(), zr.asValue(LIRKind.combine(addressValue)));
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}
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}
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public static final class NullCheckOp extends AArch64LIRInstruction implements NullCheck {
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public static final LIRInstructionClass<NullCheckOp> TYPE = LIRInstructionClass.create(NullCheckOp.class);
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@Use(COMPOSITE) protected AArch64AddressValue address;
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@State protected LIRFrameState state;
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public NullCheckOp(AArch64AddressValue address, LIRFrameState state) {
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super(TYPE);
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this.address = address;
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this.state = state;
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}
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@Override
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public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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crb.recordImplicitException(masm.position(), state);
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masm.ldr(64, zr, address.toAddress());
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}
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@Override
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public Value getCheckedValue() {
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return address.base;
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}
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@Override
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public LIRFrameState getState() {
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return state;
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}
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}
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private static void emitStore(@SuppressWarnings("unused") CompilationResultBuilder crb, AArch64MacroAssembler masm, AArch64Kind kind, AArch64Address dst, Value src) {
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int destSize = kind.getSizeInBytes() * Byte.SIZE;
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if (kind.isInteger()) {
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masm.str(destSize, asRegister(src), dst);
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} else {
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masm.fstr(destSize, asRegister(src), dst);
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}
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}
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|
373 |
public static void move(CompilationResultBuilder crb, AArch64MacroAssembler masm, AllocatableValue result, Value input) {
|
|
374 |
if (isRegister(input)) {
|
|
375 |
if (isRegister(result)) {
|
|
376 |
reg2reg(crb, masm, result, asAllocatableValue(input));
|
|
377 |
} else if (isStackSlot(result)) {
|
|
378 |
reg2stack(crb, masm, result, asAllocatableValue(input));
|
|
379 |
} else {
|
|
380 |
throw GraalError.shouldNotReachHere();
|
|
381 |
}
|
|
382 |
} else if (isStackSlot(input)) {
|
|
383 |
if (isRegister(result)) {
|
|
384 |
stack2reg(crb, masm, result, asAllocatableValue(input));
|
46344
|
385 |
} else if (isStackSlot(result)) {
|
|
386 |
emitStackMove(crb, masm, result, input);
|
43972
|
387 |
} else {
|
|
388 |
throw GraalError.shouldNotReachHere();
|
|
389 |
}
|
|
390 |
} else if (isJavaConstant(input)) {
|
|
391 |
if (isRegister(result)) {
|
|
392 |
const2reg(crb, masm, result, asJavaConstant(input));
|
|
393 |
} else {
|
|
394 |
throw GraalError.shouldNotReachHere();
|
|
395 |
}
|
|
396 |
} else {
|
|
397 |
throw GraalError.shouldNotReachHere();
|
|
398 |
}
|
|
399 |
}
|
|
400 |
|
46344
|
401 |
private static void emitStackMove(CompilationResultBuilder crb, AArch64MacroAssembler masm, AllocatableValue result, Value input) {
|
|
402 |
try (ScratchRegister r1 = masm.getScratchRegister()) {
|
|
403 |
try (ScratchRegister r2 = masm.getScratchRegister()) {
|
|
404 |
Register rscratch1 = r1.getRegister();
|
|
405 |
Register rscratch2 = r2.getRegister();
|
46680
|
406 |
// use the slot kind to define the operand size
|
46344
|
407 |
PlatformKind kind = input.getPlatformKind();
|
46680
|
408 |
final int size = kind.getSizeInBytes() * Byte.SIZE;
|
46344
|
409 |
|
|
410 |
// Always perform stack -> stack copies through integer registers
|
|
411 |
crb.blockComment("[stack -> stack copy]");
|
|
412 |
AArch64Address src = loadStackSlotAddress(crb, masm, asStackSlot(input), rscratch2);
|
|
413 |
masm.ldr(size, rscratch1, src);
|
|
414 |
AArch64Address dst = loadStackSlotAddress(crb, masm, asStackSlot(result), rscratch2);
|
|
415 |
masm.str(size, rscratch1, dst);
|
|
416 |
}
|
|
417 |
}
|
|
418 |
}
|
|
419 |
|
43972
|
420 |
private static void reg2reg(@SuppressWarnings("unused") CompilationResultBuilder crb, AArch64MacroAssembler masm, AllocatableValue result, AllocatableValue input) {
|
|
421 |
Register dst = asRegister(result);
|
|
422 |
Register src = asRegister(input);
|
|
423 |
if (src.equals(dst)) {
|
|
424 |
return;
|
|
425 |
}
|
|
426 |
AArch64Kind kind = (AArch64Kind) input.getPlatformKind();
|
|
427 |
int size = kind.getSizeInBytes() * Byte.SIZE;
|
|
428 |
if (kind.isInteger()) {
|
|
429 |
masm.mov(size, dst, src);
|
|
430 |
} else {
|
|
431 |
masm.fmov(size, dst, src);
|
|
432 |
}
|
|
433 |
}
|
|
434 |
|
50330
|
435 |
static void reg2stack(CompilationResultBuilder crb, AArch64MacroAssembler masm, AllocatableValue result, AllocatableValue input) {
|
55509
|
436 |
AArch64Address dest;
|
|
437 |
try (ScratchRegister scratch = masm.getScratchRegister()) {
|
|
438 |
dest = loadStackSlotAddress(crb, masm, asStackSlot(result), scratch.getRegister());
|
|
439 |
}
|
43972
|
440 |
Register src = asRegister(input);
|
46680
|
441 |
// use the slot kind to define the operand size
|
|
442 |
AArch64Kind kind = (AArch64Kind) result.getPlatformKind();
|
|
443 |
final int size = kind.getSizeInBytes() * Byte.SIZE;
|
43972
|
444 |
if (kind.isInteger()) {
|
|
445 |
masm.str(size, src, dest);
|
|
446 |
} else {
|
|
447 |
masm.fstr(size, src, dest);
|
|
448 |
}
|
|
449 |
}
|
|
450 |
|
50330
|
451 |
static void stack2reg(CompilationResultBuilder crb, AArch64MacroAssembler masm, AllocatableValue result, AllocatableValue input) {
|
43972
|
452 |
AArch64Kind kind = (AArch64Kind) input.getPlatformKind();
|
46680
|
453 |
// use the slot kind to define the operand size
|
43972
|
454 |
final int size = kind.getSizeInBytes() * Byte.SIZE;
|
|
455 |
if (kind.isInteger()) {
|
|
456 |
AArch64Address src = loadStackSlotAddress(crb, masm, asStackSlot(input), result);
|
|
457 |
masm.ldr(size, asRegister(result), src);
|
|
458 |
} else {
|
|
459 |
try (ScratchRegister sc = masm.getScratchRegister()) {
|
|
460 |
AllocatableValue scratchRegisterValue = sc.getRegister().asValue(LIRKind.combine(input));
|
|
461 |
AArch64Address src = loadStackSlotAddress(crb, masm, asStackSlot(input), scratchRegisterValue);
|
|
462 |
masm.fldr(size, asRegister(result), src);
|
|
463 |
}
|
|
464 |
}
|
|
465 |
}
|
|
466 |
|
|
467 |
private static void const2reg(CompilationResultBuilder crb, AArch64MacroAssembler masm, Value result, JavaConstant input) {
|
|
468 |
Register dst = asRegister(result);
|
|
469 |
switch (input.getJavaKind().getStackKind()) {
|
|
470 |
case Int:
|
|
471 |
final int value = input.asInt();
|
|
472 |
int maskedValue;
|
|
473 |
switch (input.getJavaKind()) {
|
|
474 |
case Boolean:
|
|
475 |
case Byte:
|
|
476 |
maskedValue = value & 0xFF;
|
|
477 |
break;
|
|
478 |
case Char:
|
|
479 |
case Short:
|
|
480 |
maskedValue = value & 0xFFFF;
|
|
481 |
break;
|
|
482 |
case Int:
|
|
483 |
maskedValue = value;
|
|
484 |
break;
|
|
485 |
default:
|
|
486 |
throw GraalError.shouldNotReachHere();
|
|
487 |
}
|
|
488 |
masm.mov(dst, maskedValue);
|
|
489 |
break;
|
|
490 |
case Long:
|
|
491 |
masm.mov(dst, input.asLong());
|
|
492 |
break;
|
|
493 |
case Float:
|
|
494 |
if (AArch64MacroAssembler.isFloatImmediate(input.asFloat())) {
|
|
495 |
masm.fmov(32, dst, input.asFloat());
|
50330
|
496 |
} else if (crb.compilationResult.isImmutablePIC()) {
|
|
497 |
try (ScratchRegister scr = masm.getScratchRegister()) {
|
|
498 |
Register scratch = scr.getRegister();
|
|
499 |
masm.mov(scratch, Float.floatToRawIntBits(input.asFloat()));
|
|
500 |
masm.fmov(32, dst, scratch);
|
|
501 |
}
|
43972
|
502 |
} else {
|
54601
|
503 |
try (ScratchRegister scr = masm.getScratchRegister()) {
|
|
504 |
Register scratch = scr.getRegister();
|
|
505 |
crb.asFloatConstRef(input);
|
|
506 |
masm.addressOf(scratch);
|
|
507 |
masm.fldr(32, dst, AArch64Address.createBaseRegisterOnlyAddress(scratch));
|
|
508 |
}
|
43972
|
509 |
}
|
|
510 |
break;
|
|
511 |
case Double:
|
|
512 |
if (AArch64MacroAssembler.isDoubleImmediate(input.asDouble())) {
|
|
513 |
masm.fmov(64, dst, input.asDouble());
|
50330
|
514 |
} else if (crb.compilationResult.isImmutablePIC()) {
|
|
515 |
try (ScratchRegister scr = masm.getScratchRegister()) {
|
|
516 |
Register scratch = scr.getRegister();
|
|
517 |
masm.mov(scratch, Double.doubleToRawLongBits(input.asDouble()));
|
|
518 |
masm.fmov(64, dst, scratch);
|
|
519 |
}
|
43972
|
520 |
} else {
|
54601
|
521 |
try (ScratchRegister scr = masm.getScratchRegister()) {
|
|
522 |
Register scratch = scr.getRegister();
|
|
523 |
crb.asDoubleConstRef(input);
|
|
524 |
masm.addressOf(scratch);
|
|
525 |
masm.fldr(64, dst, AArch64Address.createBaseRegisterOnlyAddress(scratch));
|
|
526 |
}
|
43972
|
527 |
}
|
|
528 |
break;
|
|
529 |
case Object:
|
|
530 |
if (input.isNull()) {
|
57537
|
531 |
if (crb.mustReplaceWithUncompressedNullRegister(input)) {
|
|
532 |
masm.mov(64, dst, crb.uncompressedNullRegister);
|
54328
|
533 |
} else {
|
|
534 |
masm.mov(dst, 0);
|
|
535 |
}
|
43972
|
536 |
} else if (crb.target.inlineObjects) {
|
|
537 |
crb.recordInlineDataInCode(input);
|
54328
|
538 |
masm.mov(dst, 0xDEADDEADDEADDEADL, true);
|
43972
|
539 |
} else {
|
|
540 |
masm.ldr(64, dst, (AArch64Address) crb.recordDataReferenceInCode(input, 8));
|
|
541 |
}
|
|
542 |
break;
|
|
543 |
default:
|
|
544 |
throw GraalError.shouldNotReachHere("kind=" + input.getJavaKind().getStackKind());
|
|
545 |
}
|
|
546 |
}
|
|
547 |
|
|
548 |
private static void const2stack(CompilationResultBuilder crb, AArch64MacroAssembler masm, Value result, JavaConstant constant) {
|
46344
|
549 |
try (ScratchRegister addrReg = masm.getScratchRegister()) {
|
|
550 |
StackSlot slot = (StackSlot) result;
|
|
551 |
AArch64Address resultAddress = loadStackSlotAddress(crb, masm, slot, addrReg.getRegister());
|
58299
|
552 |
if (constant.isNull() && !crb.mustReplaceWithUncompressedNullRegister(constant)) {
|
46344
|
553 |
emitStore(crb, masm, (AArch64Kind) result.getPlatformKind(), resultAddress, zr.asValue(LIRKind.combine(result)));
|
|
554 |
} else {
|
|
555 |
try (ScratchRegister sc = masm.getScratchRegister()) {
|
|
556 |
Value scratchRegisterValue = sc.getRegister().asValue(LIRKind.combine(result));
|
|
557 |
const2reg(crb, masm, scratchRegisterValue, constant);
|
|
558 |
emitStore(crb, masm, (AArch64Kind) result.getPlatformKind(), resultAddress, scratchRegisterValue);
|
|
559 |
}
|
43972
|
560 |
}
|
|
561 |
}
|
|
562 |
}
|
|
563 |
|
|
564 |
/**
|
|
565 |
* Returns AArch64Address of given StackSlot. We cannot use CompilationResultBuilder.asAddress
|
|
566 |
* since this calls AArch64MacroAssembler.makeAddress with displacements that may be larger than
|
|
567 |
* 9-bit signed, which cannot be handled by that method.
|
|
568 |
*
|
|
569 |
* Instead we create an address ourselves. We use scaled unsigned addressing since we know the
|
|
570 |
* transfersize, which gives us a 15-bit address range (for longs/doubles) respectively a 14-bit
|
|
571 |
* range (for everything else).
|
|
572 |
*
|
|
573 |
* @param scratch Scratch register that can be used to load address. If Value.ILLEGAL this
|
|
574 |
* instruction fails if we try to access a StackSlot that is too large to be loaded
|
|
575 |
* directly.
|
|
576 |
* @return AArch64Address of given StackSlot. Uses scratch register if necessary to do so.
|
|
577 |
*/
|
|
578 |
private static AArch64Address loadStackSlotAddress(CompilationResultBuilder crb, AArch64MacroAssembler masm, StackSlot slot, AllocatableValue scratch) {
|
46344
|
579 |
Register scratchReg = Value.ILLEGAL.equals(scratch) ? zr : asRegister(scratch);
|
|
580 |
return loadStackSlotAddress(crb, masm, slot, scratchReg);
|
|
581 |
}
|
|
582 |
|
|
583 |
private static AArch64Address loadStackSlotAddress(CompilationResultBuilder crb, AArch64MacroAssembler masm, StackSlot slot, Register scratchReg) {
|
43972
|
584 |
int displacement = crb.frameMap.offsetForStackSlot(slot);
|
|
585 |
int transferSize = slot.getPlatformKind().getSizeInBytes();
|
|
586 |
return masm.makeAddress(sp, displacement, scratchReg, transferSize, /* allowOverwrite */false);
|
|
587 |
}
|
|
588 |
|
54328
|
589 |
public abstract static class PointerCompressionOp extends AArch64LIRInstruction {
|
|
590 |
|
|
591 |
@Def({REG, HINT}) private AllocatableValue result;
|
|
592 |
@Use({REG, CONST}) private Value input;
|
|
593 |
@Alive({REG, ILLEGAL, UNINITIALIZED}) private AllocatableValue baseRegister;
|
|
594 |
|
|
595 |
protected final CompressEncoding encoding;
|
|
596 |
protected final boolean nonNull;
|
|
597 |
protected final LIRKindTool lirKindTool;
|
|
598 |
|
|
599 |
protected PointerCompressionOp(LIRInstructionClass<? extends PointerCompressionOp> type, AllocatableValue result, Value input,
|
|
600 |
AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull, LIRKindTool lirKindTool) {
|
|
601 |
|
|
602 |
super(type);
|
|
603 |
this.result = result;
|
|
604 |
this.input = input;
|
|
605 |
this.baseRegister = baseRegister;
|
|
606 |
this.encoding = encoding;
|
|
607 |
this.nonNull = nonNull;
|
|
608 |
this.lirKindTool = lirKindTool;
|
|
609 |
}
|
|
610 |
|
|
611 |
public static boolean hasBase(OptionValues options, CompressEncoding encoding) {
|
|
612 |
return GeneratePIC.getValue(options) || encoding.hasBase();
|
|
613 |
}
|
|
614 |
|
|
615 |
public final Value getInput() {
|
|
616 |
return input;
|
|
617 |
}
|
|
618 |
|
|
619 |
public final AllocatableValue getResult() {
|
|
620 |
return result;
|
|
621 |
}
|
|
622 |
|
|
623 |
protected final Register getResultRegister() {
|
|
624 |
return asRegister(result);
|
|
625 |
}
|
|
626 |
|
|
627 |
protected final Register getBaseRegister(CompilationResultBuilder crb) {
|
|
628 |
return hasBase(crb.getOptions(), encoding) ? asRegister(baseRegister) : Register.None;
|
|
629 |
}
|
|
630 |
|
|
631 |
protected final int getShift() {
|
|
632 |
return encoding.getShift();
|
|
633 |
}
|
|
634 |
|
|
635 |
protected final void move(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
|
|
636 |
AArch64Move.move(crb, masm, result, input);
|
|
637 |
}
|
|
638 |
}
|
|
639 |
|
|
640 |
public static class CompressPointerOp extends PointerCompressionOp {
|
|
641 |
public static final LIRInstructionClass<CompressPointerOp> TYPE = LIRInstructionClass.create(CompressPointerOp.class);
|
|
642 |
|
|
643 |
public CompressPointerOp(AllocatableValue result, Value input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull, LIRKindTool lirKindTool) {
|
|
644 |
this(TYPE, result, input, baseRegister, encoding, nonNull, lirKindTool);
|
|
645 |
}
|
|
646 |
|
|
647 |
private CompressPointerOp(LIRInstructionClass<? extends PointerCompressionOp> type, AllocatableValue result, Value input,
|
|
648 |
AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull, LIRKindTool lirKindTool) {
|
|
649 |
|
|
650 |
super(type, result, input, baseRegister, encoding, nonNull, lirKindTool);
|
|
651 |
}
|
|
652 |
|
|
653 |
@Override
|
|
654 |
protected void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
|
|
655 |
Register resultRegister = getResultRegister();
|
|
656 |
Register ptr = asRegister(getInput());
|
|
657 |
Register base = getBaseRegister(crb);
|
|
658 |
// result = (ptr - base) >> shift
|
|
659 |
if (!encoding.hasBase()) {
|
|
660 |
if (encoding.hasShift()) {
|
|
661 |
masm.lshr(64, resultRegister, ptr, encoding.getShift());
|
|
662 |
} else {
|
|
663 |
masm.movx(resultRegister, ptr);
|
|
664 |
}
|
|
665 |
} else if (nonNull) {
|
|
666 |
masm.sub(64, resultRegister, ptr, base);
|
|
667 |
if (encoding.hasShift()) {
|
|
668 |
masm.lshr(64, resultRegister, resultRegister, encoding.getShift());
|
|
669 |
}
|
|
670 |
} else {
|
|
671 |
// if ptr is null it still has to be null after compression
|
|
672 |
masm.cmp(64, ptr, 0);
|
|
673 |
masm.cmov(64, resultRegister, ptr, base, AArch64Assembler.ConditionFlag.NE);
|
|
674 |
masm.sub(64, resultRegister, resultRegister, base);
|
|
675 |
if (encoding.hasShift()) {
|
|
676 |
masm.lshr(64, resultRegister, resultRegister, encoding.getShift());
|
|
677 |
}
|
|
678 |
}
|
|
679 |
}
|
|
680 |
}
|
|
681 |
|
|
682 |
public static class UncompressPointerOp extends PointerCompressionOp {
|
|
683 |
public static final LIRInstructionClass<UncompressPointerOp> TYPE = LIRInstructionClass.create(UncompressPointerOp.class);
|
|
684 |
|
|
685 |
public UncompressPointerOp(AllocatableValue result, Value input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull, LIRKindTool lirKindTool) {
|
|
686 |
this(TYPE, result, input, baseRegister, encoding, nonNull, lirKindTool);
|
|
687 |
}
|
|
688 |
|
|
689 |
private UncompressPointerOp(LIRInstructionClass<? extends PointerCompressionOp> type, AllocatableValue result, Value input,
|
|
690 |
AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull, LIRKindTool lirKindTool) {
|
|
691 |
super(type, result, input, baseRegister, encoding, nonNull, lirKindTool);
|
|
692 |
}
|
|
693 |
|
|
694 |
@Override
|
|
695 |
protected void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
|
|
696 |
Register inputRegister = asRegister(getInput());
|
|
697 |
Register resultRegister = getResultRegister();
|
|
698 |
Register base = encoding.hasBase() ? getBaseRegister(crb) : null;
|
|
699 |
|
|
700 |
// result = base + (ptr << shift)
|
|
701 |
if (nonNull || base == null) {
|
|
702 |
masm.add(64, resultRegister, base == null ? zr : base, inputRegister, AArch64Assembler.ShiftType.LSL, encoding.getShift());
|
|
703 |
} else {
|
|
704 |
// if ptr is null it has to be null after decompression
|
|
705 |
Label done = new Label();
|
|
706 |
if (!resultRegister.equals(inputRegister)) {
|
|
707 |
masm.mov(32, resultRegister, inputRegister);
|
|
708 |
}
|
|
709 |
masm.cbz(32, resultRegister, done);
|
|
710 |
masm.add(64, resultRegister, base, resultRegister, AArch64Assembler.ShiftType.LSL, encoding.getShift());
|
|
711 |
masm.bind(done);
|
|
712 |
}
|
|
713 |
}
|
|
714 |
}
|
|
715 |
|
54724
|
716 |
private abstract static class ZeroNullConversionOp extends AArch64LIRInstruction {
|
|
717 |
@Def({REG, HINT}) protected AllocatableValue result;
|
|
718 |
@Use({REG}) protected AllocatableValue input;
|
|
719 |
|
|
720 |
protected ZeroNullConversionOp(LIRInstructionClass<? extends ZeroNullConversionOp> type, AllocatableValue result, AllocatableValue input) {
|
|
721 |
super(type);
|
|
722 |
this.result = result;
|
|
723 |
this.input = input;
|
|
724 |
}
|
|
725 |
|
|
726 |
@Override
|
|
727 |
public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
|
57537
|
728 |
Register nullRegister = crb.uncompressedNullRegister;
|
54724
|
729 |
if (!nullRegister.equals(Register.None)) {
|
|
730 |
emitConversion(asRegister(result), asRegister(input), nullRegister, masm);
|
|
731 |
}
|
|
732 |
}
|
|
733 |
|
|
734 |
protected abstract void emitConversion(Register resultRegister, Register inputRegister, Register nullRegister, AArch64MacroAssembler masm);
|
|
735 |
}
|
|
736 |
|
|
737 |
public static class ConvertNullToZeroOp extends ZeroNullConversionOp {
|
|
738 |
public static final LIRInstructionClass<ConvertNullToZeroOp> TYPE = LIRInstructionClass.create(ConvertNullToZeroOp.class);
|
|
739 |
|
|
740 |
public ConvertNullToZeroOp(AllocatableValue result, AllocatableValue input) {
|
|
741 |
super(TYPE, result, input);
|
|
742 |
}
|
|
743 |
|
|
744 |
@Override
|
|
745 |
protected final void emitConversion(Register resultRegister, Register inputRegister, Register nullRegister, AArch64MacroAssembler masm) {
|
|
746 |
if (inputRegister.equals(resultRegister)) {
|
|
747 |
masm.subs(64, inputRegister, inputRegister, nullRegister);
|
|
748 |
Label done = new Label();
|
|
749 |
masm.branchConditionally(AArch64Assembler.ConditionFlag.EQ, done);
|
|
750 |
masm.add(64, inputRegister, inputRegister, nullRegister);
|
|
751 |
masm.bind(done);
|
|
752 |
} else {
|
|
753 |
masm.subs(64, resultRegister, resultRegister, resultRegister);
|
|
754 |
masm.cmp(64, inputRegister, nullRegister);
|
|
755 |
Label done = new Label();
|
|
756 |
masm.branchConditionally(AArch64Assembler.ConditionFlag.EQ, done);
|
|
757 |
masm.movx(resultRegister, inputRegister);
|
|
758 |
masm.bind(done);
|
|
759 |
}
|
|
760 |
}
|
|
761 |
}
|
|
762 |
|
|
763 |
public static class ConvertZeroToNullOp extends ZeroNullConversionOp {
|
|
764 |
public static final LIRInstructionClass<ConvertZeroToNullOp> TYPE = LIRInstructionClass.create(ConvertZeroToNullOp.class);
|
|
765 |
|
|
766 |
public ConvertZeroToNullOp(AllocatableValue result, AllocatableValue input) {
|
|
767 |
super(TYPE, result, input);
|
|
768 |
}
|
|
769 |
|
|
770 |
@Override
|
|
771 |
protected final void emitConversion(Register resultRegister, Register inputRegister, Register nullRegister, AArch64MacroAssembler masm) {
|
|
772 |
if (!inputRegister.equals(resultRegister)) {
|
|
773 |
masm.movx(resultRegister, inputRegister);
|
|
774 |
}
|
|
775 |
Label done = new Label();
|
|
776 |
masm.ands(64, zr, inputRegister, inputRegister);
|
|
777 |
masm.branchConditionally(AArch64Assembler.ConditionFlag.NE, done);
|
|
778 |
masm.movx(resultRegister, nullRegister);
|
|
779 |
masm.bind(done);
|
|
780 |
}
|
|
781 |
}
|
|
782 |
|
43972
|
783 |
}
|