author | naoto |
Tue, 09 Jul 2019 08:05:38 -0700 | |
changeset 55627 | 9c1885fb2a42 |
parent 53244 | 9807daeb47c4 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved. |
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* Copyright (c) 2014, Red Hat Inc. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef CPU_AARCH64_C1_DEFS_AARCH64_HPP |
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#define CPU_AARCH64_C1_DEFS_AARCH64_HPP |
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// native word offsets from memory address (little endian) |
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enum { |
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pd_lo_word_offset_in_bytes = 0, |
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pd_hi_word_offset_in_bytes = BytesPerWord |
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}; |
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// explicit rounding operations are required to implement the strictFP mode |
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enum { |
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pd_strict_fp_requires_explicit_rounding = false |
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}; |
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// FIXME: There are no callee-saved |
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// registers |
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enum { |
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pd_nof_cpu_regs_frame_map = RegisterImpl::number_of_registers, // number of registers used during code emission |
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pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers, // number of registers used during code emission |
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pd_nof_caller_save_cpu_regs_frame_map = 19 - 2, // number of registers killed by calls |
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pd_nof_caller_save_fpu_regs_frame_map = 32, // number of registers killed by calls |
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pd_first_callee_saved_reg = 19 - 2, |
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pd_last_callee_saved_reg = 26 - 2, |
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pd_last_allocatable_cpu_reg = 16, |
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pd_nof_cpu_regs_reg_alloc |
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= pd_last_allocatable_cpu_reg + 1, // number of registers that are visible to register allocator |
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pd_nof_fpu_regs_reg_alloc = 8, // number of registers that are visible to register allocator |
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pd_nof_cpu_regs_linearscan = 32, // number of registers visible to linear scan |
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pd_nof_fpu_regs_linearscan = pd_nof_fpu_regs_frame_map, // number of registers visible to linear scan |
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pd_nof_xmm_regs_linearscan = 0, // like sparc we don't have any of these |
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pd_first_cpu_reg = 0, |
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pd_last_cpu_reg = 16, |
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pd_first_byte_reg = 0, |
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pd_last_byte_reg = 16, |
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pd_first_fpu_reg = pd_nof_cpu_regs_frame_map, |
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pd_last_fpu_reg = pd_first_fpu_reg + 31, |
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pd_first_callee_saved_fpu_reg = 8 + pd_first_fpu_reg, |
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pd_last_callee_saved_fpu_reg = 15 + pd_first_fpu_reg, |
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}; |
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// Encoding of float value in debug info. This is true on x86 where |
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// floats are extended to doubles when stored in the stack, false for |
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// AArch64 where floats and doubles are stored in their native form. |
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enum { |
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pd_float_saved_as_double = false |
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}; |
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#endif // CPU_AARCH64_C1_DEFS_AARCH64_HPP |