hotspot/src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp
author duke
Wed, 05 Jul 2017 20:10:48 +0200
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parent 23221 b70675ece1ce
child 28617 12ae756253c2
permissions -rw-r--r--
Merge
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/*
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 * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
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 * Copyright 2012, 2014 SAP AG. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
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#define CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
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#include "asm/assembler.inline.hpp"
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#include "asm/macroAssembler.hpp"
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#include "asm/codeBuffer.hpp"
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#include "code/codeCache.hpp"
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inline bool MacroAssembler::is_ld_largeoffset(address a) {
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  const int inst1 = *(int *)a;
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  const int inst2 = *(int *)(a+4);
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  return (is_ld(inst1)) ||
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         (is_addis(inst1) && is_ld(inst2) && inv_ra_field(inst2) == inv_rt_field(inst1));
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}
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inline int MacroAssembler::get_ld_largeoffset_offset(address a) {
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  assert(MacroAssembler::is_ld_largeoffset(a), "must be ld with large offset");
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  const int inst1 = *(int *)a;
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  if (is_ld(inst1)) {
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    return inv_d1_field(inst1);
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  } else {
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    const int inst2 = *(int *)(a+4);
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    return (inv_d1_field(inst1) << 16) + inv_d1_field(inst2);
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  }
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}
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inline void MacroAssembler::round_to(Register r, int modulus) {
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  assert(is_power_of_2_long((jlong)modulus), "must be power of 2");
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  addi(r, r, modulus-1);
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  clrrdi(r, r, log2_long((jlong)modulus));
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}
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// Move register if destination register and target register are different.
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inline void MacroAssembler::mr_if_needed(Register rd, Register rs) {
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  if (rs != rd) mr(rd, rs);
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}
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inline void MacroAssembler::fmr_if_needed(FloatRegister rd, FloatRegister rs) {
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  if (rs != rd) fmr(rd, rs);
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}
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inline void MacroAssembler::endgroup_if_needed(bool needed) {
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  if (needed) {
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    endgroup();
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  }
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}
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inline void MacroAssembler::membar(int bits) {
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  // TODO: use elemental_membar(bits) for Power 8 and disable optimization of acquire-release
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  // (Matcher::post_membar_release where we use PPC64_ONLY(xop == Op_MemBarRelease ||))
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  if (bits & StoreLoad) sync(); else lwsync();
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}
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inline void MacroAssembler::release() { membar(LoadStore | StoreStore); }
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inline void MacroAssembler::acquire() { membar(LoadLoad | LoadStore); }
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inline void MacroAssembler::fence()   { membar(LoadLoad | LoadStore | StoreLoad | StoreStore); }
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// Address of the global TOC.
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inline address MacroAssembler::global_toc() {
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  return CodeCache::low_bound();
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}
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// Offset of given address to the global TOC.
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inline int MacroAssembler::offset_to_global_toc(const address addr) {
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  intptr_t offset = (intptr_t)addr - (intptr_t)MacroAssembler::global_toc();
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  assert(Assembler::is_simm((long)offset, 31) && offset >= 0, "must be in range");
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  return (int)offset;
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}
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// Address of current method's TOC.
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inline address MacroAssembler::method_toc() {
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  return code()->consts()->start();
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}
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// Offset of given address to current method's TOC.
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inline int MacroAssembler::offset_to_method_toc(address addr) {
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  intptr_t offset = (intptr_t)addr - (intptr_t)method_toc();
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  assert(is_simm((long)offset, 31) && offset >= 0, "must be in range");
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  return (int)offset;
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}
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inline bool MacroAssembler::is_calculate_address_from_global_toc_at(address a, address bound) {
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  const address inst2_addr = a;
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  const int inst2 = *(int *) a;
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  // The relocation points to the second instruction, the addi.
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  if (!is_addi(inst2)) return false;
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  // The addi reads and writes the same register dst.
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  const int dst = inv_rt_field(inst2);
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  if (inv_ra_field(inst2) != dst) return false;
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  // Now, find the preceding addis which writes to dst.
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  int inst1 = 0;
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  address inst1_addr = inst2_addr - BytesPerInstWord;
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  while (inst1_addr >= bound) {
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    inst1 = *(int *) inst1_addr;
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    if (is_addis(inst1) && inv_rt_field(inst1) == dst) {
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      // stop, found the addis which writes dst
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      break;
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    }
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    inst1_addr -= BytesPerInstWord;
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  }
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  if (!(inst1 == 0 || inv_ra_field(inst1) == 29 /* R29 */)) return false;
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  return is_addis(inst1);
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}
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#ifdef _LP64
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// Detect narrow oop constants.
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inline bool MacroAssembler::is_set_narrow_oop(address a, address bound) {
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  const address inst2_addr = a;
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  const int inst2 = *(int *)a;
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  // The relocation points to the second instruction, the ori.
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  if (!is_ori(inst2)) return false;
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  // The ori reads and writes the same register dst.
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  const int dst = inv_rta_field(inst2);
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  if (inv_rs_field(inst2) != dst) return false;
22824
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  // Now, find the preceding addis which writes to dst.
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  int inst1 = 0;
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  address inst1_addr = inst2_addr - BytesPerInstWord;
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  while (inst1_addr >= bound) {
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    inst1 = *(int *) inst1_addr;
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    if (is_lis(inst1) && inv_rs_field(inst1) == dst) return true;
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    inst1_addr -= BytesPerInstWord;
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  }
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  return false;
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}
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#endif
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inline bool MacroAssembler::is_load_const_at(address a) {
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  const int* p_inst = (int *) a;
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  bool b = is_lis(*p_inst++);
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  if (is_ori(*p_inst)) {
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    p_inst++;
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    b = b && is_rldicr(*p_inst++); // TODO: could be made more precise: `sldi'!
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    b = b && is_oris(*p_inst++);
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    b = b && is_ori(*p_inst);
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  } else if (is_lis(*p_inst)) {
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    p_inst++;
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    b = b && is_ori(*p_inst++);
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    b = b && is_ori(*p_inst);
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    // TODO: could enhance reliability by adding is_insrdi
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  } else return false;
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  return b;
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}
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inline void MacroAssembler::set_oop_constant(jobject obj, Register d) {
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  set_oop(constant_oop_address(obj), d);
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}
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inline void MacroAssembler::set_oop(AddressLiteral obj_addr, Register d) {
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  assert(obj_addr.rspec().type() == relocInfo::oop_type, "must be an oop reloc");
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  load_const(d, obj_addr);
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}
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inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
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  jint& stub_inst = *(jint*) branch;
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  stub_inst = patched_branch(target - branch, stub_inst, 0);
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}
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// Relocation of conditional far branches.
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inline bool MacroAssembler::is_bc_far_variant1_at(address instruction_addr) {
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  // Variant 1, the 1st instruction contains the destination address:
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  //
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  //    bcxx  DEST
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  //    endgroup
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  //
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  const int instruction_1 = *(int*)(instruction_addr);
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  const int instruction_2 = *(int*)(instruction_addr + 4);
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  return is_bcxx(instruction_1) &&
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         (inv_bd_field(instruction_1, (intptr_t)instruction_addr) != (intptr_t)(instruction_addr + 2*4)) &&
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         is_endgroup(instruction_2);
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}
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// Relocation of conditional far branches.
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inline bool MacroAssembler::is_bc_far_variant2_at(address instruction_addr) {
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  // Variant 2, the 2nd instruction contains the destination address:
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  //
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  //    b!cxx SKIP
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  //    bxx   DEST
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  //  SKIP:
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  //
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  const int instruction_1 = *(int*)(instruction_addr);
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  const int instruction_2 = *(int*)(instruction_addr + 4);
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  return is_bcxx(instruction_1) &&
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         (inv_bd_field(instruction_1, (intptr_t)instruction_addr) == (intptr_t)(instruction_addr + 2*4)) &&
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         is_bxx(instruction_2);
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}
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// Relocation for conditional branches
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inline bool MacroAssembler::is_bc_far_variant3_at(address instruction_addr) {
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  // Variant 3, far cond branch to the next instruction, already patched to nops:
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  //
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  //    nop
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  //    endgroup
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  //  SKIP/DEST:
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  //
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  const int instruction_1 = *(int*)(instruction_addr);
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  const int instruction_2 = *(int*)(instruction_addr + 4);
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  return is_nop(instruction_1) &&
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         is_endgroup(instruction_2);
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}
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// Convenience bc_far versions
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inline void MacroAssembler::blt_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs1, bi0(crx, less), L, optimize); }
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inline void MacroAssembler::bgt_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs1, bi0(crx, greater), L, optimize); }
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inline void MacroAssembler::beq_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs1, bi0(crx, equal), L, optimize); }
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inline void MacroAssembler::bso_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs1, bi0(crx, summary_overflow), L, optimize); }
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inline void MacroAssembler::bge_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs0, bi0(crx, less), L, optimize); }
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inline void MacroAssembler::ble_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs0, bi0(crx, greater), L, optimize); }
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inline void MacroAssembler::bne_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs0, bi0(crx, equal), L, optimize); }
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inline void MacroAssembler::bns_far(ConditionRegister crx, Label& L, int optimize) { MacroAssembler::bc_far(bcondCRbiIs0, bi0(crx, summary_overflow), L, optimize); }
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inline address MacroAssembler::call_stub(Register function_entry) {
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  mtctr(function_entry);
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  bctrl();
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  return pc();
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   246
}
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inline void MacroAssembler::call_stub_and_return_to(Register function_entry, Register return_pc) {
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  assert_different_registers(function_entry, return_pc);
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  mtlr(return_pc);
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  mtctr(function_entry);
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  bctr();
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   253
}
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// Get the pc where the last emitted call will return to.
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inline address MacroAssembler::last_calls_return_pc() {
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  return _last_calls_return_pc;
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}
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// Read from the polling page, its address is already in a register.
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inline void MacroAssembler::load_from_polling_page(Register polling_page_address, int offset) {
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  ld(R0, offset, polling_page_address);
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}
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// Trap-instruction-based checks.
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inline void MacroAssembler::trap_null_check(Register a, trap_to_bits cmp) {
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  assert(TrapBasedNullChecks, "sanity");
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  tdi(cmp, a/*reg a*/, 0);
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}
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inline void MacroAssembler::trap_zombie_not_entrant() {
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  tdi(traptoUnconditional, 0/*reg 0*/, 1);
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   273
}
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inline void MacroAssembler::trap_should_not_reach_here() {
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  tdi_unchecked(traptoUnconditional, 0/*reg 0*/, 2);
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}
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inline void MacroAssembler::trap_ic_miss_check(Register a, Register b) {
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  td(traptoGreaterThanUnsigned | traptoLessThanUnsigned, a, b);
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}
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// Do an explicit null check if access to a+offset will not raise a SIGSEGV.
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   283
// Either issue a trap instruction that raises SIGTRAP, or do a compare that
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// branches to exception_entry.
22861
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// No support for compressed oops (base page of heap). Does not distinguish
22824
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   286
// loads and stores.
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inline void MacroAssembler::null_check_throw(Register a, int offset, Register temp_reg,
f5c393d456fc 8029940: PPC64 (part 122): C2 compiler port
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                                             address exception_entry) {
22852
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  if (!ImplicitNullChecks || needs_explicit_null_check(offset) || !os::zero_page_read_protected()) {
22824
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    if (TrapBasedNullChecks) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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      assert(UseSIGTRAP, "sanity");
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      trap_null_check(a);
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   293
    } else {
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      Label ok;
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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      cmpdi(CCR0, a, 0);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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      bne(CCR0, ok);
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      load_const_optimized(temp_reg, exception_entry);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   298
      mtctr(temp_reg);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   299
      bctr();
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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      bind(ok);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   301
    }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   303
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   304
22861
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inline void MacroAssembler::load_with_trap_null_check(Register d, int si16, Register s1) {
22852
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   306
  if (!os::zero_page_read_protected()) {
22824
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   307
    if (TrapBasedNullChecks) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   308
      trap_null_check(s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   309
    }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   310
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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  ld(d, si16, s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   312
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   313
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   314
inline void MacroAssembler::load_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   315
  if (UseCompressedOops) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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    lwz(d, offs, s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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    // Attention: no null check here!
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   318
    decode_heap_oop_not_null(d);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   319
  } else {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   320
    ld(d, offs, s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   321
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   322
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   323
23221
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inline void MacroAssembler::store_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1, Register tmp) {
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   325
  if (UseCompressedOops) {
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   326
    Register compressedOop = encode_heap_oop_not_null((tmp != noreg) ? tmp : d, d);
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   327
    stw(compressedOop, offs, s1);
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   328
  } else {
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   329
    std(d, offs, s1);
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   330
  }
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   331
}
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   332
22824
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   333
inline void MacroAssembler::load_heap_oop(Register d, RegisterOrConstant offs, Register s1) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   334
  if (UseCompressedOops) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   335
    lwz(d, offs, s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   336
    decode_heap_oop(d);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   337
  } else {
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   338
    ld(d, offs, s1);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   339
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   340
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   341
23221
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   342
inline Register MacroAssembler::encode_heap_oop_not_null(Register d, Register src) {
b70675ece1ce 8036976: PPC64: implement the template interpreter
goetz
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   343
  Register current = (src!=noreg) ? src : d; // Compressed oop is in d if no src provided.
22824
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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   344
  if (Universe::narrow_oop_base() != NULL) {
23221
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   345
    sub(d, current, R30);
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   346
    current = d;
22824
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   347
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   348
  if (Universe::narrow_oop_shift() != 0) {
23221
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   349
    srdi(d, current, LogMinObjAlignmentInBytes);
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   350
    current = d;
22824
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   351
  }
23221
b70675ece1ce 8036976: PPC64: implement the template interpreter
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   352
  return current; // Encoded oop is in this register.
22824
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   353
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   354
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   355
inline void MacroAssembler::decode_heap_oop_not_null(Register d) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   356
  if (Universe::narrow_oop_shift() != 0) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   357
    assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   358
    sldi(d, d, LogMinObjAlignmentInBytes);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   359
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   360
  if (Universe::narrow_oop_base() != NULL) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   361
    add(d, d, R30);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   362
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   363
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   364
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   365
inline void MacroAssembler::decode_heap_oop(Register d) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   366
  Label isNull;
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   367
  if (Universe::narrow_oop_base() != NULL) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   368
    cmpwi(CCR0, d, 0);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   369
    beq(CCR0, isNull);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   370
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   371
  if (Universe::narrow_oop_shift() != 0) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   372
    assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong");
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   373
    sldi(d, d, LogMinObjAlignmentInBytes);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   374
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   375
  if (Universe::narrow_oop_base() != NULL) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   376
    add(d, d, R30);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   377
  }
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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diff changeset
   378
  bind(isNull);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   379
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   380
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
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parents:
diff changeset
   381
// SIGTRAP-based range checks for arrays.
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   382
inline void MacroAssembler::trap_range_check_l(Register a, Register b) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   383
  tw (traptoLessThanUnsigned,                  a/*reg a*/, b/*reg b*/);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   384
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   385
inline void MacroAssembler::trap_range_check_l(Register a, int si16) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   386
  twi(traptoLessThanUnsigned,                  a/*reg a*/, si16);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   387
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   388
inline void MacroAssembler::trap_range_check_le(Register a, int si16) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   389
  twi(traptoEqual | traptoLessThanUnsigned,    a/*reg a*/, si16);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   390
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   391
inline void MacroAssembler::trap_range_check_g(Register a, int si16) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   392
  twi(traptoGreaterThanUnsigned,               a/*reg a*/, si16);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   393
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   394
inline void MacroAssembler::trap_range_check_ge(Register a, Register b) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   395
  tw (traptoEqual | traptoGreaterThanUnsigned, a/*reg a*/, b/*reg b*/);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   396
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   397
inline void MacroAssembler::trap_range_check_ge(Register a, int si16) {
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   398
  twi(traptoEqual | traptoGreaterThanUnsigned, a/*reg a*/, si16);
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   399
}
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   400
23211
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   401
#if defined(ABI_ELFv2)
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   402
inline address MacroAssembler::function_entry() { return pc(); }
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   403
#else
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   404
inline address MacroAssembler::function_entry() { return emit_fd(); }
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   405
#endif
954e3a81da29 8035647: PPC64: Support for elf v2 abi.
goetz
parents: 22861
diff changeset
   406
22824
28258dd5cb2e 8019972: PPC64 (part 9): platform files for interpreter only VM.
goetz
parents:
diff changeset
   407
#endif // CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP