src/hotspot/cpu/arm/vtableStubs_arm.cpp
author coleenp
Wed, 06 Jun 2018 10:45:40 -0400
changeset 50429 83aec1d357d4
parent 50380 bec342339138
child 51618 54b344d9dd4e
permissions -rw-r--r--
8204301: Make OrderAccess functions available to hpp rather than inline.hpp files Summary: move orderAccess.inline.hpp into orderAccess.hpp and remove os.hpp inclusion and conditional os::is_MP() for fence on x86 platforms Reviewed-by: dholmes, hseigel
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/*
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 * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/assembler.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "assembler_arm.inline.hpp"
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#include "code/vtableStubs.hpp"
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#include "interp_masm_arm.hpp"
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#include "memory/resourceArea.hpp"
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#include "oops/compiledICHolder.hpp"
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#include "oops/instanceKlass.hpp"
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#include "oops/klassVtable.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "vmreg_arm.inline.hpp"
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#ifdef COMPILER2
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#include "opto/runtime.hpp"
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#endif
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// machine-dependent part of VtableStubs: create VtableStub of correct size and
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// initialize its code
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#define __ masm->
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#ifndef PRODUCT
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extern "C" void bad_compiled_vtable_index(JavaThread* thread, oop receiver, int index);
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#endif
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VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
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  const int code_length = VtableStub::pd_code_size_limit(true);
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  VtableStub* s = new(code_length) VtableStub(true, vtable_index);
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  // Can be NULL if there is no free space in the code cache.
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  if (s == NULL) {
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    return NULL;
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  }
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  ResourceMark rm;
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  CodeBuffer cb(s->entry_point(), code_length);
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  MacroAssembler* masm = new MacroAssembler(&cb);
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  assert(VtableStub::receiver_location() == R0->as_VMReg(), "receiver expected in R0");
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  const Register tmp = Rtemp; // Rtemp OK, should be free at call sites
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  address npe_addr = __ pc();
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  __ load_klass(tmp, R0);
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  {
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  int entry_offset = in_bytes(Klass::vtable_start_offset()) + vtable_index * vtableEntry::size_in_bytes();
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  int method_offset = vtableEntry::method_offset_in_bytes() + entry_offset;
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  assert ((method_offset & (wordSize - 1)) == 0, "offset should be aligned");
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  int offset_mask = AARCH64_ONLY(0xfff << LogBytesPerWord) NOT_AARCH64(0xfff);
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  if (method_offset & ~offset_mask) {
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    __ add(tmp, tmp, method_offset & ~offset_mask);
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  }
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  __ ldr(Rmethod, Address(tmp, method_offset & offset_mask));
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  }
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  address ame_addr = __ pc();
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#ifdef AARCH64
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  __ ldr(tmp, Address(Rmethod, Method::from_compiled_offset()));
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  __ br(tmp);
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#else
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  __ ldr(PC, Address(Rmethod, Method::from_compiled_offset()));
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#endif // AARCH64
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  masm->flush();
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  if (PrintMiscellaneous && (WizardMode || Verbose)) {
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    tty->print_cr("vtable #%d at " PTR_FORMAT "[%d] left over: %d",
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                  vtable_index, p2i(s->entry_point()),
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                  (int)(s->code_end() - s->entry_point()),
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                  (int)(s->code_end() - __ pc()));
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  }
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  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
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  // FIXME ARM: need correct 'slop' - below is x86 code
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  // shut the door on sizing bugs
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  //int slop = 8;  // 32-bit offset is this much larger than a 13-bit one
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  //assert(vtable_index > 10 || __ pc() + slop <= s->code_end(), "room for 32-bit offset");
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  s->set_exception_points(npe_addr, ame_addr);
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  return s;
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}
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VtableStub* VtableStubs::create_itable_stub(int itable_index) {
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  const int code_length = VtableStub::pd_code_size_limit(false);
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  VtableStub* s = new(code_length) VtableStub(false, itable_index);
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  // Can be NULL if there is no free space in the code cache.
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  if (s == NULL) {
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    return NULL;
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  }
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  ResourceMark rm;
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  CodeBuffer cb(s->entry_point(), code_length);
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  MacroAssembler* masm = new MacroAssembler(&cb);
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  assert(VtableStub::receiver_location() == R0->as_VMReg(), "receiver expected in R0");
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  // R0-R3 / R0-R7 registers hold the arguments and cannot be spoiled
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  const Register Rclass  = AARCH64_ONLY(R9)  NOT_AARCH64(R4);
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  const Register Rintf   = AARCH64_ONLY(R10) NOT_AARCH64(R5);
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  const Register Rscan   = AARCH64_ONLY(R11) NOT_AARCH64(R6);
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  assert_different_registers(Ricklass, Rclass, Rintf, Rscan, Rtemp);
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  // Calculate the start of itable (itable goes after vtable)
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  const int scale = exact_log2(vtableEntry::size_in_bytes());
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  address npe_addr = __ pc();
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  __ load_klass(Rclass, R0);
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  Label L_no_such_interface;
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  // Receiver subtype check against REFC.
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  __ ldr(Rintf, Address(Ricklass, CompiledICHolder::holder_klass_offset()));
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  __ lookup_interface_method(// inputs: rec. class, interface, itable index
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                             Rclass, Rintf, noreg,
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                             // outputs: temp reg1, temp reg2
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                             noreg, Rscan, Rtemp,
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                             L_no_such_interface);
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  // Get Method* and entry point for compiler
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  __ ldr(Rintf, Address(Ricklass, CompiledICHolder::holder_metadata_offset()));
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  __ lookup_interface_method(// inputs: rec. class, interface, itable index
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                             Rclass, Rintf, itable_index,
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                             // outputs: temp reg1, temp reg2, temp reg3
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                             Rmethod, Rscan, Rtemp,
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                             L_no_such_interface);
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  address ame_addr = __ pc();
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#ifdef AARCH64
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  __ ldr(Rtemp, Address(Rmethod, Method::from_compiled_offset()));
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  __ br(Rtemp);
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#else
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  __ ldr(PC, Address(Rmethod, Method::from_compiled_offset()));
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#endif // AARCH64
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  __ bind(L_no_such_interface);
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  // Handle IncompatibleClassChangeError in itable stubs.
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  // More detailed error message.
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  // We force resolving of the call site by jumping to the "handle
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  // wrong method" stub, and so let the interpreter runtime do all the
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  // dirty work.
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  assert(SharedRuntime::get_handle_wrong_method_stub() != NULL, "check initialization order");
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  __ jump(SharedRuntime::get_handle_wrong_method_stub(), relocInfo::runtime_call_type, Rtemp);
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  masm->flush();
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  if (PrintMiscellaneous && (WizardMode || Verbose)) {
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    tty->print_cr("itable #%d at " PTR_FORMAT "[%d] left over: %d",
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                  itable_index, p2i(s->entry_point()),
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                  (int)(s->code_end() - s->entry_point()),
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                  (int)(s->code_end() - __ pc()));
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  }
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  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
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  // FIXME ARM: need correct 'slop' - below is x86 code
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  // shut the door on sizing bugs
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  //int slop = 8;  // 32-bit offset is this much larger than a 13-bit one
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  //assert(itable_index > 10 || __ pc() + slop <= s->code_end(), "room for 32-bit offset");
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  s->set_exception_points(npe_addr, ame_addr);
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  return s;
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}
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int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
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  int instr_count;
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  if (is_vtable_stub) {
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    // vtable stub size
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    instr_count = NOT_AARCH64(4) AARCH64_ONLY(5);
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  } else {
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    // itable stub size
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    instr_count = NOT_AARCH64(31) AARCH64_ONLY(31);
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  }
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#ifdef AARCH64
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  if (UseCompressedClassPointers) {
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    instr_count += MacroAssembler::instr_count_for_decode_klass_not_null();
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  }
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#endif // AARCH64
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  return instr_count * Assembler::InstructionSize;
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}
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int VtableStub::pd_code_alignment() {
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  return 8;
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}