hotspot/src/cpu/sparc/vm/assembler_sparc.cpp
author coleenp
Wed, 28 May 2008 21:06:24 -0700
changeset 593 803947e176bd
parent 590 2954744d7bba
child 605 a4a9ed21e981
permissions -rw-r--r--
6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC Summary: decouple set_klass() with zeroing the gap when compressed. Reviewed-by: kvn, ysr, jrose
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/*
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 * Copyright 1997-2007 Sun Microsystems, Inc.  All Rights Reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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 * CA 95054 USA or visit www.sun.com if you need additional information or
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 * have any questions.
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 *
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 */
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#include "incls/_precompiled.incl"
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#include "incls/_assembler_sparc.cpp.incl"
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// Implementation of Address
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Address::Address( addr_type t, int which ) {
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  switch (t) {
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   case extra_in_argument:
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   case extra_out_argument:
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     _base = t == extra_in_argument ? FP : SP;
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     _hi   = 0;
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// Warning:  In LP64 mode, _disp will occupy more than 10 bits.
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//           This is inconsistent with the other constructors but op
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//           codes such as ld or ldx, only access disp() to get their
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//           simm13 argument.
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     _disp = ((which - Argument::n_register_parameters + frame::memory_parameter_word_sp_offset) * BytesPerWord) + STACK_BIAS;
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    break;
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   default:
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    ShouldNotReachHere();
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    break;
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  }
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}
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static const char* argumentNames[][2] = {
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  {"A0","P0"}, {"A1","P1"}, {"A2","P2"}, {"A3","P3"}, {"A4","P4"},
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  {"A5","P5"}, {"A6","P6"}, {"A7","P7"}, {"A8","P8"}, {"A9","P9"},
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  {"A(n>9)","P(n>9)"}
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};
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const char* Argument::name() const {
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  int nofArgs = sizeof argumentNames / sizeof argumentNames[0];
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  int num = number();
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  if (num >= nofArgs)  num = nofArgs - 1;
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  return argumentNames[num][is_in() ? 1 : 0];
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}
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void Assembler::print_instruction(int inst) {
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  const char* s;
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  switch (inv_op(inst)) {
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  default:         s = "????"; break;
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  case call_op:    s = "call"; break;
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  case branch_op:
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    switch (inv_op2(inst)) {
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      case bpr_op2:    s = "bpr";  break;
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      case fb_op2:     s = "fb";   break;
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      case fbp_op2:    s = "fbp";  break;
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      case br_op2:     s = "br";   break;
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      case bp_op2:     s = "bp";   break;
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      case cb_op2:     s = "cb";   break;
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      default:         s = "????"; break;
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    }
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  }
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  ::tty->print("%s", s);
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}
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// Patch instruction inst at offset inst_pos to refer to dest_pos
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// and return the resulting instruction.
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// We should have pcs, not offsets, but since all is relative, it will work out
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// OK.
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int Assembler::patched_branch(int dest_pos, int inst, int inst_pos) {
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  int m; // mask for displacement field
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  int v; // new value for displacement field
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  const int word_aligned_ones = -4;
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  switch (inv_op(inst)) {
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  default: ShouldNotReachHere();
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  case call_op:    m = wdisp(word_aligned_ones, 0, 30);  v = wdisp(dest_pos, inst_pos, 30); break;
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  case branch_op:
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    switch (inv_op2(inst)) {
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      case bpr_op2:    m = wdisp16(word_aligned_ones, 0);      v = wdisp16(dest_pos, inst_pos);     break;
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      case fbp_op2:    m = wdisp(  word_aligned_ones, 0, 19);  v = wdisp(  dest_pos, inst_pos, 19); break;
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      case bp_op2:     m = wdisp(  word_aligned_ones, 0, 19);  v = wdisp(  dest_pos, inst_pos, 19); break;
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      case fb_op2:     m = wdisp(  word_aligned_ones, 0, 22);  v = wdisp(  dest_pos, inst_pos, 22); break;
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      case br_op2:     m = wdisp(  word_aligned_ones, 0, 22);  v = wdisp(  dest_pos, inst_pos, 22); break;
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      case cb_op2:     m = wdisp(  word_aligned_ones, 0, 22);  v = wdisp(  dest_pos, inst_pos, 22); break;
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      default: ShouldNotReachHere();
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    }
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  }
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  return  inst & ~m  |  v;
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}
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// Return the offset of the branch destionation of instruction inst
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// at offset pos.
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// Should have pcs, but since all is relative, it works out.
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int Assembler::branch_destination(int inst, int pos) {
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  int r;
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  switch (inv_op(inst)) {
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  default: ShouldNotReachHere();
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  case call_op:        r = inv_wdisp(inst, pos, 30);  break;
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  case branch_op:
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    switch (inv_op2(inst)) {
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      case bpr_op2:    r = inv_wdisp16(inst, pos);    break;
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      case fbp_op2:    r = inv_wdisp(  inst, pos, 19);  break;
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      case bp_op2:     r = inv_wdisp(  inst, pos, 19);  break;
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      case fb_op2:     r = inv_wdisp(  inst, pos, 22);  break;
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      case br_op2:     r = inv_wdisp(  inst, pos, 22);  break;
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      case cb_op2:     r = inv_wdisp(  inst, pos, 22);  break;
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      default: ShouldNotReachHere();
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    }
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  }
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  return r;
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}
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int AbstractAssembler::code_fill_byte() {
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  return 0x00;                  // illegal instruction 0x00000000
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}
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// Generate a bunch 'o stuff (including v9's
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#ifndef PRODUCT
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void Assembler::test_v9() {
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  add(    G0, G1, G2 );
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  add(    G3,  0, G4 );
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  addcc(  G5, G6, G7 );
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  addcc(  I0,  1, I1 );
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  addc(   I2, I3, I4 );
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  addc(   I5, -1, I6 );
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  addccc( I7, L0, L1 );
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  addccc( L2, (1 << 12) - 2, L3 );
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  Label lbl1, lbl2, lbl3;
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  bind(lbl1);
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  bpr( rc_z,    true, pn, L4, pc(),  relocInfo::oop_type );
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  delayed()->nop();
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  bpr( rc_lez, false, pt, L5, lbl1);
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  delayed()->nop();
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  fb( f_never,     true, pc() + 4,  relocInfo::none);
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  delayed()->nop();
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  fb( f_notEqual, false, lbl2 );
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  delayed()->nop();
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  fbp( f_notZero,        true, fcc0, pn, pc() - 4,  relocInfo::none);
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  delayed()->nop();
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  fbp( f_lessOrGreater, false, fcc1, pt, lbl3 );
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  delayed()->nop();
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  br( equal,  true, pc() + 1024, relocInfo::none);
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  delayed()->nop();
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  br( lessEqual, false, lbl1 );
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  delayed()->nop();
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  br( never, false, lbl1 );
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  delayed()->nop();
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  bp( less,               true, icc, pn, pc(), relocInfo::none);
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  delayed()->nop();
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  bp( lessEqualUnsigned, false, xcc, pt, lbl2 );
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  delayed()->nop();
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  call( pc(), relocInfo::none);
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  delayed()->nop();
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  call( lbl3 );
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  delayed()->nop();
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  casa(  L6, L7, O0 );
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  casxa( O1, O2, O3, 0 );
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  udiv(   O4, O5, O7 );
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  udiv(   G0, (1 << 12) - 1, G1 );
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  sdiv(   G1, G2, G3 );
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  sdiv(   G4, -((1 << 12) - 1), G5 );
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  udivcc( G6, G7, I0 );
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diff changeset
   191
  udivcc( I1, -((1 << 12) - 2), I2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   192
  sdivcc( I3, I4, I5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   193
  sdivcc( I6, -((1 << 12) - 0), I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   194
489c9b5090e2 Initial load
duke
parents:
diff changeset
   195
  done();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   196
  retry();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   197
489c9b5090e2 Initial load
duke
parents:
diff changeset
   198
  fadd( FloatRegisterImpl::S, F0,  F1, F2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   199
  fsub( FloatRegisterImpl::D, F34, F0, F62 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   200
489c9b5090e2 Initial load
duke
parents:
diff changeset
   201
  fcmp(  FloatRegisterImpl::Q, fcc0, F0, F60);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   202
  fcmpe( FloatRegisterImpl::S, fcc1, F31, F30);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   203
489c9b5090e2 Initial load
duke
parents:
diff changeset
   204
  ftox( FloatRegisterImpl::D, F2, F4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   205
  ftoi( FloatRegisterImpl::Q, F4, F8 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   206
489c9b5090e2 Initial load
duke
parents:
diff changeset
   207
  ftof( FloatRegisterImpl::S, FloatRegisterImpl::Q, F3, F12 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   208
489c9b5090e2 Initial load
duke
parents:
diff changeset
   209
  fxtof( FloatRegisterImpl::S, F4, F5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   210
  fitof( FloatRegisterImpl::D, F6, F8 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   211
489c9b5090e2 Initial load
duke
parents:
diff changeset
   212
  fmov( FloatRegisterImpl::Q, F16, F20 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   213
  fneg( FloatRegisterImpl::S, F6, F7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   214
  fabs( FloatRegisterImpl::D, F10, F12 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   215
489c9b5090e2 Initial load
duke
parents:
diff changeset
   216
  fmul( FloatRegisterImpl::Q,  F24, F28, F32 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   217
  fmul( FloatRegisterImpl::S,  FloatRegisterImpl::D,  F8, F9, F14 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   218
  fdiv( FloatRegisterImpl::S,  F10, F11, F12 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   219
489c9b5090e2 Initial load
duke
parents:
diff changeset
   220
  fsqrt( FloatRegisterImpl::S, F13, F14 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   221
489c9b5090e2 Initial load
duke
parents:
diff changeset
   222
  flush( L0, L1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   223
  flush( L2, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   224
489c9b5090e2 Initial load
duke
parents:
diff changeset
   225
  flushw();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   226
489c9b5090e2 Initial load
duke
parents:
diff changeset
   227
  illtrap( (1 << 22) - 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   228
489c9b5090e2 Initial load
duke
parents:
diff changeset
   229
  impdep1( 17, (1 << 19) - 1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   230
  impdep2( 3,  0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   231
489c9b5090e2 Initial load
duke
parents:
diff changeset
   232
  jmpl( L3, L4, L5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   233
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   234
  jmpl( L6, -1, L7, Relocation::spec_simple(relocInfo::none));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   235
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   236
489c9b5090e2 Initial load
duke
parents:
diff changeset
   237
489c9b5090e2 Initial load
duke
parents:
diff changeset
   238
  ldf(    FloatRegisterImpl::S, O0, O1, F15 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   239
  ldf(    FloatRegisterImpl::D, O2, -1, F14 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   240
489c9b5090e2 Initial load
duke
parents:
diff changeset
   241
489c9b5090e2 Initial load
duke
parents:
diff changeset
   242
  ldfsr(  O3, O4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   243
  ldfsr(  O5, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   244
  ldxfsr( O6, O7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   245
  ldxfsr( I0, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   246
489c9b5090e2 Initial load
duke
parents:
diff changeset
   247
  ldfa(  FloatRegisterImpl::D, I1, I2, 1, F16 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   248
  ldfa(  FloatRegisterImpl::Q, I3, -1,    F36 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   249
489c9b5090e2 Initial load
duke
parents:
diff changeset
   250
  ldsb(  I4, I5, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   251
  ldsb(  I7, -1, G0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   252
  ldsh(  G1, G3, G4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   253
  ldsh(  G5, -1, G6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   254
  ldsw(  G7, L0, L1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   255
  ldsw(  L2, -1, L3 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   256
  ldub(  L4, L5, L6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   257
  ldub(  L7, -1, O0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   258
  lduh(  O1, O2, O3 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   259
  lduh(  O4, -1, O5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   260
  lduw(  O6, O7, G0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   261
  lduw(  G1, -1, G2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   262
  ldx(   G3, G4, G5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   263
  ldx(   G6, -1, G7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   264
  ldd(   I0, I1, I2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   265
  ldd(   I3, -1, I4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   266
489c9b5090e2 Initial load
duke
parents:
diff changeset
   267
  ldsba(  I5, I6, 2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   268
  ldsba(  L0, -1, L1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   269
  ldsha(  L2, L3, 3, L4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   270
  ldsha(  L5, -1, L6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   271
  ldswa(  L7, O0, (1 << 8) - 1, O1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   272
  ldswa(  O2, -1, O3 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   273
  lduba(  O4, O5, 0, O6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   274
  lduba(  O7, -1, I0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   275
  lduha(  I1, I2, 1, I3 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   276
  lduha(  I4, -1, I5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   277
  lduwa(  I6, I7, 2, L0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   278
  lduwa(  L1, -1, L2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   279
  ldxa(   L3, L4, 3, L5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   280
  ldxa(   L6, -1, L7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   281
  ldda(   G0, G1, 4, G2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   282
  ldda(   G3, -1, G4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   283
489c9b5090e2 Initial load
duke
parents:
diff changeset
   284
  ldstub(  G5, G6, G7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   285
  ldstub(  O0, -1, O1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   286
489c9b5090e2 Initial load
duke
parents:
diff changeset
   287
  ldstuba( O2, O3, 5, O4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   288
  ldstuba( O5, -1, O6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   289
489c9b5090e2 Initial load
duke
parents:
diff changeset
   290
  and3(    I0, L0, O0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   291
  and3(    G7, -1, O7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   292
  andcc(   L2, I2, G2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   293
  andcc(   L4, -1, G4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   294
  andn(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   295
  andn(    I6, -1, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   296
  andncc(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   297
  andncc(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   298
  or3(     I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   299
  or3(     I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   300
  orcc(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   301
  orcc(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   302
  orn(     I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   303
  orn(     I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   304
  orncc(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   305
  orncc(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   306
  xor3(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   307
  xor3(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   308
  xorcc(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   309
  xorcc(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   310
  xnor(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   311
  xnor(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   312
  xnorcc(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   313
  xnorcc(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   314
489c9b5090e2 Initial load
duke
parents:
diff changeset
   315
  membar( Membar_mask_bits(StoreStore | LoadStore | StoreLoad | LoadLoad | Sync | MemIssue | Lookaside ) );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   316
  membar( StoreStore );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   317
  membar( LoadStore );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   318
  membar( StoreLoad );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   319
  membar( LoadLoad );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   320
  membar( Sync );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   321
  membar( MemIssue );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   322
  membar( Lookaside );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   323
489c9b5090e2 Initial load
duke
parents:
diff changeset
   324
  fmov( FloatRegisterImpl::S, f_ordered,  true, fcc2, F16, F17 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   325
  fmov( FloatRegisterImpl::D, rc_lz, L5, F18, F20 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   326
489c9b5090e2 Initial load
duke
parents:
diff changeset
   327
  movcc( overflowClear,  false, icc, I6, L4 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   328
  movcc( f_unorderedOrEqual, true, fcc2, (1 << 10) - 1, O0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   329
489c9b5090e2 Initial load
duke
parents:
diff changeset
   330
  movr( rc_nz, I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   331
  movr( rc_gz, L1, -1,  L2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   332
489c9b5090e2 Initial load
duke
parents:
diff changeset
   333
  mulx(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   334
  mulx(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   335
  sdivx( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   336
  sdivx( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   337
  udivx( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   338
  udivx( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   339
489c9b5090e2 Initial load
duke
parents:
diff changeset
   340
  umul(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   341
  umul(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   342
  smul(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   343
  smul(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   344
  umulcc( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   345
  umulcc( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   346
  smulcc( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   347
  smulcc( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   348
489c9b5090e2 Initial load
duke
parents:
diff changeset
   349
  mulscc(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   350
  mulscc(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   351
489c9b5090e2 Initial load
duke
parents:
diff changeset
   352
  nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   353
489c9b5090e2 Initial load
duke
parents:
diff changeset
   354
489c9b5090e2 Initial load
duke
parents:
diff changeset
   355
  popc( G0,  G1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   356
  popc( -1, G2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   357
489c9b5090e2 Initial load
duke
parents:
diff changeset
   358
  prefetch(   L1, L2,    severalReads );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   359
  prefetch(   L3, -1,    oneRead );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   360
  prefetcha(  O3, O2, 6, severalWritesAndPossiblyReads );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   361
  prefetcha(  G2, -1,    oneWrite );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   362
489c9b5090e2 Initial load
duke
parents:
diff changeset
   363
  rett( I7, I7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   364
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
  rett( G0, -1, relocInfo::none);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   366
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   367
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
  save(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
  save(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
  restore( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
  restore( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   372
489c9b5090e2 Initial load
duke
parents:
diff changeset
   373
  saved();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   374
  restored();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   375
489c9b5090e2 Initial load
duke
parents:
diff changeset
   376
  sethi( 0xaaaaaaaa, I3, Relocation::spec_simple(relocInfo::none));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   377
489c9b5090e2 Initial load
duke
parents:
diff changeset
   378
  sll(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   379
  sll(  I7, 31, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   380
  srl(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   381
  srl(  I7,  0, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
  sra(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
  sra(  I7, 30, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   384
  sllx( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
  sllx( I7, 63, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
  srlx( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
  srlx( I7,  0, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  srax( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
  srax( I7, 62, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
  sir( -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
  stbar();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   394
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
  stf(    FloatRegisterImpl::Q, F40, G0, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
  stf(    FloatRegisterImpl::S, F18, I3, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
  stfsr(  L1, L2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
  stfsr(  I7, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
  stxfsr( I6, I5 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
  stxfsr( L4, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
  stfa(  FloatRegisterImpl::D, F22, I6, I7, 7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
  stfa(  FloatRegisterImpl::Q, F44, G0, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
  stb(  L5, O2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
  stb(  I7, I6, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
  sth(  L5, O2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
  sth(  I7, I6, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
  stw(  L5, O2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
  stw(  I7, I6, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
  stx(  L5, O2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
  stx(  I7, I6, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  std(  L5, O2, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
  std(  I7, I6, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
  stba(  L5, O2, I7, 8 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
  stba(  I7, I6, -1    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
  stha(  L5, O2, I7, 9 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
  stha(  I7, I6, -1    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
  stwa(  L5, O2, I7, 0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
  stwa(  I7, I6, -1    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
  stxa(  L5, O2, I7, 11 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
  stxa(  I7, I6, -1     );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
  stda(  L5, O2, I7, 12 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   426
  stda(  I7, I6, -1     );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
  sub(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   429
  sub(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
  subcc(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
  subcc(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
  subc(   I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
  subc(   I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
  subccc( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
  subccc( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
489c9b5090e2 Initial load
duke
parents:
diff changeset
   437
  swap( I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
  swap( I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
489c9b5090e2 Initial load
duke
parents:
diff changeset
   440
  swapa(   G0, G1, 13, G2 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
  swapa(   I7, -1,     I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
  taddcc(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
  taddcc(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
  taddcctv(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
  taddcctv(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
  tsubcc(    I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
  tsubcc(    I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
  tsubcctv(  I5, I6, I7 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   451
  tsubcctv(  I7, -1, I6 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
489c9b5090e2 Initial load
duke
parents:
diff changeset
   453
  trap( overflowClear, xcc, G0, G1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
  trap( lessEqual,     icc, I7, 17 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
  bind(lbl2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
  bind(lbl3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
  code()->decode();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
// Generate a bunch 'o stuff unique to V8
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
void Assembler::test_v8_onlys() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
  Label lbl1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
  cb( cp_0or1or2, false, pc() - 4, relocInfo::none);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
  cb( cp_never,    true, lbl1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
  cpop1(1, 2, 3, 4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
  cpop2(5, 6, 7, 8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
  ldc( I0, I1, 31);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
  ldc( I2, -1,  0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
  lddc( I4, I4, 30);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
  lddc( I6,  0, 1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
  ldcsr( L0, L1, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
  ldcsr( L1, (1 << 12) - 1, 17 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
  stc( 31, L4, L5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
  stc( 30, L6, -(1 << 12) );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
  stdc( 0, L7, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
  stdc( 1, G1, 0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
  stcsr( 16, G2, G3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
  stcsr( 17, G4, 1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
489c9b5090e2 Initial load
duke
parents:
diff changeset
   492
  stdcq( 4, G5, G6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
  stdcq( 5, G7, -1 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
  bind(lbl1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
  code()->decode();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   500
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
// Implementation of MacroAssembler
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
void MacroAssembler::null_check(Register reg, int offset) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   504
  if (needs_explicit_null_check((intptr_t)offset)) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   505
    // provoke OS NULL exception if reg = NULL by
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
    // accessing M[reg] w/o changing any registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
    ld_ptr(reg, 0, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   508
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   509
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   510
    // nothing to do, (later) access of M[reg + offset]
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
    // will provoke OS NULL exception if reg = NULL
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
// Ring buffer jumps
489c9b5090e2 Initial load
duke
parents:
diff changeset
   516
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
void MacroAssembler::ret(  bool trace )   { if (trace) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
                                                    mov(I7, O7); // traceable register
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
                                                    JMP(O7, 2 * BytesPerInstWord);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
                                                  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
                                                    jmpl( I7, 2 * BytesPerInstWord, G0 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
                                                  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
                                                }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
void MacroAssembler::retl( bool trace )  { if (trace) JMP(O7, 2 * BytesPerInstWord);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
                                                 else jmpl( O7, 2 * BytesPerInstWord, G0 ); }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
#endif /* PRODUCT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
void MacroAssembler::jmp2(Register r1, Register r2, const char* file, int line ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
  // This can only be traceable if r1 & r2 are visible after a window save
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
  if (TraceJumps) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
    verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
    ld(G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()), O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
    add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
    sll(O0, exact_log2(4*sizeof(intptr_t)), O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
    add(O2, O1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
    add(r1->after_save(), r2->after_save(), O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
    set((intptr_t)file, O3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
    set(line, O4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
    // get nearby pc, store jmp target
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
    call(L, relocInfo::none);  // No relocation for call to pc+0x8
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
    delayed()->st(O2, O1, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
    // store nearby pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
    st(O7, O1, sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
    // store file
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
    st(O3, O1, 2*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
    // store line
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
    st(O4, O1, 3*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
    add(O0, 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
    and3(O0, JavaThread::jump_ring_buffer_size  - 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
    st(O0, G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
#endif /* PRODUCT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   564
  jmpl(r1, r2, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   565
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
void MacroAssembler::jmp(Register r1, int offset, const char* file, int line ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
  // This can only be traceable if r1 is visible after a window save
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
  if (TraceJumps) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
    verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
    ld(G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()), O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
    add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
    sll(O0, exact_log2(4*sizeof(intptr_t)), O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
    add(O2, O1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
    add(r1->after_save(), offset, O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   579
    set((intptr_t)file, O3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
    set(line, O4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
    // get nearby pc, store jmp target
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
    call(L, relocInfo::none);  // No relocation for call to pc+0x8
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
    delayed()->st(O2, O1, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   586
489c9b5090e2 Initial load
duke
parents:
diff changeset
   587
    // store nearby pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
    st(O7, O1, sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
    // store file
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
    st(O3, O1, 2*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
    // store line
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
    st(O4, O1, 3*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
    add(O0, 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
    and3(O0, JavaThread::jump_ring_buffer_size  - 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
    st(O0, G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
#endif /* PRODUCT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
  jmp(r1, offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   601
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
// This code sequence is relocatable to any address, even on LP64.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   603
void MacroAssembler::jumpl( Address& a, Register d, int offset, const char* file, int line ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   604
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   605
  // Force fixed length sethi because NativeJump and NativeFarCall don't handle
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
  // variable length instruction streams.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
  sethi(a, /*ForceRelocatable=*/ true);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
  if (TraceJumps) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
    // Must do the add here so relocation can find the remainder of the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
    // value to be relocated.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
    add(a.base(), a.disp() + offset, a.base(), a.rspec(offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
    verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
    ld(G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()), O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
    add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
    sll(O0, exact_log2(4*sizeof(intptr_t)), O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   618
    add(O2, O1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
    set((intptr_t)file, O3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
    set(line, O4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
    // get nearby pc, store jmp target
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
    call(L, relocInfo::none);  // No relocation for call to pc+0x8
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
    delayed()->st(a.base()->after_save(), O1, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
    // store nearby pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
    st(O7, O1, sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
    // store file
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
    st(O3, O1, 2*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    // store line
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
    st(O4, O1, 3*sizeof(intptr_t));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
    add(O0, 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
    and3(O0, JavaThread::jump_ring_buffer_size  - 1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
    st(O0, G2_thread, in_bytes(JavaThread::jmp_ring_index_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
    jmpl(a.base(), G0, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
    jmpl(a, d, offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
#endif /* PRODUCT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   643
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
    jmpl(a, d, offset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   647
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
void MacroAssembler::jump( Address& a, int offset, const char* file, int line ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
  jumpl( a, G0, offset, file, line );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
// Convert to C varargs format
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
void MacroAssembler::set_varargs( Argument inArg, Register d ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
  // spill register-resident args to their memory slots
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
  // (SPARC calling convention requires callers to have already preallocated these)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
  // Note that the inArg might in fact be an outgoing argument,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   658
  // if a leaf routine or stub does some tricky argument shuffling.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
  // This routine must work even though one of the saved arguments
489c9b5090e2 Initial load
duke
parents:
diff changeset
   660
  // is in the d register (e.g., set_varargs(Argument(0, false), O0)).
489c9b5090e2 Initial load
duke
parents:
diff changeset
   661
  for (Argument savePtr = inArg;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   662
       savePtr.is_register();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
       savePtr = savePtr.successor()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
    st_ptr(savePtr.as_register(), savePtr.address_in_frame());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   665
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   666
  // return the address of the first memory slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
  add(inArg.address_in_frame(), d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   668
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   669
489c9b5090e2 Initial load
duke
parents:
diff changeset
   670
// Conditional breakpoint (for assertion checks in assembly code)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   671
void MacroAssembler::breakpoint_trap(Condition c, CC cc) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   672
  trap(c, cc, G0, ST_RESERVED_FOR_USER_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   673
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   674
489c9b5090e2 Initial load
duke
parents:
diff changeset
   675
// We want to use ST_BREAKPOINT here, but the debugger is confused by it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   676
void MacroAssembler::breakpoint_trap() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   677
  trap(ST_RESERVED_FOR_USER_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
489c9b5090e2 Initial load
duke
parents:
diff changeset
   680
// flush windows (except current) using flushw instruction if avail.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   681
void MacroAssembler::flush_windows() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   682
  if (VM_Version::v9_instructions_work())  flushw();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   683
  else                                     flush_windows_trap();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   684
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
// Write serialization page so VM thread can do a pseudo remote membar
489c9b5090e2 Initial load
duke
parents:
diff changeset
   687
// We use the current thread pointer to calculate a thread specific
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
// offset to write to within the page. This minimizes bus traffic
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
// due to cache line collision.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
void MacroAssembler::serialize_memory(Register thread, Register tmp1, Register tmp2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
  Address mem_serialize_page(tmp1, os::get_memory_serialize_page());
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
  srl(thread, os::get_serialize_page_shift_count(), tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
  if (Assembler::is_simm13(os::vm_page_size())) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   694
    and3(tmp2, (os::vm_page_size() - sizeof(int)), tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   695
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   696
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
    set((os::vm_page_size() - sizeof(int)), tmp1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
    and3(tmp2, tmp1, tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   700
  load_address(mem_serialize_page);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   701
  st(G0, tmp1, tmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   702
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   703
489c9b5090e2 Initial load
duke
parents:
diff changeset
   704
489c9b5090e2 Initial load
duke
parents:
diff changeset
   705
489c9b5090e2 Initial load
duke
parents:
diff changeset
   706
void MacroAssembler::enter() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   707
  Unimplemented();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   708
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   709
489c9b5090e2 Initial load
duke
parents:
diff changeset
   710
void MacroAssembler::leave() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   711
  Unimplemented();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   712
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   713
489c9b5090e2 Initial load
duke
parents:
diff changeset
   714
void MacroAssembler::mult(Register s1, Register s2, Register d) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   715
  if(VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   716
    mulx (s1, s2, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
    smul (s1, s2, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
void MacroAssembler::mult(Register s1, int simm13a, Register d) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
  if(VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
    mulx (s1, simm13a, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
    smul (s1, simm13a, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   727
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   732
void MacroAssembler::read_ccr_v8_assert(Register ccr_save) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   733
  const Register s1 = G3_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   734
  const Register s2 = G4_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
  Label get_psr_test;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
  // Get the condition codes the V8 way.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   737
  read_ccr_trap(s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
  mov(ccr_save, s2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
  // This is a test of V8 which has icc but not xcc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
  // so mask off the xcc bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
  and3(s2, 0xf, s2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   742
  // Compare condition codes from the V8 and V9 ways.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
  subcc(s2, s1, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
  br(Assembler::notEqual, true, Assembler::pt, get_psr_test);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   745
  delayed()->breakpoint_trap();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   746
  bind(get_psr_test);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
void MacroAssembler::write_ccr_v8_assert(Register ccr_save) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
  const Register s1 = G3_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
  const Register s2 = G4_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
  Label set_psr_test;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
  // Write out the saved condition codes the V8 way
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
  write_ccr_trap(ccr_save, s1, s2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
  // Read back the condition codes using the V9 instruction
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
  rdccr(s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   757
  mov(ccr_save, s2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   758
  // This is a test of V8 which has icc but not xcc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
  // so mask off the xcc bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
  and3(s2, 0xf, s2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
  and3(s1, 0xf, s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   762
  // Compare the V8 way with the V9 way.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   763
  subcc(s2, s1, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   764
  br(Assembler::notEqual, true, Assembler::pt, set_psr_test);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   765
  delayed()->breakpoint_trap();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
  bind(set_psr_test);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
#define read_ccr_v8_assert(x)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
#define write_ccr_v8_assert(x)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
void MacroAssembler::read_ccr(Register ccr_save) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
    rdccr(ccr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
    // Test code sequence used on V8.  Do not move above rdccr.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
    read_ccr_v8_assert(ccr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
    read_ccr_trap(ccr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   780
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   781
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   782
489c9b5090e2 Initial load
duke
parents:
diff changeset
   783
void MacroAssembler::write_ccr(Register ccr_save) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   784
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   785
    // Test code sequence used on V8.  Do not move below wrccr.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
    write_ccr_v8_assert(ccr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   787
    wrccr(ccr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   789
    const Register temp_reg1 = G3_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   790
    const Register temp_reg2 = G4_scratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   791
    write_ccr_trap(ccr_save, temp_reg1, temp_reg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   792
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   793
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   794
489c9b5090e2 Initial load
duke
parents:
diff changeset
   795
489c9b5090e2 Initial load
duke
parents:
diff changeset
   796
// Calls to C land
489c9b5090e2 Initial load
duke
parents:
diff changeset
   797
489c9b5090e2 Initial load
duke
parents:
diff changeset
   798
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   799
// a hook for debugging
489c9b5090e2 Initial load
duke
parents:
diff changeset
   800
static Thread* reinitialize_thread() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   801
  return ThreadLocalStorage::thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   802
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   803
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
#define reinitialize_thread ThreadLocalStorage::thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
address last_get_thread = NULL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
// call this when G2_thread is not known to be valid
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
void MacroAssembler::get_thread() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
  save_frame(0);                // to avoid clobbering O0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   814
  mov(G1, L0);                  // avoid clobbering G1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
  mov(G5_method, L1);           // avoid clobbering G5
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
  mov(G3, L2);                  // avoid clobbering G3 also
489c9b5090e2 Initial load
duke
parents:
diff changeset
   817
  mov(G4, L5);                  // avoid clobbering G4
489c9b5090e2 Initial load
duke
parents:
diff changeset
   818
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   819
  Address last_get_thread_addr(L3, (address)&last_get_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   820
  sethi(last_get_thread_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   821
  inc(L4, get_pc(L4) + 2 * BytesPerInstWord); // skip getpc() code + inc + st_ptr to point L4 at call
489c9b5090e2 Initial load
duke
parents:
diff changeset
   822
  st_ptr(L4, last_get_thread_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
  call(CAST_FROM_FN_PTR(address, reinitialize_thread), relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   825
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
  mov(L0, G1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
  mov(L1, G5_method);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
  mov(L2, G3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
  mov(L5, G4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
  restore(O0, 0, G2_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
static Thread* verify_thread_subroutine(Thread* gthread_value) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
  Thread* correct_value = ThreadLocalStorage::thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
  guarantee(gthread_value == correct_value, "G2_thread value must be the thread");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
  return correct_value;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   837
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   838
489c9b5090e2 Initial load
duke
parents:
diff changeset
   839
void MacroAssembler::verify_thread() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   840
  if (VerifyThread) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   841
    // NOTE: this chops off the heads of the 64-bit O registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
#ifdef CC_INTERP
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   845
    // make sure G2_thread contains the right value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   846
    save_frame_and_mov(0, Lmethod, Lmethod);   // to avoid clobbering O0 (and propagate Lmethod for -Xprof)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   847
    mov(G1, L1);                // avoid clobbering G1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
    // G2 saved below
489c9b5090e2 Initial load
duke
parents:
diff changeset
   849
    mov(G3, L3);                // avoid clobbering G3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
    mov(G4, L4);                // avoid clobbering G4
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
    mov(G5_method, L5);         // avoid clobbering G5_method
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
#endif /* CC_INTERP */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   853
#if defined(COMPILER2) && !defined(_LP64)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   854
    // Save & restore possible 64-bit Long arguments in G-regs
489c9b5090e2 Initial load
duke
parents:
diff changeset
   855
    srlx(G1,32,L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
    srlx(G4,32,L6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   857
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
    call(CAST_FROM_FN_PTR(address,verify_thread_subroutine), relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
    delayed()->mov(G2_thread, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   860
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
    mov(L1, G1);                // Restore G1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
    // G2 restored below
489c9b5090e2 Initial load
duke
parents:
diff changeset
   863
    mov(L3, G3);                // restore G3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   864
    mov(L4, G4);                // restore G4
489c9b5090e2 Initial load
duke
parents:
diff changeset
   865
    mov(L5, G5_method);         // restore G5_method
489c9b5090e2 Initial load
duke
parents:
diff changeset
   866
#if defined(COMPILER2) && !defined(_LP64)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   867
    // Save & restore possible 64-bit Long arguments in G-regs
489c9b5090e2 Initial load
duke
parents:
diff changeset
   868
    sllx(L0,32,G2);             // Move old high G1 bits high in G2
489c9b5090e2 Initial load
duke
parents:
diff changeset
   869
    sllx(G1, 0,G1);             // Clear current high G1 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
    or3 (G1,G2,G1);             // Recover 64-bit G1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
    sllx(L6,32,G2);             // Move old high G4 bits high in G2
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
    sllx(G4, 0,G4);             // Clear current high G4 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
    or3 (G4,G2,G4);             // Recover 64-bit G4
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
    restore(O0, 0, G2_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
void MacroAssembler::save_thread(const Register thread_cache) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
  verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
  if (thread_cache->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
    assert(thread_cache->is_local() || thread_cache->is_in(), "bad volatile");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   884
    mov(G2_thread, thread_cache);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   885
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   886
  if (VerifyThread) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   887
    // smash G2_thread, as if the VM were about to anyway
489c9b5090e2 Initial load
duke
parents:
diff changeset
   888
    set(0x67676767, G2_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
489c9b5090e2 Initial load
duke
parents:
diff changeset
   893
void MacroAssembler::restore_thread(const Register thread_cache) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   894
  if (thread_cache->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
    assert(thread_cache->is_local() || thread_cache->is_in(), "bad volatile");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   896
    mov(thread_cache, G2_thread);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
    verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
    // do it the slow way
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
    get_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
// %%% maybe get rid of [re]set_last_Java_frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
void MacroAssembler::set_last_Java_frame(Register last_java_sp, Register last_Java_pc) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   907
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   908
  Address flags(G2_thread,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   909
                0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   910
                in_bytes(JavaThread::frame_anchor_offset()) +
489c9b5090e2 Initial load
duke
parents:
diff changeset
   911
                         in_bytes(JavaFrameAnchor::flags_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   912
  Address pc_addr(G2_thread,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   913
                  0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   914
                  in_bytes(JavaThread::last_Java_pc_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   915
489c9b5090e2 Initial load
duke
parents:
diff changeset
   916
  // Always set last_Java_pc and flags first because once last_Java_sp is visible
489c9b5090e2 Initial load
duke
parents:
diff changeset
   917
  // has_last_Java_frame is true and users will look at the rest of the fields.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
  // (Note: flags should always be zero before we get here so doesn't need to be set.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
  // Verify that flags was zeroed on return to Java
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
  Label PcOk;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
  save_frame(0);                // to avoid clobbering O0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   924
  ld_ptr(pc_addr, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
  tst(L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   926
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   927
  brx(Assembler::zero, false, Assembler::pt, PcOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   928
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
  br(Assembler::zero, false, Assembler::pt, PcOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
#endif // _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   931
  delayed() -> nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   932
  stop("last_Java_pc not zeroed before leaving Java");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   933
  bind(PcOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   934
489c9b5090e2 Initial load
duke
parents:
diff changeset
   935
  // Verify that flags was zeroed on return to Java
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
  Label FlagsOk;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
  ld(flags, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
  tst(L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
  br(Assembler::zero, false, Assembler::pt, FlagsOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   940
  delayed() -> restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
  stop("flags not zeroed before leaving Java");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   942
  bind(FlagsOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   943
#endif /* ASSERT */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
  // When returning from calling out from Java mode the frame anchor's last_Java_pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   946
  // will always be set to NULL. It is set here so that if we are doing a call to
489c9b5090e2 Initial load
duke
parents:
diff changeset
   947
  // native (not VM) that we capture the known pc and don't have to rely on the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   948
  // native call having a standard frame linkage where we can find the pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
  if (last_Java_pc->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   951
    st_ptr(last_Java_pc, pc_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   952
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   953
489c9b5090e2 Initial load
duke
parents:
diff changeset
   954
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
  // Make sure that we have an odd stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
  Label StackOk;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
  andcc(last_java_sp, 0x01, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
  br(Assembler::notZero, false, Assembler::pt, StackOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
  delayed() -> nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
  stop("Stack Not Biased in set_last_Java_frame");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
  bind(StackOk);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
  assert( last_java_sp != G4_scratch, "bad register usage in set_last_Java_frame");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
  add( last_java_sp, STACK_BIAS, G4_scratch );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
  st_ptr(G4_scratch,    Address(G2_thread, 0, in_bytes(JavaThread::last_Java_sp_offset())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   968
  st_ptr(last_java_sp,    Address(G2_thread, 0, in_bytes(JavaThread::last_Java_sp_offset())));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   969
#endif // _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
   970
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   971
489c9b5090e2 Initial load
duke
parents:
diff changeset
   972
void MacroAssembler::reset_last_Java_frame(void) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   973
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   974
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
  Address sp_addr(G2_thread, 0, in_bytes(JavaThread::last_Java_sp_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
  Address pc_addr(G2_thread,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   977
                  0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   978
                  in_bytes(JavaThread::frame_anchor_offset()) + in_bytes(JavaFrameAnchor::last_Java_pc_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   979
  Address flags(G2_thread,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   980
                0,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   981
                in_bytes(JavaThread::frame_anchor_offset()) + in_bytes(JavaFrameAnchor::flags_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   982
489c9b5090e2 Initial load
duke
parents:
diff changeset
   983
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   984
  // check that it WAS previously set
489c9b5090e2 Initial load
duke
parents:
diff changeset
   985
#ifdef CC_INTERP
489c9b5090e2 Initial load
duke
parents:
diff changeset
   986
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   988
    save_frame_and_mov(0, Lmethod, Lmethod);     // Propagate Lmethod to helper frame for -Xprof
489c9b5090e2 Initial load
duke
parents:
diff changeset
   989
#endif /* CC_INTERP */
489c9b5090e2 Initial load
duke
parents:
diff changeset
   990
    ld_ptr(sp_addr, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   991
    tst(L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   992
    breakpoint_trap(Assembler::zero, Assembler::ptr_cc);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   993
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   994
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   995
489c9b5090e2 Initial load
duke
parents:
diff changeset
   996
  st_ptr(G0, sp_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   997
  // Always return last_Java_pc to zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
   998
  st_ptr(G0, pc_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   999
  // Always null flags after return to Java
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1000
  st(G0, flags);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1001
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1003
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
void MacroAssembler::call_VM_base(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
  Register        oop_result,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1006
  Register        thread_cache,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
  Register        last_java_sp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
  address         entry_point,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1009
  int             number_of_arguments,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1010
  bool            check_exceptions)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1011
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1012
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1013
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
  // determine last_java_sp register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
  if (!last_java_sp->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1016
    last_java_sp = SP;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1017
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1018
  // debugging support
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1019
  assert(number_of_arguments >= 0   , "cannot have negative number of arguments");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1020
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1021
  // 64-bit last_java_sp is biased!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
  set_last_Java_frame(last_java_sp, noreg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1023
  if (VerifyThread)  mov(G2_thread, O0); // about to be smashed; pass early
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
  save_thread(thread_cache);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
  // do the call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
  call(entry_point, relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1027
  if (!VerifyThread)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1028
    delayed()->mov(G2_thread, O0);  // pass thread as first argument
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1029
  else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1030
    delayed()->nop();             // (thread already passed)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1031
  restore_thread(thread_cache);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1032
  reset_last_Java_frame();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1033
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1034
  // check for pending exceptions. use Gtemp as scratch register.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1035
  if (check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1036
    check_and_forward_exception(Gtemp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1037
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1038
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1039
  // get oop result if there is one and reset the value in the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1040
  if (oop_result->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1041
    get_vm_result(oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1042
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1044
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1045
void MacroAssembler::check_and_forward_exception(Register scratch_reg)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1046
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1047
  Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1048
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1049
  check_and_handle_popframe(scratch_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1050
  check_and_handle_earlyret(scratch_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1051
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1052
  Address exception_addr(G2_thread, 0, in_bytes(Thread::pending_exception_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1053
  ld_ptr(exception_addr, scratch_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1054
  br_null(scratch_reg,false,pt,L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1055
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1056
  // we use O7 linkage so that forward_exception_entry has the issuing PC
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1057
  call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1058
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1059
  bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1060
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1061
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1062
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1063
void MacroAssembler::check_and_handle_popframe(Register scratch_reg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1064
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1065
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1066
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1067
void MacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1068
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1069
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1070
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
void MacroAssembler::call_VM(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
  call_VM_base(oop_result, noreg, noreg, entry_point, number_of_arguments, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1074
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1075
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
void MacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
  call_VM(oop_result, entry_point, 1, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1083
void MacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
  mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
  call_VM(oop_result, entry_point, 2, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1088
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
void MacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1093
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1094
  mov(arg_2, O2); assert(arg_2 != O1,                "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1095
  mov(arg_3, O3); assert(arg_3 != O1 && arg_3 != O2, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1096
  call_VM(oop_result, entry_point, 3, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1097
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
// Note: The following call_VM overloadings are useful when a "save"
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
// has already been performed by a stub, and the last Java frame is
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
// the previous one.  In that case, last_java_sp must be passed as FP
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1104
// instead of SP.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1105
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1106
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
void MacroAssembler::call_VM(Register oop_result, Register last_java_sp, address entry_point, int number_of_arguments, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1108
  call_VM_base(oop_result, noreg, last_java_sp, entry_point, number_of_arguments, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1110
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1111
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
void MacroAssembler::call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1113
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
  call_VM(oop_result, last_java_sp, entry_point, 1, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1116
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1117
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1118
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1119
void MacroAssembler::call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1120
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1121
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1122
  mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
  call_VM(oop_result, last_java_sp, entry_point, 2, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1126
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1127
void MacroAssembler::call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
  // O0 is reserved for the thread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
  mov(arg_1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
  mov(arg_2, O2); assert(arg_2 != O1,                "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
  mov(arg_3, O3); assert(arg_3 != O1 && arg_3 != O2, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1132
  call_VM(oop_result, last_java_sp, entry_point, 3, check_exceptions);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1133
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
void MacroAssembler::call_VM_leaf_base(Register thread_cache, address entry_point, int number_of_arguments) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
  save_thread(thread_cache);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1140
  // do the call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
  call(entry_point, relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
  restore_thread(thread_cache);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
void MacroAssembler::call_VM_leaf(Register thread_cache, address entry_point, int number_of_arguments) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
  call_VM_leaf_base(thread_cache, entry_point, number_of_arguments);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1150
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1151
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1152
void MacroAssembler::call_VM_leaf(Register thread_cache, address entry_point, Register arg_1) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1153
  mov(arg_1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1154
  call_VM_leaf(thread_cache, entry_point, 1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1155
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1157
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
void MacroAssembler::call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1159
  mov(arg_1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1160
  mov(arg_2, O1); assert(arg_2 != O0, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
  call_VM_leaf(thread_cache, entry_point, 2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1164
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
void MacroAssembler::call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2, Register arg_3) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
  mov(arg_1, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
  mov(arg_2, O1); assert(arg_2 != O0,                "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1168
  mov(arg_3, O2); assert(arg_3 != O0 && arg_3 != O1, "smashed argument");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1169
  call_VM_leaf(thread_cache, entry_point, 3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1171
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
void MacroAssembler::get_vm_result(Register oop_result) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1174
  verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1175
  Address vm_result_addr(G2_thread, 0, in_bytes(JavaThread::vm_result_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1176
  ld_ptr(    vm_result_addr, oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1177
  st_ptr(G0, vm_result_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1178
  verify_oop(oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1179
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1180
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1181
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
void MacroAssembler::get_vm_result_2(Register oop_result) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
  verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
  Address vm_result_addr_2(G2_thread, 0, in_bytes(JavaThread::vm_result_2_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1185
  ld_ptr(vm_result_addr_2, oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1186
  st_ptr(G0, vm_result_addr_2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1187
  verify_oop(oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1188
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1189
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1190
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1191
// We require that C code which does not return a value in vm_result will
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1192
// leave it undisturbed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1193
void MacroAssembler::set_vm_result(Register oop_result) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1194
  verify_thread();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1195
  Address vm_result_addr(G2_thread, 0, in_bytes(JavaThread::vm_result_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1196
  verify_oop(oop_result);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1197
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1198
# ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1199
    // Check that we are not overwriting any other oop.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1200
#ifdef CC_INTERP
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1201
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1202
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
    save_frame_and_mov(0, Lmethod, Lmethod);     // Propagate Lmethod for -Xprof
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1204
#endif /* CC_INTERP */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
    ld_ptr(vm_result_addr, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
    tst(L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
    breakpoint_trap(notZero, Assembler::ptr_cc);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1209
    // }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
# endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
  st_ptr(oop_result, vm_result_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
void MacroAssembler::store_check(Register tmp, Register obj) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
  // Use two shifts to clear out those low order two bits! (Cannot opt. into 1.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
  /* $$$ This stuff needs to go into one of the BarrierSet generator
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1220
     functions.  (The particular barrier sets will have to be friends of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
     MacroAssembler, I guess.) */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
  BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
  assert(bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
  CardTableModRefBS* ct = (CardTableModRefBS*)bs;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1225
  assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1226
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
  srlx(obj, CardTableModRefBS::card_shift, obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1228
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
  srl(obj, CardTableModRefBS::card_shift, obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
  assert( tmp != obj, "need separate temp reg");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
  Address rs(tmp, (address)ct->byte_map_base);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1233
  load_address(rs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
  stb(G0, rs.base(), obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1236
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1237
void MacroAssembler::store_check(Register tmp, Register obj, Register offset) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1238
  store_check(tmp, obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1239
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1240
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1241
// %%% Note:  The following six instructions have been moved,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1242
//            unchanged, from assembler_sparc.inline.hpp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
//            They will be refactored at a later date.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
void MacroAssembler::sethi(intptr_t imm22a,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1246
                            Register d,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1247
                            bool ForceRelocatable,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1248
                            RelocationHolder const& rspec) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
  Address adr( d, (address)imm22a, rspec );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
  MacroAssembler::sethi( adr, ForceRelocatable );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1253
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1254
void MacroAssembler::sethi(Address& a, bool ForceRelocatable) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1255
  address save_pc;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1256
  int shiftcnt;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1257
  // if addr of local, do not need to load it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1258
  assert(a.base() != FP  &&  a.base() != SP, "just use ld or st for locals");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1259
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1260
# ifdef CHECK_DELAY
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1261
  assert_not_delayed( (char *)"cannot put two instructions in delay slot" );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1262
# endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1263
  v9_dep();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1264
//  ForceRelocatable = 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1265
  save_pc = pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1266
  if (a.hi32() == 0 && a.low32() >= 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
    Assembler::sethi(a.low32(), a.base(), a.rspec());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1268
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
  else if (a.hi32() == -1) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
    Assembler::sethi(~a.low32(), a.base(), a.rspec());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1271
    xor3(a.base(), ~low10(~0), a.base());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1273
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1274
    Assembler::sethi(a.hi32(), a.base(), a.rspec() );   // 22
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1275
    if ( a.hi32() & 0x3ff )                     // Any bits?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1276
      or3( a.base(), a.hi32() & 0x3ff ,a.base() ); // High 32 bits are now in low 32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1277
    if ( a.low32() & 0xFFFFFC00 ) {             // done?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1278
      if( (a.low32() >> 20) & 0xfff ) {         // Any bits set?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1279
        sllx(a.base(), 12, a.base());           // Make room for next 12 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
        or3( a.base(), (a.low32() >> 20) & 0xfff,a.base() ); // Or in next 12
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1281
        shiftcnt = 0;                           // We already shifted
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
      else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
        shiftcnt = 12;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
      if( (a.low32() >> 10) & 0x3ff ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
        sllx(a.base(), shiftcnt+10, a.base());// Make room for last 10 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
        or3( a.base(), (a.low32() >> 10) & 0x3ff,a.base() ); // Or in next 10
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
        shiftcnt = 0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
      else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
        shiftcnt = 10;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1292
      sllx(a.base(), shiftcnt+10 , a.base());           // Shift leaving disp field 0'd
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1293
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
    else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
      sllx( a.base(), 32, a.base() );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1297
  // Pad out the instruction sequence so it can be
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
  // patched later.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1299
  if ( ForceRelocatable || (a.rtype() != relocInfo::none &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1300
                            a.rtype() != relocInfo::runtime_call_type) ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1301
    while ( pc() < (save_pc + (7 * BytesPerInstWord )) )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1302
      nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1303
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1304
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1305
  Assembler::sethi(a.hi(), a.base(), a.rspec());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1306
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1307
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1308
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1309
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1310
int MacroAssembler::size_of_sethi(address a, bool worst_case) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1311
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1312
  if (worst_case) return 7;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1313
  intptr_t iaddr = (intptr_t)a;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1314
  int hi32 = (int)(iaddr >> 32);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1315
  int lo32 = (int)(iaddr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1316
  int inst_count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1317
  if (hi32 == 0 && lo32 >= 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1318
    inst_count = 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
  else if (hi32 == -1)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
    inst_count = 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
    inst_count = 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
    if ( hi32 & 0x3ff )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
      inst_count++;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
    if ( lo32 & 0xFFFFFC00 ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
      if( (lo32 >> 20) & 0xfff ) inst_count += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
      if( (lo32 >> 10) & 0x3ff ) inst_count += 2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
  return BytesPerInstWord * inst_count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
  return BytesPerInstWord;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1333
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
int MacroAssembler::worst_case_size_of_set() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
  return size_of_sethi(NULL, true) + 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1338
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1340
void MacroAssembler::set(intptr_t value, Register d,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1341
                         RelocationHolder const& rspec) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1342
  Address val( d, (address)value, rspec);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1343
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1344
  if ( rspec.type() == relocInfo::none ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1345
    // can optimize
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1346
    if (-4096 <= value  &&  value <= 4095) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1347
      or3(G0, value, d); // setsw (this leaves upper 32 bits sign-extended)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1348
      return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1349
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1350
    if (inv_hi22(hi22(value)) == value) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1351
      sethi(val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1352
      return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1353
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1354
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1355
  assert_not_delayed( (char *)"cannot put two instructions in delay slot" );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1356
  sethi( val );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1357
  if (rspec.type() != relocInfo::none || (value & 0x3ff) != 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
    add( d, value &  0x3ff, d, rspec);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1359
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
void MacroAssembler::setsw(int value, Register d,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1363
                           RelocationHolder const& rspec) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
  Address val( d, (address)value, rspec);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
  if ( rspec.type() == relocInfo::none ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
    // can optimize
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1367
    if (-4096 <= value  &&  value <= 4095) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
      or3(G0, value, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1369
      return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1370
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1371
    if (inv_hi22(hi22(value)) == value) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
      sethi( val );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
#ifndef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
      if ( value < 0 ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
        assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
        sra (d, G0, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1377
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1378
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1379
      return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1380
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1381
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1383
  sethi( val );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1384
  add( d, value &  0x3ff, d, rspec);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1385
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1386
  // (A negative value could be loaded in 2 insns with sethi/xor,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1387
  // but it would take a more complex relocation.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1388
#ifndef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1389
  if ( value < 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1390
    sra(d, G0, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1391
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1394
// %%% End of moved six set instructions.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1395
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
void MacroAssembler::set64(jlong value, Register d, Register tmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1398
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1399
  v9_dep();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1400
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1401
  int hi = (int)(value >> 32);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
  int lo = (int)(value & ~0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1403
  // (Matcher::isSimpleConstant64 knows about the following optimizations.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1404
  if (Assembler::is_simm13(lo) && value == lo) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1405
    or3(G0, lo, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1406
  } else if (hi == 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1407
    Assembler::sethi(lo, d);   // hardware version zero-extends to upper 32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
    if (low10(lo) != 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1409
      or3(d, low10(lo), d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1410
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1411
  else if (hi == -1) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1412
    Assembler::sethi(~lo, d);  // hardware version zero-extends to upper 32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1413
    xor3(d, low10(lo) ^ ~low10(~0), d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1414
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
  else if (lo == 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1416
    if (Assembler::is_simm13(hi)) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1417
      or3(G0, hi, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1418
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1419
      Assembler::sethi(hi, d);   // hardware version zero-extends to upper 32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1420
      if (low10(hi) != 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1421
        or3(d, low10(hi), d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1422
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1423
    sllx(d, 32, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1424
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1425
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1426
    Assembler::sethi(hi, tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1427
    Assembler::sethi(lo,   d); // macro assembler version sign-extends
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1428
    if (low10(hi) != 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1429
      or3 (tmp, low10(hi), tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1430
    if (low10(lo) != 0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1431
      or3 (  d, low10(lo),   d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
    sllx(tmp, 32, tmp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1433
    or3 (d, tmp, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1434
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1436
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1437
// compute size in bytes of sparc frame, given
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1438
// number of extraWords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1439
int MacroAssembler::total_frame_size_in_bytes(int extraWords) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1440
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1441
  int nWords = frame::memory_parameter_word_sp_offset;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1442
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1443
  nWords += extraWords;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1444
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
  if (nWords & 1) ++nWords; // round up to double-word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1446
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1447
  return nWords * BytesPerWord;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1451
// save_frame: given number of "extra" words in frame,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
// issue approp. save instruction (p 200, v8 manual)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1454
void MacroAssembler::save_frame(int extraWords = 0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
  int delta = -total_frame_size_in_bytes(extraWords);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
  if (is_simm13(delta)) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    save(SP, delta, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1458
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1459
    set(delta, G3_scratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
    save(SP, G3_scratch, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1462
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
void MacroAssembler::save_frame_c1(int size_in_bytes) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
  if (is_simm13(-size_in_bytes)) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1467
    save(SP, -size_in_bytes, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1468
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
    set(-size_in_bytes, G3_scratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1470
    save(SP, G3_scratch, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1474
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
void MacroAssembler::save_frame_and_mov(int extraWords,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1476
                                        Register s1, Register d1,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
                                        Register s2, Register d2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1478
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
  // The trick here is to use precisely the same memory word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
  // that trap handlers also use to save the register.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1482
  // This word cannot be used for any other purpose, but
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1483
  // it works fine to save the register's value, whether or not
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
  // an interrupt flushes register windows at any given moment!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1485
  Address s1_addr;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1486
  if (s1->is_valid() && (s1->is_in() || s1->is_local())) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1487
    s1_addr = s1->address_in_saved_window();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1488
    st_ptr(s1, s1_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1489
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1490
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1491
  Address s2_addr;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1492
  if (s2->is_valid() && (s2->is_in() || s2->is_local())) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1493
    s2_addr = s2->address_in_saved_window();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1494
    st_ptr(s2, s2_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1495
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1496
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1497
  save_frame(extraWords);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1498
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1499
  if (s1_addr.base() == SP) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
    ld_ptr(s1_addr.after_save(), d1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1501
  } else if (s1->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1502
    mov(s1->after_save(), d1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1503
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1504
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1505
  if (s2_addr.base() == SP) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1506
    ld_ptr(s2_addr.after_save(), d2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1507
  } else if (s2->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
    mov(s2->after_save(), d2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1509
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1510
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1512
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1513
Address MacroAssembler::allocate_oop_address(jobject obj, Register d) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
  assert(oop_recorder() != NULL, "this assembler needs an OopRecorder");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
  int oop_index = oop_recorder()->allocate_index(obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
  return Address(d, address(obj), oop_Relocation::spec(oop_index));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1518
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1519
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1520
Address MacroAssembler::constant_oop_address(jobject obj, Register d) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1521
  assert(oop_recorder() != NULL, "this assembler needs an OopRecorder");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1522
  int oop_index = oop_recorder()->find_index(obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1523
  return Address(d, address(obj), oop_Relocation::spec(oop_index));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1524
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1525
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1526
void  MacroAssembler::set_narrow_oop(jobject obj, Register d) {
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1527
  assert(oop_recorder() != NULL, "this assembler needs an OopRecorder");
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1528
  int oop_index = oop_recorder()->find_index(obj);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1529
  RelocationHolder rspec = oop_Relocation::spec(oop_index);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1530
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1531
  assert_not_delayed();
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1532
  // Relocation with special format (see relocInfo_sparc.hpp).
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1533
  relocate(rspec, 1);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1534
  // Assembler::sethi(0x3fffff, d);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1535
  emit_long( op(branch_op) | rd(d) | op2(sethi_op2) | hi22(0x3fffff) );
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1536
  // Don't add relocation for 'add'. Do patching during 'sethi' processing.
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1537
  add(d, 0x3ff, d);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1538
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1539
}
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  1540
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1541
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
void MacroAssembler::align(int modulus) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1543
  while (offset() % modulus != 0) nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1547
void MacroAssembler::safepoint() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1548
  relocate(breakpoint_Relocation::spec(breakpoint_Relocation::safepoint));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
void RegistersForDebugging::print(outputStream* s) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
  int j;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
  for ( j = 0;  j < 8;  ++j )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
    if ( j != 6 ) s->print_cr("i%d = 0x%.16lx", j, i[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1556
    else          s->print_cr( "fp = 0x%.16lx",    i[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1557
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
  for ( j = 0;  j < 8;  ++j )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
    s->print_cr("l%d = 0x%.16lx", j, l[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
  for ( j = 0;  j < 8;  ++j )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
    if ( j != 6 ) s->print_cr("o%d = 0x%.16lx", j, o[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
    else          s->print_cr( "sp = 0x%.16lx",    o[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
  for ( j = 0;  j < 8;  ++j )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
    s->print_cr("g%d = 0x%.16lx", j, g[j]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
  // print out floats with compression
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
  for (j = 0; j < 32; ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
    jfloat val = f[j];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
    int last = j;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
    for ( ;  last+1 < 32;  ++last ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
      char b1[1024], b2[1024];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
      sprintf(b1, "%f", val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
      sprintf(b2, "%f", f[last+1]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1580
      if (strcmp(b1, b2))
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1583
    s->print("f%d", j);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
    if ( j != last )  s->print(" - f%d", last);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
    s->print(" = %f", val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
    s->fill_to(25);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
    s->print_cr(" (0x%x)", val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
    j = last + 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
  // and doubles (evens only)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
  for (j = 0; j < 32; ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
    jdouble val = d[j];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    int last = j;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
    for ( ;  last+1 < 32;  ++last ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
      char b1[1024], b2[1024];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
      sprintf(b1, "%f", val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
      sprintf(b2, "%f", d[last+1]);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
      if (strcmp(b1, b2))
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1602
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1603
    s->print("d%d", 2 * j);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1604
    if ( j != last )  s->print(" - d%d", last);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1605
    s->print(" = %f", val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1606
    s->fill_to(30);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
    s->print("(0x%x)", *(int*)&val);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
    s->fill_to(42);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
    s->print_cr("(0x%x)", *(1 + (int*)&val));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
    j = last + 1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1611
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1612
  s->cr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1613
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
void RegistersForDebugging::save_registers(MacroAssembler* a) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1616
  a->sub(FP, round_to(sizeof(RegistersForDebugging), sizeof(jdouble)) - STACK_BIAS, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1617
  a->flush_windows();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1618
  int i;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
  for (i = 0; i < 8; ++i) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
    a->ld_ptr(as_iRegister(i)->address_in_saved_window().after_save(), L1);  a->st_ptr( L1, O0, i_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
    a->ld_ptr(as_lRegister(i)->address_in_saved_window().after_save(), L1);  a->st_ptr( L1, O0, l_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
    a->st_ptr(as_oRegister(i)->after_save(), O0, o_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
    a->st_ptr(as_gRegister(i)->after_save(), O0, g_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1625
  for (i = 0;  i < 32; ++i) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
    a->stf(FloatRegisterImpl::S, as_FloatRegister(i), O0, f_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
  for (i = 0; i < (VM_Version::v9_instructions_work() ? 64 : 32); i += 2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
    a->stf(FloatRegisterImpl::D, as_FloatRegister(i), O0, d_offset(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1633
void RegistersForDebugging::restore_registers(MacroAssembler* a, Register r) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
  for (int i = 1; i < 8;  ++i) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
    a->ld_ptr(r, g_offset(i), as_gRegister(i));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
  for (int j = 0; j < 32; ++j) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1638
    a->ldf(FloatRegisterImpl::S, O0, f_offset(j), as_FloatRegister(j));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1639
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
  for (int k = 0; k < (VM_Version::v9_instructions_work() ? 64 : 32); k += 2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
    a->ldf(FloatRegisterImpl::D, O0, d_offset(k), as_FloatRegister(k));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1643
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
// pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
void MacroAssembler::push_fTOS() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
  // %%%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1650
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1651
// pops double TOS element from CPU stack and pushes on FPU stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
void MacroAssembler::pop_fTOS() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
  // %%%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
void MacroAssembler::empty_FPU_stack() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
  // %%%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
void MacroAssembler::_verify_oop(Register reg, const char* msg, const char * file, int line) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
  // plausibility check for oops
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1662
  if (!VerifyOops) return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1663
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1664
  if (reg == G0)  return;       // always NULL, which is always an oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1665
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1666
  char buffer[16];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1667
  sprintf(buffer, "%d", line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1668
  int len = strlen(file) + strlen(msg) + 1 + 4 + strlen(buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1669
  char * real_msg = new char[len];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1670
  sprintf(real_msg, "%s (%s:%d)", msg, file, line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1671
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1672
  // Call indirectly to solve generation ordering problem
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1673
  Address a(O7, (address)StubRoutines::verify_oop_subroutine_entry_address());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1674
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1675
  // Make some space on stack above the current register window.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1676
  // Enough to hold 8 64-bit registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1677
  add(SP,-8*8,SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1678
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1679
  // Save some 64-bit registers; a normal 'save' chops the heads off
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1680
  // of 64-bit longs in the 32-bit build.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1681
  stx(O0,SP,frame::register_save_words*wordSize+STACK_BIAS+0*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
  stx(O1,SP,frame::register_save_words*wordSize+STACK_BIAS+1*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
  mov(reg,O0); // Move arg into O0; arg might be in O7 which is about to be crushed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
  stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
  set((intptr_t)real_msg, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
  // Load address to call to into O7
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
  load_ptr_contents(a, O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
  // Register call to verify_oop_subroutine
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
  callr(O7, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
  // recover frame size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
  add(SP, 8*8,SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
void MacroAssembler::_verify_oop_addr(Address addr, const char* msg, const char * file, int line) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1697
  // plausibility check for oops
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1698
  if (!VerifyOops) return;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1699
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
  char buffer[64];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
  sprintf(buffer, "%d", line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
  int len = strlen(file) + strlen(msg) + 1 + 4 + strlen(buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
  sprintf(buffer, " at SP+%d ", addr.disp());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
  len += strlen(buffer);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
  char * real_msg = new char[len];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
  sprintf(real_msg, "%s at SP+%d (%s:%d)", msg, addr.disp(), file, line);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
  // Call indirectly to solve generation ordering problem
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
  Address a(O7, (address)StubRoutines::verify_oop_subroutine_entry_address());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1710
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
  // Make some space on stack above the current register window.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
  // Enough to hold 8 64-bit registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1713
  add(SP,-8*8,SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1714
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1715
  // Save some 64-bit registers; a normal 'save' chops the heads off
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1716
  // of 64-bit longs in the 32-bit build.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1717
  stx(O0,SP,frame::register_save_words*wordSize+STACK_BIAS+0*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1718
  stx(O1,SP,frame::register_save_words*wordSize+STACK_BIAS+1*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1719
  ld_ptr(addr.base(), addr.disp() + 8*8, O0); // Load arg into O0; arg might be in O7 which is about to be crushed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
  stx(O7,SP,frame::register_save_words*wordSize+STACK_BIAS+7*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
  set((intptr_t)real_msg, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
  // Load address to call to into O7
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1724
  load_ptr_contents(a, O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1725
  // Register call to verify_oop_subroutine
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1726
  callr(O7, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1728
  // recover frame size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1729
  add(SP, 8*8,SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1730
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1731
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1732
// side-door communication with signalHandler in os_solaris.cpp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1733
address MacroAssembler::_verify_oop_implicit_branch[3] = { NULL };
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
// This macro is expanded just once; it creates shared code.  Contract:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
// receives an oop in O0.  Must restore O0 & O7 from TLS.  Must not smash ANY
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1737
// registers, including flags.  May not use a register 'save', as this blows
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
// the high bits of the O-regs if they contain Long values.  Acts as a 'leaf'
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
// call.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
void MacroAssembler::verify_oop_subroutine() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1741
  assert( VM_Version::v9_instructions_work(), "VerifyOops not supported for V8" );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
  // Leaf call; no frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
  Label succeed, fail, null_or_fail;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1746
  // O0 and O7 were saved already (O0 in O0's TLS home, O7 in O5's TLS home).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1747
  // O0 is now the oop to be checked.  O7 is the return address.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
  Register O0_obj = O0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
  // Save some more registers for temps.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1751
  stx(O2,SP,frame::register_save_words*wordSize+STACK_BIAS+2*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1752
  stx(O3,SP,frame::register_save_words*wordSize+STACK_BIAS+3*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
  stx(O4,SP,frame::register_save_words*wordSize+STACK_BIAS+4*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
  stx(O5,SP,frame::register_save_words*wordSize+STACK_BIAS+5*8);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1755
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
  // Save flags
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
  Register O5_save_flags = O5;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
  rdccr( O5_save_flags );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1760
  { // count number of verifies
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1761
    Register O2_adr   = O2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
    Register O3_accum = O3;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
    Address count_addr( O2_adr, (address) StubRoutines::verify_oop_count_addr() );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
    sethi(count_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
    ld(count_addr, O3_accum);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
    inc(O3_accum);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
    st(O3_accum, count_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1769
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1770
  Register O2_mask = O2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1771
  Register O3_bits = O3;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
  Register O4_temp = O4;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1774
  // mark lower end of faulting range
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
  assert(_verify_oop_implicit_branch[0] == NULL, "set once");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
  _verify_oop_implicit_branch[0] = pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
  // We can't check the mark oop because it could be in the process of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
  // locking or unlocking while this is running.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
  set(Universe::verify_oop_mask (), O2_mask);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
  set(Universe::verify_oop_bits (), O3_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
  // assert((obj & oop_mask) == oop_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
  and3(O0_obj, O2_mask, O4_temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1785
  cmp(O4_temp, O3_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
  brx(notEqual, false, pn, null_or_fail);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1787
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1788
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
  if ((NULL_WORD & Universe::verify_oop_mask()) == Universe::verify_oop_bits()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
    // the null_or_fail case is useless; must test for null separately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
    br_null(O0_obj, false, pn, succeed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
  // Check the klassOop of this object for being in the right area of memory.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
  // Cannot do the load in the delay above slot in case O0 is null
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1797
  load_klass(O0_obj, O0_obj);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
  // assert((klass & klass_mask) == klass_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
  if( Universe::verify_klass_mask() != Universe::verify_oop_mask() )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
    set(Universe::verify_klass_mask(), O2_mask);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1801
  if( Universe::verify_klass_bits() != Universe::verify_oop_bits() )
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
    set(Universe::verify_klass_bits(), O3_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
  and3(O0_obj, O2_mask, O4_temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
  cmp(O4_temp, O3_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
  brx(notEqual, false, pn, fail);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1806
  delayed()->nop();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
  // Check the klass's klass
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  1808
  load_klass(O0_obj, O0_obj);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1809
  and3(O0_obj, O2_mask, O4_temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1810
  cmp(O4_temp, O3_bits);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1811
  brx(notEqual, false, pn, fail);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1812
  delayed()->wrccr( O5_save_flags ); // Restore CCR's
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1813
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
  // mark upper end of faulting range
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
  _verify_oop_implicit_branch[1] = pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1816
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1817
  //-----------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1818
  // all tests pass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1819
  bind(succeed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1821
  // Restore prior 64-bit registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1822
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+0*8,O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1823
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+1*8,O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+2*8,O2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+3*8,O3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1826
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+4*8,O4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1827
  ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+5*8,O5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1828
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
  retl();                       // Leaf return; restore prior O7 in delay slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
  delayed()->ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+7*8,O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
  //-----------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
  bind(null_or_fail);           // nulls are less common but OK
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1834
  br_null(O0_obj, false, pt, succeed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1835
  delayed()->wrccr( O5_save_flags ); // Restore CCR's
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
  //-----------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1838
  // report failure:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1839
  bind(fail);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1840
  _verify_oop_implicit_branch[2] = pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1841
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1842
  wrccr( O5_save_flags ); // Restore CCR's
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1843
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
  save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1845
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1846
  // stop_subroutine expects message pointer in I1.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1847
  mov(I1, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1848
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1849
  // Restore prior 64-bit registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+0*8,I0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1851
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+1*8,I1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1852
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+2*8,I2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+3*8,I3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+4*8,I4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
  ldx(FP,frame::register_save_words*wordSize+STACK_BIAS+5*8,I5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
  // factor long stop-sequence into subroutine to save space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
  assert(StubRoutines::Sparc::stop_subroutine_entry_address(), "hasn't been generated yet");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1860
  // call indirectly to solve generation ordering problem
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1861
  Address a(O5, (address)StubRoutines::Sparc::stop_subroutine_entry_address());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1862
  load_ptr_contents(a, O5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1863
  jmpl(O5, 0, O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1864
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1865
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1866
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
void MacroAssembler::stop(const char* msg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
  // save frame first to get O7 for return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
  // add one word to size in case struct is odd number of words long
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
  // It must be doubleword-aligned for storing doubles into it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1873
    save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
    // stop_subroutine expects message pointer in I1.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1876
    set((intptr_t)msg, O1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1877
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1878
    // factor long stop-sequence into subroutine to save space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1879
    assert(StubRoutines::Sparc::stop_subroutine_entry_address(), "hasn't been generated yet");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1880
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1881
    // call indirectly to solve generation ordering problem
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
    Address a(O5, (address)StubRoutines::Sparc::stop_subroutine_entry_address());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
    load_ptr_contents(a, O5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1884
    jmpl(O5, 0, O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1885
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1886
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1887
    breakpoint_trap();   // make stop actually stop rather than writing
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1888
                         // unnoticeable results in the output files.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1889
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1890
    // restore(); done in callee to save space!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1891
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1892
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
void MacroAssembler::warn(const char* msg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1895
  save_frame(::round_to(sizeof(RegistersForDebugging) / BytesPerWord, 2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1896
  RegistersForDebugging::save_registers(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1897
  mov(O0, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1898
  set((intptr_t)msg, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1899
  call( CAST_FROM_FN_PTR(address, warning) );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1900
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1901
//  ret();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1902
//  delayed()->restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1903
  RegistersForDebugging::restore_registers(this, L0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1904
  restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1905
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1906
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1907
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1908
void MacroAssembler::untested(const char* what) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1909
  // We must be able to turn interactive prompting off
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1910
  // in order to run automated test scripts on the VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
  // Use the flag ShowMessageBoxOnError
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1912
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1913
  char* b = new char[1024];
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
  sprintf(b, "untested: %s", what);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1915
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1916
  if ( ShowMessageBoxOnError )   stop(b);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1917
  else                           warn(b);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1918
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1920
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1921
void MacroAssembler::stop_subroutine() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
  RegistersForDebugging::save_registers(this);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1923
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1924
  // for the sake of the debugger, stick a PC on the current frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
  // (this assumes that the caller has performed an extra "save")
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
  mov(I7, L7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1927
  add(O7, -7 * BytesPerInt, I7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1928
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1929
  save_frame(); // one more save to free up another O7 register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1930
  mov(I0, O1); // addr of reg save area
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1931
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1932
  // We expect pointer to message in I1. Caller must set it up in O1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1933
  mov(I1, O0); // get msg
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1934
  call (CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1935
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1936
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1937
  restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1938
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1939
  RegistersForDebugging::restore_registers(this, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1940
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
  save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
  call(CAST_FROM_FN_PTR(address,breakpoint));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1943
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1944
  restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1945
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1946
  mov(L7, I7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1947
  retl();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1948
  delayed()->restore(); // see stop above
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1949
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1950
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1951
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1952
void MacroAssembler::debug(char* msg, RegistersForDebugging* regs) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1953
  if ( ShowMessageBoxOnError ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1954
      JavaThreadState saved_state = JavaThread::current()->thread_state();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1955
      JavaThread::current()->set_thread_state(_thread_in_vm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1956
      {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1957
        // In order to get locks work, we need to fake a in_VM state
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1958
        ttyLocker ttyl;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
        ::tty->print_cr("EXECUTION STOPPED: %s\n", msg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1960
        if (CountBytecodes || TraceBytecodes || StopInterpreterAt) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
          ::tty->print_cr("Interpreter::bytecode_counter = %d", BytecodeCounter::counter_value());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1962
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1963
        if (os::message_box(msg, "Execution stopped, print registers?"))
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
          regs->print(::tty);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1965
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1966
      ThreadStateTransition::transition(JavaThread::current(), _thread_in_vm, saved_state);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1967
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1968
  else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1969
     ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", msg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1970
  assert(false, "error");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1972
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1973
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1974
#ifndef PRODUCT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
void MacroAssembler::test() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
  ResourceMark rm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
  CodeBuffer cb("test", 10000, 10000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
  MacroAssembler* a = new MacroAssembler(&cb);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
  VM_Version::allow_all();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
  a->test_v9();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1982
  a->test_v8_onlys();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
  VM_Version::revert();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1985
  StubRoutines::Sparc::test_stop_entry()();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1986
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1987
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1988
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1989
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1990
void MacroAssembler::calc_mem_param_words(Register Rparam_words, Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1991
  subcc( Rparam_words, Argument::n_register_parameters, Rresult); // how many mem words?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1992
  Label no_extras;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1993
  br( negative, true, pt, no_extras ); // if neg, clear reg
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1994
  delayed()->set( 0, Rresult);         // annuled, so only if taken
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1995
  bind( no_extras );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1996
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1997
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
void MacroAssembler::calc_frame_size(Register Rextra_words, Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
  add(Rextra_words, frame::memory_parameter_word_sp_offset, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2002
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2003
  add(Rextra_words, frame::memory_parameter_word_sp_offset + 1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2004
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2005
  bclr(1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
  sll(Rresult, LogBytesPerWord, Rresult);  // Rresult has total frame bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2008
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2009
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2010
void MacroAssembler::calc_frame_size_and_save(Register Rextra_words, Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2011
  calc_frame_size(Rextra_words, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2012
  neg(Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2013
  save(SP, Rresult, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2014
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2015
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2016
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2017
// ---------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2018
Assembler::RCondition cond2rcond(Assembler::Condition c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2019
  switch (c) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2020
    /*case zero: */
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2021
    case Assembler::equal:        return Assembler::rc_z;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2022
    case Assembler::lessEqual:    return Assembler::rc_lez;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2023
    case Assembler::less:         return Assembler::rc_lz;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2024
    /*case notZero:*/
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2025
    case Assembler::notEqual:     return Assembler::rc_nz;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2026
    case Assembler::greater:      return Assembler::rc_gz;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2027
    case Assembler::greaterEqual: return Assembler::rc_gez;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2028
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2029
  ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2030
  return Assembler::rc_z;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2031
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2032
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2033
// compares register with zero and branches.  NOT FOR USE WITH 64-bit POINTERS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2034
void MacroAssembler::br_zero( Condition c, bool a, Predict p, Register s1, Label& L) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2035
  tst(s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2036
  br (c, a, p, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2037
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2038
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2039
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2040
// Compares a pointer register with zero and branches on null.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2041
// Does a test & branch on 32-bit systems and a register-branch on 64-bit.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2042
void MacroAssembler::br_null( Register s1, bool a, Predict p, Label& L ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2043
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2044
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2045
  bpr( rc_z, a, p, s1, L );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2046
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2047
  tst(s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2048
  br ( zero, a, p, L );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2049
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2050
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2051
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2052
void MacroAssembler::br_notnull( Register s1, bool a, Predict p, Label& L ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2053
  assert_not_delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2054
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2055
  bpr( rc_nz, a, p, s1, L );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2056
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2057
  tst(s1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2058
  br ( notZero, a, p, L );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2059
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2060
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2061
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2062
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2063
// instruction sequences factored across compiler & interpreter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2064
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2065
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2066
void MacroAssembler::lcmp( Register Ra_hi, Register Ra_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2067
                           Register Rb_hi, Register Rb_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2068
                           Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2069
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2070
  Label check_low_parts, done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2071
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2072
  cmp(Ra_hi, Rb_hi );  // compare hi parts
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2073
  br(equal, true, pt, check_low_parts);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2074
  delayed()->cmp(Ra_low, Rb_low); // test low parts
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2075
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2076
  // And, with an unsigned comparison, it does not matter if the numbers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2077
  // are negative or not.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2078
  // E.g., -2 cmp -1: the low parts are 0xfffffffe and 0xffffffff.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2079
  // The second one is bigger (unsignedly).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2080
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2081
  // Other notes:  The first move in each triplet can be unconditional
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2082
  // (and therefore probably prefetchable).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2083
  // And the equals case for the high part does not need testing,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2084
  // since that triplet is reached only after finding the high halves differ.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2085
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2086
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2087
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2088
                                    mov  (                     -1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2089
    ba( false, done );  delayed()-> movcc(greater, false, icc,  1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2090
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2091
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2092
    br(less,    true, pt, done); delayed()-> set(-1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2093
    br(greater, true, pt, done); delayed()-> set( 1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2094
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2095
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2096
  bind( check_low_parts );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2097
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2098
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2099
    mov(                               -1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2100
    movcc(equal,           false, icc,  0, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2101
    movcc(greaterUnsigned, false, icc,  1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2102
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2103
  else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2104
                                                    set(-1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2105
    br(equal,           true, pt, done); delayed()->set( 0, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2106
    br(greaterUnsigned, true, pt, done); delayed()->set( 1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2107
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2108
  bind( done );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2109
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2110
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2111
void MacroAssembler::lneg( Register Rhi, Register Rlow ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2112
  subcc(  G0, Rlow, Rlow );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2113
  subc(   G0, Rhi,  Rhi  );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2114
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2115
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2116
void MacroAssembler::lshl( Register Rin_high,  Register Rin_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2117
                           Register Rcount,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2118
                           Register Rout_high, Register Rout_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2119
                           Register Rtemp ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2120
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2121
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2122
  Register Ralt_count = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2123
  Register Rxfer_bits = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2124
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2125
  assert( Ralt_count != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2126
      &&  Ralt_count != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2127
      &&  Ralt_count != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2128
      &&  Rxfer_bits != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2129
      &&  Rxfer_bits != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2130
      &&  Rxfer_bits != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2131
      &&  Rxfer_bits != Rout_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2132
      &&  Rout_low   != Rin_high,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2133
        "register alias checks");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2134
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2135
  Label big_shift, done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2136
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2137
  // This code can be optimized to use the 64 bit shifts in V9.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2138
  // Here we use the 32 bit shifts.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2139
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2140
  and3( Rcount,         0x3f,           Rcount);     // take least significant 6 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2141
  subcc(Rcount,         31,             Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2142
  br(greater, true, pn, big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2143
  delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2144
  dec(Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2145
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2146
  // shift < 32 bits, Ralt_count = Rcount-31
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2148
  // We get the transfer bits by shifting right by 32-count the low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2149
  // register. This is done by shifting right by 31-count and then by one
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2150
  // more to take care of the special (rare) case where count is zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2151
  // (shifting by 32 would not work).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2152
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2153
  neg(  Ralt_count                                 );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2154
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2155
  // The order of the next two instructions is critical in the case where
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2156
  // Rin and Rout are the same and should not be reversed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2157
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2158
  srl(  Rin_low,        Ralt_count,     Rxfer_bits ); // shift right by 31-count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2159
  if (Rcount != Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2160
    sll(        Rin_low,        Rcount,         Rout_low   ); // low half
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2161
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2162
  sll(  Rin_high,       Rcount,         Rout_high  );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2163
  if (Rcount == Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2164
    sll(        Rin_low,        Rcount,         Rout_low   ); // low half
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2165
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2166
  srl(  Rxfer_bits,     1,              Rxfer_bits ); // shift right by one more
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2167
  ba (false, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2168
  delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2169
  or3(  Rout_high,      Rxfer_bits,     Rout_high);   // new hi value: or in shifted old hi part and xfer from low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2170
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2171
  // shift >= 32 bits, Ralt_count = Rcount-32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2172
  bind(big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2173
  sll(  Rin_low,        Ralt_count,     Rout_high  );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2174
  clr(  Rout_low                                   );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2175
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2176
  bind(done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2177
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2178
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2179
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2180
void MacroAssembler::lshr( Register Rin_high,  Register Rin_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2181
                           Register Rcount,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2182
                           Register Rout_high, Register Rout_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2183
                           Register Rtemp ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2184
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2185
  Register Ralt_count = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2186
  Register Rxfer_bits = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2187
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2188
  assert( Ralt_count != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2189
      &&  Ralt_count != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2190
      &&  Ralt_count != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2191
      &&  Rxfer_bits != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2192
      &&  Rxfer_bits != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2193
      &&  Rxfer_bits != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2194
      &&  Rxfer_bits != Rout_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2195
      &&  Rout_high  != Rin_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2196
        "register alias checks");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2197
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2198
  Label big_shift, done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2199
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2200
  // This code can be optimized to use the 64 bit shifts in V9.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2201
  // Here we use the 32 bit shifts.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2202
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2203
  and3( Rcount,         0x3f,           Rcount);     // take least significant 6 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2204
  subcc(Rcount,         31,             Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2205
  br(greater, true, pn, big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2206
  delayed()->dec(Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2207
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2208
  // shift < 32 bits, Ralt_count = Rcount-31
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2209
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2210
  // We get the transfer bits by shifting left by 32-count the high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2211
  // register. This is done by shifting left by 31-count and then by one
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2212
  // more to take care of the special (rare) case where count is zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2213
  // (shifting by 32 would not work).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2214
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2215
  neg(  Ralt_count                                  );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2216
  if (Rcount != Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2217
    srl(        Rin_low,        Rcount,         Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2218
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2219
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2220
  // The order of the next two instructions is critical in the case where
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2221
  // Rin and Rout are the same and should not be reversed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2222
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2223
  sll(  Rin_high,       Ralt_count,     Rxfer_bits  ); // shift left by 31-count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2224
  sra(  Rin_high,       Rcount,         Rout_high   ); // high half
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2225
  sll(  Rxfer_bits,     1,              Rxfer_bits  ); // shift left by one more
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2226
  if (Rcount == Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2227
    srl(        Rin_low,        Rcount,         Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2228
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2229
  ba (false, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2230
  delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2231
  or3(  Rout_low,       Rxfer_bits,     Rout_low    ); // new low value: or shifted old low part and xfer from high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2232
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2233
  // shift >= 32 bits, Ralt_count = Rcount-32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2234
  bind(big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2235
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2236
  sra(  Rin_high,       Ralt_count,     Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2237
  sra(  Rin_high,       31,             Rout_high   ); // sign into hi
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2238
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2239
  bind( done );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2240
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2241
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2242
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2243
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2244
void MacroAssembler::lushr( Register Rin_high,  Register Rin_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2245
                            Register Rcount,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2246
                            Register Rout_high, Register Rout_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2247
                            Register Rtemp ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2248
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2249
  Register Ralt_count = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2250
  Register Rxfer_bits = Rtemp;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2251
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2252
  assert( Ralt_count != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2253
      &&  Ralt_count != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2254
      &&  Ralt_count != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2255
      &&  Rxfer_bits != Rin_low
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2256
      &&  Rxfer_bits != Rin_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2257
      &&  Rxfer_bits != Rcount
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2258
      &&  Rxfer_bits != Rout_high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2259
      &&  Rout_high  != Rin_low,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2260
        "register alias checks");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2261
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2262
  Label big_shift, done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2263
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2264
  // This code can be optimized to use the 64 bit shifts in V9.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2265
  // Here we use the 32 bit shifts.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2266
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2267
  and3( Rcount,         0x3f,           Rcount);     // take least significant 6 bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2268
  subcc(Rcount,         31,             Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2269
  br(greater, true, pn, big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2270
  delayed()->dec(Ralt_count);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2271
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2272
  // shift < 32 bits, Ralt_count = Rcount-31
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2273
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2274
  // We get the transfer bits by shifting left by 32-count the high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2275
  // register. This is done by shifting left by 31-count and then by one
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2276
  // more to take care of the special (rare) case where count is zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2277
  // (shifting by 32 would not work).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2278
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2279
  neg(  Ralt_count                                  );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2280
  if (Rcount != Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2281
    srl(        Rin_low,        Rcount,         Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2282
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2283
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2284
  // The order of the next two instructions is critical in the case where
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2285
  // Rin and Rout are the same and should not be reversed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2286
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2287
  sll(  Rin_high,       Ralt_count,     Rxfer_bits  ); // shift left by 31-count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2288
  srl(  Rin_high,       Rcount,         Rout_high   ); // high half
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2289
  sll(  Rxfer_bits,     1,              Rxfer_bits  ); // shift left by one more
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2290
  if (Rcount == Rout_low) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2291
    srl(        Rin_low,        Rcount,         Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2292
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2293
  ba (false, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2294
  delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2295
  or3(  Rout_low,       Rxfer_bits,     Rout_low    ); // new low value: or shifted old low part and xfer from high
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2296
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2297
  // shift >= 32 bits, Ralt_count = Rcount-32
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2298
  bind(big_shift);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2299
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2300
  srl(  Rin_high,       Ralt_count,     Rout_low    );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2301
  clr(  Rout_high                                   );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2302
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2303
  bind( done );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2304
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2305
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2306
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2307
void MacroAssembler::lcmp( Register Ra, Register Rb, Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2308
  cmp(Ra, Rb);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2309
  mov(                       -1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2310
  movcc(equal,   false, xcc,  0, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2311
  movcc(greater, false, xcc,  1, Rresult);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2312
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2313
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2314
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2315
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2316
void MacroAssembler::float_cmp( bool is_float, int unordered_result,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2317
                                FloatRegister Fa, FloatRegister Fb,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2318
                                Register Rresult) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2319
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2320
  fcmp(is_float ? FloatRegisterImpl::S : FloatRegisterImpl::D, fcc0, Fa, Fb);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2321
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2322
  Condition lt = unordered_result == -1 ? f_unorderedOrLess    : f_less;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2323
  Condition eq =                          f_equal;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2324
  Condition gt = unordered_result ==  1 ? f_unorderedOrGreater : f_greater;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2325
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2326
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2327
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2328
    mov(                   -1, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2329
    movcc( eq, true, fcc0,  0, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2330
    movcc( gt, true, fcc0,  1, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2331
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2332
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2333
    Label done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2334
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2335
                                         set( -1, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2336
    //fb(lt, true, pn, done); delayed()->set( -1, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2337
    fb( eq, true, pn, done);  delayed()->set(  0, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2338
    fb( gt, true, pn, done);  delayed()->set(  1, Rresult );
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2339
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2340
    bind (done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2341
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2342
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2343
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2344
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2345
void MacroAssembler::fneg( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2346
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2347
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2348
    Assembler::fneg(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2349
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2350
    if (w == FloatRegisterImpl::S) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2351
      Assembler::fneg(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2352
    } else if (w == FloatRegisterImpl::D) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2353
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2354
      assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2355
        ((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2356
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2357
      Assembler::fneg(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2358
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2359
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2360
      assert(w == FloatRegisterImpl::Q, "Invalid float register width");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2361
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2362
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2363
      assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2364
        ((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2365
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2366
      Assembler::fneg(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2367
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2368
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2369
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2370
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2371
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2372
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2373
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2374
void MacroAssembler::fmov( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2375
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2376
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2377
    Assembler::fmov(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2378
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2379
    if (w == FloatRegisterImpl::S) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2380
      Assembler::fmov(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2381
    } else if (w == FloatRegisterImpl::D) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2382
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2383
      assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2384
        ((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2385
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2386
      Assembler::fmov(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2387
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2388
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2389
      assert(w == FloatRegisterImpl::Q, "Invalid float register width");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2390
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2391
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2392
      assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2393
        ((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2394
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2395
      Assembler::fmov(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2396
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2397
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2398
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2399
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2400
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2401
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2402
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2403
void MacroAssembler::fabs( FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2404
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2405
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2406
    Assembler::fabs(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2407
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2408
    if (w == FloatRegisterImpl::S) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2409
      Assembler::fabs(w, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2410
    } else if (w == FloatRegisterImpl::D) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2411
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2412
      assert(((s->encoding(FloatRegisterImpl::D) & 1) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2413
        ((d->encoding(FloatRegisterImpl::D) & 1) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2414
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2415
      Assembler::fabs(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2416
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2417
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2418
      assert(w == FloatRegisterImpl::Q, "Invalid float register width");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2419
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2420
      // number() does a sanity check on the alignment.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2421
      assert(((s->encoding(FloatRegisterImpl::D) & 3) == 0) &&
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2422
       ((d->encoding(FloatRegisterImpl::D) & 3) == 0), "float register alignment check");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2423
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2424
      Assembler::fabs(FloatRegisterImpl::S, s, d);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2425
      Assembler::fmov(FloatRegisterImpl::S, s->successor(), d->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2426
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor(), d->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2427
      Assembler::fmov(FloatRegisterImpl::S, s->successor()->successor()->successor(), d->successor()->successor()->successor());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2428
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2429
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2430
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2431
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2432
void MacroAssembler::save_all_globals_into_locals() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2433
  mov(G1,L1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2434
  mov(G2,L2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2435
  mov(G3,L3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2436
  mov(G4,L4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2437
  mov(G5,L5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2438
  mov(G6,L6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2439
  mov(G7,L7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2440
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2441
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2442
void MacroAssembler::restore_globals_from_locals() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2443
  mov(L1,G1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2444
  mov(L2,G2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2445
  mov(L3,G3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2446
  mov(L4,G4);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2447
  mov(L5,G5);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2448
  mov(L6,G6);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2449
  mov(L7,G7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2450
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2451
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2452
// Use for 64 bit operation.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2453
void MacroAssembler::casx_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg, address lock_addr, bool use_call_vm)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2454
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2455
  // store ptr_reg as the new top value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2456
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2457
  casx(top_ptr_reg, top_reg, ptr_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2458
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2459
  cas_under_lock(top_ptr_reg, top_reg, ptr_reg, lock_addr, use_call_vm);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2460
#endif // _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2461
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2462
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2463
// [RGV] This routine does not handle 64 bit operations.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2464
//       use casx_under_lock() or casx directly!!!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2465
void MacroAssembler::cas_under_lock(Register top_ptr_reg, Register top_reg, Register ptr_reg, address lock_addr, bool use_call_vm)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2466
{
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2467
  // store ptr_reg as the new top value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2468
  if (VM_Version::v9_instructions_work()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2469
    cas(top_ptr_reg, top_reg, ptr_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2470
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2471
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2472
    // If the register is not an out nor global, it is not visible
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2473
    // after the save.  Allocate a register for it, save its
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2474
    // value in the register save area (the save may not flush
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2475
    // registers to the save area).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2476
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2477
    Register top_ptr_reg_after_save;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2478
    Register top_reg_after_save;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2479
    Register ptr_reg_after_save;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2480
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2481
    if (top_ptr_reg->is_out() || top_ptr_reg->is_global()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2482
      top_ptr_reg_after_save = top_ptr_reg->after_save();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2483
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2484
      Address reg_save_addr = top_ptr_reg->address_in_saved_window();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2485
      top_ptr_reg_after_save = L0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2486
      st(top_ptr_reg, reg_save_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2487
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2488
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2489
    if (top_reg->is_out() || top_reg->is_global()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2490
      top_reg_after_save = top_reg->after_save();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2491
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2492
      Address reg_save_addr = top_reg->address_in_saved_window();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2493
      top_reg_after_save = L1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2494
      st(top_reg, reg_save_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2495
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2496
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2497
    if (ptr_reg->is_out() || ptr_reg->is_global()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2498
      ptr_reg_after_save = ptr_reg->after_save();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2499
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2500
      Address reg_save_addr = ptr_reg->address_in_saved_window();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2501
      ptr_reg_after_save = L2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2502
      st(ptr_reg, reg_save_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2503
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2504
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2505
    const Register& lock_reg = L3;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2506
    const Register& lock_ptr_reg = L4;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2507
    const Register& value_reg = L5;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2508
    const Register& yield_reg = L6;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2509
    const Register& yieldall_reg = L7;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2510
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2511
    save_frame();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2512
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2513
    if (top_ptr_reg_after_save == L0) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2514
      ld(top_ptr_reg->address_in_saved_window().after_save(), top_ptr_reg_after_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2515
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2516
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2517
    if (top_reg_after_save == L1) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2518
      ld(top_reg->address_in_saved_window().after_save(), top_reg_after_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2519
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2520
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2521
    if (ptr_reg_after_save == L2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2522
      ld(ptr_reg->address_in_saved_window().after_save(), ptr_reg_after_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2523
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2524
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2525
    Label(retry_get_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2526
    Label(not_same);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2527
    Label(dont_yield);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2528
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2529
    assert(lock_addr, "lock_address should be non null for v8");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2530
    set((intptr_t)lock_addr, lock_ptr_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2531
    // Initialize yield counter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2532
    mov(G0,yield_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2533
    mov(G0, yieldall_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2534
    set(StubRoutines::Sparc::locked, lock_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2535
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2536
    bind(retry_get_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2537
    cmp(yield_reg, V8AtomicOperationUnderLockSpinCount);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2538
    br(Assembler::less, false, Assembler::pt, dont_yield);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2539
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2540
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2541
    if(use_call_vm) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2542
      Untested("Need to verify global reg consistancy");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2543
      call_VM(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::yield_all), yieldall_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2544
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2545
      // Save the regs and make space for a C call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2546
      save(SP, -96, SP);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2547
      save_all_globals_into_locals();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2548
      call(CAST_FROM_FN_PTR(address,os::yield_all));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2549
      delayed()->mov(yieldall_reg, O0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2550
      restore_globals_from_locals();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2551
      restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2552
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2553
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2554
    // reset the counter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2555
    mov(G0,yield_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2556
    add(yieldall_reg, 1, yieldall_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2557
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2558
    bind(dont_yield);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2559
    // try to get lock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2560
    swap(lock_ptr_reg, 0, lock_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2561
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2562
    // did we get the lock?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2563
    cmp(lock_reg, StubRoutines::Sparc::unlocked);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2564
    br(Assembler::notEqual, true, Assembler::pn, retry_get_lock);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2565
    delayed()->add(yield_reg,1,yield_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2566
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2567
    // yes, got lock.  do we have the same top?
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2568
    ld(top_ptr_reg_after_save, 0, value_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2569
    cmp(value_reg, top_reg_after_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2570
    br(Assembler::notEqual, false, Assembler::pn, not_same);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2571
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2572
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2573
    // yes, same top.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2574
    st(ptr_reg_after_save, top_ptr_reg_after_save, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2575
    membar(Assembler::StoreStore);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2576
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2577
    bind(not_same);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2578
    mov(value_reg, ptr_reg_after_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2579
    st(lock_reg, lock_ptr_reg, 0); // unlock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2580
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2581
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2582
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2583
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2584
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2585
void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg, Register temp_reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2586
                                          Label& done, Label* slow_case,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2587
                                          BiasedLockingCounters* counters) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2588
  assert(UseBiasedLocking, "why call this otherwise?");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2589
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2590
  if (PrintBiasedLockingStatistics) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2591
    assert_different_registers(obj_reg, mark_reg, temp_reg, O7);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2592
    if (counters == NULL)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2593
      counters = BiasedLocking::counters();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2594
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2595
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2596
  Label cas_label;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2597
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2598
  // Biased locking
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2599
  // See whether the lock is currently biased toward our thread and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2600
  // whether the epoch is still valid
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2601
  // Note that the runtime guarantees sufficient alignment of JavaThread
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2602
  // pointers to allow age to be placed into low bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2603
  assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2604
  and3(mark_reg, markOopDesc::biased_lock_mask_in_place, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2605
  cmp(temp_reg, markOopDesc::biased_lock_pattern);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2606
  brx(Assembler::notEqual, false, Assembler::pn, cas_label);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2607
  delayed()->nop();
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2608
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2609
  load_klass(obj_reg, temp_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2610
  ld_ptr(Address(temp_reg, 0, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()), temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2611
  or3(G2_thread, temp_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2612
  xor3(mark_reg, temp_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2613
  andcc(temp_reg, ~((int) markOopDesc::age_mask_in_place), temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2614
  if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2615
    cond_inc(Assembler::equal, (address) counters->biased_lock_entry_count_addr(), mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2616
    // Reload mark_reg as we may need it later
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2617
    ld_ptr(Address(obj_reg, 0, oopDesc::mark_offset_in_bytes()), mark_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2618
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2619
  brx(Assembler::equal, true, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2620
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2621
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2622
  Label try_revoke_bias;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2623
  Label try_rebias;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2624
  Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2625
  assert(mark_addr.disp() == 0, "cas must take a zero displacement");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2626
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2627
  // At this point we know that the header has the bias pattern and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2628
  // that we are not the bias owner in the current epoch. We need to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2629
  // figure out more details about the state of the header in order to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2630
  // know what operations can be legally performed on the object's
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2631
  // header.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2632
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2633
  // If the low three bits in the xor result aren't clear, that means
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2634
  // the prototype header is no longer biased and we have to revoke
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2635
  // the bias on this object.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2636
  btst(markOopDesc::biased_lock_mask_in_place, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2637
  brx(Assembler::notZero, false, Assembler::pn, try_revoke_bias);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2638
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2639
  // Biasing is still enabled for this data type. See whether the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2640
  // epoch of the current bias is still valid, meaning that the epoch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2641
  // bits of the mark word are equal to the epoch bits of the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2642
  // prototype header. (Note that the prototype header's epoch bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2643
  // only change at a safepoint.) If not, attempt to rebias the object
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2644
  // toward the current thread. Note that we must be absolutely sure
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2645
  // that the current epoch is invalid in order to do this because
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2646
  // otherwise the manipulations it performs on the mark word are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2647
  // illegal.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2648
  delayed()->btst(markOopDesc::epoch_mask_in_place, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2649
  brx(Assembler::notZero, false, Assembler::pn, try_rebias);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2650
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2651
  // The epoch of the current bias is still valid but we know nothing
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2652
  // about the owner; it might be set or it might be clear. Try to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2653
  // acquire the bias of the object using an atomic operation. If this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2654
  // fails we will go in to the runtime to revoke the object's bias.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2655
  // Note that we first construct the presumed unbiased header so we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2656
  // don't accidentally blow away another thread's valid bias.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2657
  delayed()->and3(mark_reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2658
                  markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2659
                  mark_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2660
  or3(G2_thread, mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2661
  casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2662
                  (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2663
  // If the biasing toward our thread failed, this means that
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2664
  // another thread succeeded in biasing it toward itself and we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2665
  // need to revoke that bias. The revocation will occur in the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2666
  // interpreter runtime in the slow case.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2667
  cmp(mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2668
  if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2669
    cond_inc(Assembler::zero, (address) counters->anonymously_biased_lock_entry_count_addr(), mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2670
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2671
  if (slow_case != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2672
    brx(Assembler::notEqual, true, Assembler::pn, *slow_case);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2673
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2674
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2675
  br(Assembler::always, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2676
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2677
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2678
  bind(try_rebias);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2679
  // At this point we know the epoch has expired, meaning that the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2680
  // current "bias owner", if any, is actually invalid. Under these
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2681
  // circumstances _only_, we are allowed to use the current header's
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2682
  // value as the comparison value when doing the cas to acquire the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2683
  // bias in the current epoch. In other words, we allow transfer of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2684
  // the bias from one thread to another directly in this situation.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2685
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2686
  // FIXME: due to a lack of registers we currently blow away the age
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2687
  // bits in this situation. Should attempt to preserve them.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2688
  load_klass(obj_reg, temp_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2689
  ld_ptr(Address(temp_reg, 0, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()), temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2690
  or3(G2_thread, temp_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2691
  casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2692
                  (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2693
  // If the biasing toward our thread failed, this means that
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2694
  // another thread succeeded in biasing it toward itself and we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2695
  // need to revoke that bias. The revocation will occur in the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2696
  // interpreter runtime in the slow case.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2697
  cmp(mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2698
  if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2699
    cond_inc(Assembler::zero, (address) counters->rebiased_lock_entry_count_addr(), mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2700
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2701
  if (slow_case != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2702
    brx(Assembler::notEqual, true, Assembler::pn, *slow_case);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2703
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2704
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2705
  br(Assembler::always, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2706
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2707
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2708
  bind(try_revoke_bias);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2709
  // The prototype mark in the klass doesn't have the bias bit set any
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2710
  // more, indicating that objects of this data type are not supposed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2711
  // to be biased any more. We are going to try to reset the mark of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2712
  // this object to the prototype value and fall through to the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2713
  // CAS-based locking scheme. Note that if our CAS fails, it means
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2714
  // that another thread raced us for the privilege of revoking the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2715
  // bias of this particular object, so it's okay to continue in the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2716
  // normal locking code.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2717
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2718
  // FIXME: due to a lack of registers we currently blow away the age
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2719
  // bits in this situation. Should attempt to preserve them.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  2720
  load_klass(obj_reg, temp_reg);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2721
  ld_ptr(Address(temp_reg, 0, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()), temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2722
  casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2723
                  (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2724
  // Fall through to the normal CAS-based lock, because no matter what
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2725
  // the result of the above CAS, some thread must have succeeded in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2726
  // removing the bias bit from the object's header.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2727
  if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2728
    cmp(mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2729
    cond_inc(Assembler::zero, (address) counters->revoked_lock_entry_count_addr(), mark_reg, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2730
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2731
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2732
  bind(cas_label);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2733
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2735
void MacroAssembler::biased_locking_exit (Address mark_addr, Register temp_reg, Label& done,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2736
                                          bool allow_delay_slot_filling) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2737
  // Check for biased locking unlock case, which is a no-op
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2738
  // Note: we do not have to check the thread ID for two reasons.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2739
  // First, the interpreter checks for IllegalMonitorStateException at
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2740
  // a higher level. Second, if the bias was revoked while we held the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2741
  // lock, the object could not be rebiased toward another thread, so
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2742
  // the bias bit would be clear.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2743
  ld_ptr(mark_addr, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2744
  and3(temp_reg, markOopDesc::biased_lock_mask_in_place, temp_reg);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2745
  cmp(temp_reg, markOopDesc::biased_lock_pattern);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2746
  brx(Assembler::equal, allow_delay_slot_filling, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2747
  delayed();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2748
  if (!allow_delay_slot_filling) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2749
    nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2750
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2751
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2752
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2753
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2754
// CASN -- 32-64 bit switch hitter similar to the synthetic CASN provided by
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2755
// Solaris/SPARC's "as".  Another apt name would be cas_ptr()
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2756
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2757
void MacroAssembler::casn (Register addr_reg, Register cmp_reg, Register set_reg ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2758
  casx_under_lock (addr_reg, cmp_reg, set_reg, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr()) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2759
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2760
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2761
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2762
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2763
// compiler_lock_object() and compiler_unlock_object() are direct transliterations
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2764
// of i486.ad fast_lock() and fast_unlock().  See those methods for detailed comments.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2765
// The code could be tightened up considerably.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2766
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2767
// box->dhw disposition - post-conditions at DONE_LABEL.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2768
// -   Successful inflated lock:  box->dhw != 0.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2769
//     Any non-zero value suffices.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2770
//     Consider G2_thread, rsp, boxReg, or unused_mark()
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2771
// -   Successful Stack-lock: box->dhw == mark.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2772
//     box->dhw must contain the displaced mark word value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2773
// -   Failure -- icc.ZFlag == 0 and box->dhw is undefined.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2774
//     The slow-path fast_enter() and slow_enter() operators
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2775
//     are responsible for setting box->dhw = NonZero (typically ::unused_mark).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2776
// -   Biased: box->dhw is undefined
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2777
//
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2778
// SPARC refworkload performance - specifically jetstream and scimark - are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2779
// extremely sensitive to the size of the code emitted by compiler_lock_object
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2780
// and compiler_unlock_object.  Critically, the key factor is code size, not path
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2781
// length.  (Simply experiments to pad CLO with unexecuted NOPs demonstrte the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2782
// effect).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2783
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2784
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2785
void MacroAssembler::compiler_lock_object(Register Roop, Register Rmark, Register Rbox, Register Rscratch,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2786
                                          BiasedLockingCounters* counters) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2787
   Address mark_addr(Roop, 0, oopDesc::mark_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2788
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2789
   verify_oop(Roop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2790
   Label done ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2791
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2792
   if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2793
     inc_counter((address) counters->total_entry_count_addr(), Rmark, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2794
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2795
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2796
   if (EmitSync & 1) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2797
     mov    (3, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2798
     st_ptr (Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2799
     cmp    (SP, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2800
     return ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2801
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2802
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2803
   if (EmitSync & 2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2804
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2805
     // Fetch object's markword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2806
     ld_ptr(mark_addr, Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2807
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2808
     if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2809
        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2810
     }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2811
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2812
     // Save Rbox in Rscratch to be used for the cas operation
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2813
     mov(Rbox, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2814
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2815
     // set Rmark to markOop | markOopDesc::unlocked_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2816
     or3(Rmark, markOopDesc::unlocked_value, Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2817
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2818
     // Initialize the box.  (Must happen before we update the object mark!)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2819
     st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2821
     // compare object markOop with Rmark and if equal exchange Rscratch with object markOop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2822
     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2823
     casx_under_lock(mark_addr.base(), Rmark, Rscratch,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2824
        (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2825
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2826
     // if compare/exchange succeeded we found an unlocked object and we now have locked it
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2827
     // hence we are done
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2828
     cmp(Rmark, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2829
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2830
     sub(Rscratch, STACK_BIAS, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2831
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2832
     brx(Assembler::equal, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2833
     delayed()->sub(Rscratch, SP, Rscratch);  //pull next instruction into delay slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2834
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2835
     // we did not find an unlocked object so see if this is a recursive case
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2836
     // sub(Rscratch, SP, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2837
     assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2838
     andcc(Rscratch, 0xfffff003, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2839
     st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2840
     bind (done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2841
     return ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2842
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2843
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2844
   Label Egress ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2845
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2846
   if (EmitSync & 256) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2847
      Label IsInflated ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2848
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2849
      ld_ptr (mark_addr, Rmark);           // fetch obj->mark
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2850
      // Triage: biased, stack-locked, neutral, inflated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2851
      if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2852
        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2853
        // Invariant: if control reaches this point in the emitted stream
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2854
        // then Rmark has not been modified.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2855
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2856
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2857
      // Store mark into displaced mark field in the on-stack basic-lock "box"
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2858
      // Critically, this must happen before the CAS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2859
      // Maximize the ST-CAS distance to minimize the ST-before-CAS penalty.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2860
      st_ptr (Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2861
      andcc  (Rmark, 2, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2862
      brx    (Assembler::notZero, false, Assembler::pn, IsInflated) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2863
      delayed() ->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2864
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2865
      // Try stack-lock acquisition.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2866
      // Beware: the 1st instruction is in a delay slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2867
      mov    (Rbox,  Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2868
      or3    (Rmark, markOopDesc::unlocked_value, Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2869
      assert (mark_addr.disp() == 0, "cas must take a zero displacement");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2870
      casn   (mark_addr.base(), Rmark, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2871
      cmp    (Rmark, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2872
      brx    (Assembler::equal, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2873
      delayed()->sub(Rscratch, SP, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2874
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2875
      // Stack-lock attempt failed - check for recursive stack-lock.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2876
      // See the comments below about how we might remove this case.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2877
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2878
      sub    (Rscratch, STACK_BIAS, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2879
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2880
      assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2881
      andcc  (Rscratch, 0xfffff003, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2882
      br     (Assembler::always, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2883
      delayed()-> st_ptr (Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2884
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2885
      bind   (IsInflated) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2886
      if (EmitSync & 64) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2887
         // If m->owner != null goto IsLocked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2888
         // Pessimistic form: Test-and-CAS vs CAS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2889
         // The optimistic form avoids RTS->RTO cache line upgrades.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2890
         ld_ptr (Address (Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2), Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2891
         andcc  (Rscratch, Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2892
         brx    (Assembler::notZero, false, Assembler::pn, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2893
         delayed()->nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2894
         // m->owner == null : it's unlocked.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2895
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2896
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2897
      // Try to CAS m->owner from null to Self
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2898
      // Invariant: if we acquire the lock then _recursions should be 0.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2899
      add    (Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2900
      mov    (G2_thread, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2901
      casn   (Rmark, G0, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2902
      cmp    (Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2903
      // Intentional fall-through into done
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2904
   } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2905
      // Aggressively avoid the Store-before-CAS penalty
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2906
      // Defer the store into box->dhw until after the CAS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2907
      Label IsInflated, Recursive ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2908
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2909
// Anticipate CAS -- Avoid RTS->RTO upgrade
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2910
// prefetch (mark_addr, Assembler::severalWritesAndPossiblyReads) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2911
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2912
      ld_ptr (mark_addr, Rmark);           // fetch obj->mark
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2913
      // Triage: biased, stack-locked, neutral, inflated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2914
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2915
      if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2916
        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2917
        // Invariant: if control reaches this point in the emitted stream
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2918
        // then Rmark has not been modified.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2919
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2920
      andcc  (Rmark, 2, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2921
      brx    (Assembler::notZero, false, Assembler::pn, IsInflated) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2922
      delayed()->                         // Beware - dangling delay-slot
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2923
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2924
      // Try stack-lock acquisition.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2925
      // Transiently install BUSY (0) encoding in the mark word.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2926
      // if the CAS of 0 into the mark was successful then we execute:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2927
      //   ST box->dhw  = mark   -- save fetched mark in on-stack basiclock box
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2928
      //   ST obj->mark = box    -- overwrite transient 0 value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2929
      // This presumes TSO, of course.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2930
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2931
      mov    (0, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2932
      or3    (Rmark, markOopDesc::unlocked_value, Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2933
      assert (mark_addr.disp() == 0, "cas must take a zero displacement");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2934
      casn   (mark_addr.base(), Rmark, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2935
// prefetch (mark_addr, Assembler::severalWritesAndPossiblyReads) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2936
      cmp    (Rscratch, Rmark) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2937
      brx    (Assembler::notZero, false, Assembler::pn, Recursive) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2938
      delayed() ->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2939
        st_ptr (Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2940
      if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2941
        cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2942
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2943
      br     (Assembler::always, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2944
      delayed() ->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2945
        st_ptr (Rbox, mark_addr) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2946
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2947
      bind   (Recursive) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2948
      // Stack-lock attempt failed - check for recursive stack-lock.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2949
      // Tests show that we can remove the recursive case with no impact
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2950
      // on refworkload 0.83.  If we need to reduce the size of the code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2951
      // emitted by compiler_lock_object() the recursive case is perfect
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2952
      // candidate.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2953
      //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2954
      // A more extreme idea is to always inflate on stack-lock recursion.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2955
      // This lets us eliminate the recursive checks in compiler_lock_object
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2956
      // and compiler_unlock_object and the (box->dhw == 0) encoding.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2957
      // A brief experiment - requiring changes to synchronizer.cpp, interpreter,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2958
      // and showed a performance *increase*.  In the same experiment I eliminated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2959
      // the fast-path stack-lock code from the interpreter and always passed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2960
      // control to the "slow" operators in synchronizer.cpp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2961
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2962
      // RScratch contains the fetched obj->mark value from the failed CASN.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2963
#ifdef _LP64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2964
      sub    (Rscratch, STACK_BIAS, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2965
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2966
      sub(Rscratch, SP, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2967
      assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2968
      andcc  (Rscratch, 0xfffff003, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2969
      if (counters != NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2970
        // Accounting needs the Rscratch register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2971
        st_ptr (Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2972
        cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2973
        br     (Assembler::always, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2974
        delayed()->nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2975
      } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2976
        br     (Assembler::always, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2977
        delayed()-> st_ptr (Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2978
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2979
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2980
      bind   (IsInflated) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2981
      if (EmitSync & 64) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2982
         // If m->owner != null goto IsLocked
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2983
         // Test-and-CAS vs CAS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2984
         // Pessimistic form avoids futile (doomed) CAS attempts
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2985
         // The optimistic form avoids RTS->RTO cache line upgrades.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2986
         ld_ptr (Address (Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2), Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2987
         andcc  (Rscratch, Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2988
         brx    (Assembler::notZero, false, Assembler::pn, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2989
         delayed()->nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2990
         // m->owner == null : it's unlocked.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2991
      }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2992
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2993
      // Try to CAS m->owner from null to Self
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2994
      // Invariant: if we acquire the lock then _recursions should be 0.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2995
      add    (Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2996
      mov    (G2_thread, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2997
      casn   (Rmark, G0, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2998
      cmp    (Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2999
      // ST box->displaced_header = NonZero.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3000
      // Any non-zero value suffices:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3001
      //    unused_mark(), G2_thread, RBox, RScratch, rsp, etc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3002
      st_ptr (Rbox, Rbox, BasicLock::displaced_header_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3003
      // Intentional fall-through into done
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3004
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3005
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3006
   bind   (done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3007
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3008
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3009
void MacroAssembler::compiler_unlock_object(Register Roop, Register Rmark, Register Rbox, Register Rscratch) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3010
   Address mark_addr(Roop, 0, oopDesc::mark_offset_in_bytes());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3011
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3012
   Label done ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3013
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3014
   if (EmitSync & 4) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3015
     cmp  (SP, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3016
     return ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3017
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3018
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3019
   if (EmitSync & 8) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3020
     if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3021
        biased_locking_exit(mark_addr, Rscratch, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3022
     }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3023
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3024
     // Test first if it is a fast recursive unlock
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3025
     ld_ptr(Rbox, BasicLock::displaced_header_offset_in_bytes(), Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3026
     cmp(Rmark, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3027
     brx(Assembler::equal, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3028
     delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3029
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3030
     // Check if it is still a light weight lock, this is is true if we see
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3031
     // the stack address of the basicLock in the markOop of the object
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3032
     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3033
     casx_under_lock(mark_addr.base(), Rbox, Rmark,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3034
       (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3035
     br (Assembler::always, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3036
     delayed()->cmp(Rbox, Rmark);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3037
     bind (done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3038
     return ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3039
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3040
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3041
   // Beware ... If the aggregate size of the code emitted by CLO and CUO is
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3042
   // is too large performance rolls abruptly off a cliff.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3043
   // This could be related to inlining policies, code cache management, or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3044
   // I$ effects.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3045
   Label LStacked ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3046
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3047
   if (UseBiasedLocking) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3048
      // TODO: eliminate redundant LDs of obj->mark
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3049
      biased_locking_exit(mark_addr, Rscratch, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3050
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3051
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3052
   ld_ptr (Roop, oopDesc::mark_offset_in_bytes(), Rmark) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3053
   ld_ptr (Rbox, BasicLock::displaced_header_offset_in_bytes(), Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3054
   andcc  (Rscratch, Rscratch, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3055
   brx    (Assembler::zero, false, Assembler::pn, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3056
   delayed()-> nop() ;      // consider: relocate fetch of mark, above, into this DS
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3057
   andcc  (Rmark, 2, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3058
   brx    (Assembler::zero, false, Assembler::pt, LStacked) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3059
   delayed()-> nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3060
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3061
   // It's inflated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3062
   // Conceptually we need a #loadstore|#storestore "release" MEMBAR before
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3063
   // the ST of 0 into _owner which releases the lock.  This prevents loads
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3064
   // and stores within the critical section from reordering (floating)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3065
   // past the store that releases the lock.  But TSO is a strong memory model
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3066
   // and that particular flavor of barrier is a noop, so we can safely elide it.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3067
   // Note that we use 1-0 locking by default for the inflated case.  We
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3068
   // close the resultant (and rare) race by having contented threads in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3069
   // monitorenter periodically poll _owner.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3070
   ld_ptr (Address(Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2), Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3071
   ld_ptr (Address(Rmark, 0, ObjectMonitor::recursions_offset_in_bytes()-2), Rbox) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3072
   xor3   (Rscratch, G2_thread, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3073
   orcc   (Rbox, Rscratch, Rbox) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3074
   brx    (Assembler::notZero, false, Assembler::pn, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3075
   delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3076
   ld_ptr (Address (Rmark, 0, ObjectMonitor::EntryList_offset_in_bytes()-2), Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3077
   ld_ptr (Address (Rmark, 0, ObjectMonitor::cxq_offset_in_bytes()-2), Rbox) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3078
   orcc   (Rbox, Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3079
   if (EmitSync & 65536) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3080
      Label LSucc ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3081
      brx    (Assembler::notZero, false, Assembler::pn, LSucc) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3082
      delayed()->nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3083
      br     (Assembler::always, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3084
      delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3085
      st_ptr (G0, Address (Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2)) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3086
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3087
      bind   (LSucc) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3088
      st_ptr (G0, Address (Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2)) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3089
      if (os::is_MP()) { membar (StoreLoad) ; }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3090
      ld_ptr (Address (Rmark, 0, ObjectMonitor::succ_offset_in_bytes()-2), Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3091
      andcc  (Rscratch, Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3092
      brx    (Assembler::notZero, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3093
      delayed()-> andcc (G0, G0, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3094
      add    (Rmark, ObjectMonitor::owner_offset_in_bytes()-2, Rmark) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3095
      mov    (G2_thread, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3096
      casn   (Rmark, G0, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3097
      cmp    (Rscratch, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3098
      // invert icc.zf and goto done
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3099
      brx    (Assembler::notZero, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3100
      delayed() -> cmp (G0, G0) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3101
      br     (Assembler::always, false, Assembler::pt, done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3102
      delayed() -> cmp (G0, 1) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3103
   } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3104
      brx    (Assembler::notZero, false, Assembler::pn, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3105
      delayed()->nop() ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3106
      br     (Assembler::always, false, Assembler::pt, done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3107
      delayed()->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3108
      st_ptr (G0, Address (Rmark, 0, ObjectMonitor::owner_offset_in_bytes()-2)) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3109
   }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3110
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3111
   bind   (LStacked) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3112
   // Consider: we could replace the expensive CAS in the exit
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3113
   // path with a simple ST of the displaced mark value fetched from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3114
   // the on-stack basiclock box.  That admits a race where a thread T2
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3115
   // in the slow lock path -- inflating with monitor M -- could race a
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3116
   // thread T1 in the fast unlock path, resulting in a missed wakeup for T2.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3117
   // More precisely T1 in the stack-lock unlock path could "stomp" the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3118
   // inflated mark value M installed by T2, resulting in an orphan
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3119
   // object monitor M and T2 becoming stranded.  We can remedy that situation
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3120
   // by having T2 periodically poll the object's mark word using timed wait
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3121
   // operations.  If T2 discovers that a stomp has occurred it vacates
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3122
   // the monitor M and wakes any other threads stranded on the now-orphan M.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3123
   // In addition the monitor scavenger, which performs deflation,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3124
   // would also need to check for orpan monitors and stranded threads.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3125
   //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3126
   // Finally, inflation is also used when T2 needs to assign a hashCode
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3127
   // to O and O is stack-locked by T1.  The "stomp" race could cause
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3128
   // an assigned hashCode value to be lost.  We can avoid that condition
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3129
   // and provide the necessary hashCode stability invariants by ensuring
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3130
   // that hashCode generation is idempotent between copying GCs.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3131
   // For example we could compute the hashCode of an object O as
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3132
   // O's heap address XOR some high quality RNG value that is refreshed
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3133
   // at GC-time.  The monitor scavenger would install the hashCode
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3134
   // found in any orphan monitors.  Again, the mechanism admits a
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3135
   // lost-update "stomp" WAW race but detects and recovers as needed.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3136
   //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3137
   // A prototype implementation showed excellent results, although
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3138
   // the scavenger and timeout code was rather involved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3139
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3140
   casn   (mark_addr.base(), Rbox, Rscratch) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3141
   cmp    (Rbox, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3142
   // Intentional fall through into done ...
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3143
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3144
   bind   (done) ;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3145
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3146
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3147
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3148
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3149
void MacroAssembler::print_CPU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3150
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3151
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3152
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3153
void MacroAssembler::verify_FPU(int stack_depth, const char* s) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3154
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3155
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3156
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3157
void MacroAssembler::push_IU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3158
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3159
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3160
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3161
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3162
void MacroAssembler::pop_IU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3163
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3164
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3165
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3166
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3167
void MacroAssembler::push_FPU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3168
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3169
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3170
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3171
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3172
void MacroAssembler::pop_FPU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3173
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3174
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3175
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3176
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3177
void MacroAssembler::push_CPU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3178
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3179
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3180
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3181
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3182
void MacroAssembler::pop_CPU_state() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3183
  // %%%%% need to implement this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3184
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3185
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3186
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3187
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3188
void MacroAssembler::verify_tlab() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3189
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3190
  if (UseTLAB && VerifyOops) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3191
    Label next, next2, ok;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3192
    Register t1 = L0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3193
    Register t2 = L1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3194
    Register t3 = L2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3195
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3196
    save_frame(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3197
    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_top_offset()), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3198
    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_start_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3199
    or3(t1, t2, t3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3200
    cmp(t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3201
    br(Assembler::greaterEqual, false, Assembler::pn, next);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3202
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3203
    stop("assert(top >= start)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3204
    should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3205
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3206
    bind(next);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3207
    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_top_offset()), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3208
    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_end_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3209
    or3(t3, t2, t3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3210
    cmp(t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3211
    br(Assembler::lessEqual, false, Assembler::pn, next2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3212
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3213
    stop("assert(top <= end)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3214
    should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3215
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3216
    bind(next2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3217
    and3(t3, MinObjAlignmentInBytesMask, t3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3218
    cmp(t3, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3219
    br(Assembler::lessEqual, false, Assembler::pn, ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3220
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3221
    stop("assert(aligned)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3222
    should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3223
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3224
    bind(ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3225
    restore();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3226
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3227
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3228
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3229
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3230
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3231
void MacroAssembler::eden_allocate(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3232
  Register obj,                        // result: pointer to object after successful allocation
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3233
  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3234
  int      con_size_in_bytes,          // object size in bytes if   known at compile time
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3235
  Register t1,                         // temp register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3236
  Register t2,                         // temp register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3237
  Label&   slow_case                   // continuation point if fast allocation fails
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3238
){
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3239
  // make sure arguments make sense
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3240
  assert_different_registers(obj, var_size_in_bytes, t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3241
  assert(0 <= con_size_in_bytes && Assembler::is_simm13(con_size_in_bytes), "illegal object size");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3242
  assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0, "object size is not multiple of alignment");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3243
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3244
  // get eden boundaries
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3245
  // note: we need both top & top_addr!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3246
  const Register top_addr = t1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3247
  const Register end      = t2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3248
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3249
  CollectedHeap* ch = Universe::heap();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3250
  set((intx)ch->top_addr(), top_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3251
  intx delta = (intx)ch->end_addr() - (intx)ch->top_addr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3252
  ld_ptr(top_addr, delta, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3253
  ld_ptr(top_addr, 0, obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3254
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3255
  // try to allocate
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3256
  Label retry;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3257
  bind(retry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3258
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3259
  // make sure eden top is properly aligned
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3260
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3261
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3262
    btst(MinObjAlignmentInBytesMask, obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3263
    br(Assembler::zero, false, Assembler::pt, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3264
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3265
    stop("eden top is not properly aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3266
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3267
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3268
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3269
  const Register free = end;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3270
  sub(end, obj, free);                                   // compute amount of free space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3271
  if (var_size_in_bytes->is_valid()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3272
    // size is unknown at compile time
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3273
    cmp(free, var_size_in_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3274
    br(Assembler::lessUnsigned, false, Assembler::pn, slow_case); // if there is not enough space go the slow case
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3275
    delayed()->add(obj, var_size_in_bytes, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3276
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3277
    // size is known at compile time
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3278
    cmp(free, con_size_in_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3279
    br(Assembler::lessUnsigned, false, Assembler::pn, slow_case); // if there is not enough space go the slow case
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3280
    delayed()->add(obj, con_size_in_bytes, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3281
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3282
  // Compare obj with the value at top_addr; if still equal, swap the value of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3283
  // end with the value at top_addr. If not equal, read the value at top_addr
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3284
  // into end.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3285
  casx_under_lock(top_addr, obj, end, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3286
  // if someone beat us on the allocation, try again, otherwise continue
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3287
  cmp(obj, end);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3288
  brx(Assembler::notEqual, false, Assembler::pn, retry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3289
  delayed()->mov(end, obj);                              // nop if successfull since obj == end
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3290
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3291
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3292
  // make sure eden top is properly aligned
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3293
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3294
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3295
    const Register top_addr = t1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3296
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3297
    set((intx)ch->top_addr(), top_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3298
    ld_ptr(top_addr, 0, top_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3299
    btst(MinObjAlignmentInBytesMask, top_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3300
    br(Assembler::zero, false, Assembler::pt, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3301
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3302
    stop("eden top is not properly aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3303
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3304
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3305
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3306
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3307
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3308
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3309
void MacroAssembler::tlab_allocate(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3310
  Register obj,                        // result: pointer to object after successful allocation
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3311
  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3312
  int      con_size_in_bytes,          // object size in bytes if   known at compile time
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3313
  Register t1,                         // temp register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3314
  Label&   slow_case                   // continuation point if fast allocation fails
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3315
){
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3316
  // make sure arguments make sense
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3317
  assert_different_registers(obj, var_size_in_bytes, t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3318
  assert(0 <= con_size_in_bytes && is_simm13(con_size_in_bytes), "illegal object size");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3319
  assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0, "object size is not multiple of alignment");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3320
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3321
  const Register free  = t1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3322
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3323
  verify_tlab();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3324
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3325
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_top_offset()), obj);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3326
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3327
  // calculate amount of free space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3328
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_end_offset()), free);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3329
  sub(free, obj, free);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3330
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3331
  Label done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3332
  if (var_size_in_bytes == noreg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3333
    cmp(free, con_size_in_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3334
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3335
    cmp(free, var_size_in_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3336
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3337
  br(Assembler::less, false, Assembler::pn, slow_case);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3338
  // calculate the new top pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3339
  if (var_size_in_bytes == noreg) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3340
    delayed()->add(obj, con_size_in_bytes, free);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3341
  } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3342
    delayed()->add(obj, var_size_in_bytes, free);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3343
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3344
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3345
  bind(done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3346
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3347
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3348
  // make sure new free pointer is properly aligned
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3349
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3350
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3351
    btst(MinObjAlignmentInBytesMask, free);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3352
    br(Assembler::zero, false, Assembler::pt, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3353
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3354
    stop("updated TLAB free is not properly aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3355
    bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3356
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3357
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3358
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3359
  // update the tlab top pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3360
  st_ptr(free, G2_thread, in_bytes(JavaThread::tlab_top_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3361
  verify_tlab();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3362
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3363
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3364
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3365
void MacroAssembler::tlab_refill(Label& retry, Label& try_eden, Label& slow_case) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3366
  Register top = O0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3367
  Register t1 = G1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3368
  Register t2 = G3;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3369
  Register t3 = O1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3370
  assert_different_registers(top, t1, t2, t3, G4, G5 /* preserve G4 and G5 */);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3371
  Label do_refill, discard_tlab;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3372
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3373
  if (CMSIncrementalMode || !Universe::heap()->supports_inline_contig_alloc()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3374
    // No allocation in the shared eden.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3375
    br(Assembler::always, false, Assembler::pt, slow_case);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3376
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3377
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3378
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3379
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_top_offset()), top);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3380
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_end_offset()), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3381
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_refill_waste_limit_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3382
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3383
  // calculate amount of free space
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3384
  sub(t1, top, t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3385
  srl_ptr(t1, LogHeapWordSize, t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3386
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3387
  // Retain tlab and allocate object in shared space if
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3388
  // the amount free in the tlab is too large to discard.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3389
  cmp(t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3390
  brx(Assembler::lessEqual, false, Assembler::pt, discard_tlab);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3391
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3392
  // increment waste limit to prevent getting stuck on this slow path
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3393
  delayed()->add(t2, ThreadLocalAllocBuffer::refill_waste_limit_increment(), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3394
  st_ptr(t2, G2_thread, in_bytes(JavaThread::tlab_refill_waste_limit_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3395
  if (TLABStats) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3396
    // increment number of slow_allocations
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3397
    ld(G2_thread, in_bytes(JavaThread::tlab_slow_allocations_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3398
    add(t2, 1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3399
    stw(t2, G2_thread, in_bytes(JavaThread::tlab_slow_allocations_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3400
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3401
  br(Assembler::always, false, Assembler::pt, try_eden);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3402
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3403
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3404
  bind(discard_tlab);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3405
  if (TLABStats) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3406
    // increment number of refills
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3407
    ld(G2_thread, in_bytes(JavaThread::tlab_number_of_refills_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3408
    add(t2, 1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3409
    stw(t2, G2_thread, in_bytes(JavaThread::tlab_number_of_refills_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3410
    // accumulate wastage
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3411
    ld(G2_thread, in_bytes(JavaThread::tlab_fast_refill_waste_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3412
    add(t2, t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3413
    stw(t2, G2_thread, in_bytes(JavaThread::tlab_fast_refill_waste_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3414
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3415
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3416
  // if tlab is currently allocated (top or end != null) then
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3417
  // fill [top, end + alignment_reserve) with array object
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3418
  br_null(top, false, Assembler::pn, do_refill);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3419
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3420
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3421
  set((intptr_t)markOopDesc::prototype()->copy_set_hash(0x2), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3422
  st_ptr(t2, top, oopDesc::mark_offset_in_bytes()); // set up the mark word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3423
  // set klass to intArrayKlass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3424
  sub(t1, typeArrayOopDesc::header_size(T_INT), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3425
  add(t1, ThreadLocalAllocBuffer::alignment_reserve(), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3426
  sll_ptr(t1, log2_intptr(HeapWordSize/sizeof(jint)), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3427
  st(t1, top, arrayOopDesc::length_offset_in_bytes());
593
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3428
  set((intptr_t)Universe::intArrayKlassObj_addr(), t2);
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3429
  ld_ptr(t2, 0, t2);
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3430
  // store klass last.  concurrent gcs assumes klass length is valid if
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3431
  // klass field is not null.
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3432
  store_klass(t2, top);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3433
  verify_oop(top);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3434
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3435
  // refill the tlab with an eden allocation
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3436
  bind(do_refill);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3437
  ld_ptr(G2_thread, in_bytes(JavaThread::tlab_size_offset()), t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3438
  sll_ptr(t1, LogHeapWordSize, t1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3439
  // add object_size ??
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3440
  eden_allocate(top, t1, 0, t2, t3, slow_case);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3441
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3442
  st_ptr(top, G2_thread, in_bytes(JavaThread::tlab_start_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3443
  st_ptr(top, G2_thread, in_bytes(JavaThread::tlab_top_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3444
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3445
  // check that tlab_size (t1) is still valid
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3446
  {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3447
    Label ok;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3448
    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_size_offset()), t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3449
    sll_ptr(t2, LogHeapWordSize, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3450
    cmp(t1, t2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3451
    br(Assembler::equal, false, Assembler::pt, ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3452
    delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3453
    stop("assert(t1 == tlab_size)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3454
    should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3455
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3456
    bind(ok);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3457
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3458
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3459
  add(top, t1, top); // t1 is tlab_size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3460
  sub(top, ThreadLocalAllocBuffer::alignment_reserve_in_bytes(), top);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3461
  st_ptr(top, G2_thread, in_bytes(JavaThread::tlab_end_offset()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3462
  verify_tlab();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3463
  br(Assembler::always, false, Assembler::pt, retry);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3464
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3465
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3466
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3467
Assembler::Condition MacroAssembler::negate_condition(Assembler::Condition cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3468
  switch (cond) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3469
    // Note some conditions are synonyms for others
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3470
    case Assembler::never:                return Assembler::always;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3471
    case Assembler::zero:                 return Assembler::notZero;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3472
    case Assembler::lessEqual:            return Assembler::greater;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3473
    case Assembler::less:                 return Assembler::greaterEqual;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3474
    case Assembler::lessEqualUnsigned:    return Assembler::greaterUnsigned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3475
    case Assembler::lessUnsigned:         return Assembler::greaterEqualUnsigned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3476
    case Assembler::negative:             return Assembler::positive;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3477
    case Assembler::overflowSet:          return Assembler::overflowClear;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3478
    case Assembler::always:               return Assembler::never;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3479
    case Assembler::notZero:              return Assembler::zero;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3480
    case Assembler::greater:              return Assembler::lessEqual;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3481
    case Assembler::greaterEqual:         return Assembler::less;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3482
    case Assembler::greaterUnsigned:      return Assembler::lessEqualUnsigned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3483
    case Assembler::greaterEqualUnsigned: return Assembler::lessUnsigned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3484
    case Assembler::positive:             return Assembler::negative;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3485
    case Assembler::overflowClear:        return Assembler::overflowSet;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3486
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3487
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3488
  ShouldNotReachHere(); return Assembler::overflowClear;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3489
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3490
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3491
void MacroAssembler::cond_inc(Assembler::Condition cond, address counter_ptr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3492
                              Register Rtmp1, Register Rtmp2 /*, Register Rtmp3, Register Rtmp4 */) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3493
  Condition negated_cond = negate_condition(cond);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3494
  Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3495
  brx(negated_cond, false, Assembler::pt, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3496
  delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3497
  inc_counter(counter_ptr, Rtmp1, Rtmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3498
  bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3499
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3500
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3501
void MacroAssembler::inc_counter(address counter_ptr, Register Rtmp1, Register Rtmp2) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3502
  Address counter_addr(Rtmp1, counter_ptr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3503
  load_contents(counter_addr, Rtmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3504
  inc(Rtmp2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3505
  store_contents(Rtmp2, counter_addr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3506
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3507
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3508
SkipIfEqual::SkipIfEqual(
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3509
    MacroAssembler* masm, Register temp, const bool* flag_addr,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3510
    Assembler::Condition condition) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3511
  _masm = masm;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3512
  Address flag(temp, (address)flag_addr, relocInfo::none);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3513
  _masm->sethi(flag);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3514
  _masm->ldub(flag, temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3515
  _masm->tst(temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3516
  _masm->br(condition, false, Assembler::pt, _label);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3517
  _masm->delayed()->nop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3518
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3519
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3520
SkipIfEqual::~SkipIfEqual() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3521
  _masm->bind(_label);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3522
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3523
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3524
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3525
// Writes to stack successive pages until offset reached to check for
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3526
// stack overflow + shadow pages.  This clobbers tsp and scratch.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3527
void MacroAssembler::bang_stack_size(Register Rsize, Register Rtsp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3528
                                     Register Rscratch) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3529
  // Use stack pointer in temp stack pointer
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3530
  mov(SP, Rtsp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3531
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3532
  // Bang stack for total size given plus stack shadow page size.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3533
  // Bang one page at a time because a large size can overflow yellow and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3534
  // red zones (the bang will fail but stack overflow handling can't tell that
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3535
  // it was a stack overflow bang vs a regular segv).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3536
  int offset = os::vm_page_size();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3537
  Register Roffset = Rscratch;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3538
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3539
  Label loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3540
  bind(loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3541
  set((-offset)+STACK_BIAS, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3542
  st(G0, Rtsp, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3543
  set(offset, Roffset);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3544
  sub(Rsize, Roffset, Rsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3545
  cmp(Rsize, G0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3546
  br(Assembler::greater, false, Assembler::pn, loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3547
  delayed()->sub(Rtsp, Roffset, Rtsp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3548
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3549
  // Bang down shadow pages too.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3550
  // The -1 because we already subtracted 1 page.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3551
  for (int i = 0; i< StackShadowPages-1; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3552
    set((-i*offset)+STACK_BIAS, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3553
    st(G0, Rtsp, Rscratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3554
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3555
}
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3556
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3557
void MacroAssembler::load_klass(Register src_oop, Register klass) {
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3558
  // The number of bytes in this code is used by
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3559
  // MachCallDynamicJavaNode::ret_addr_offset()
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3560
  // if this changes, change that.
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3561
  if (UseCompressedOops) {
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3562
    lduw(src_oop, oopDesc::klass_offset_in_bytes(), klass);
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3563
    decode_heap_oop_not_null(klass);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3564
  } else {
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3565
    ld_ptr(src_oop, oopDesc::klass_offset_in_bytes(), klass);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3566
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3567
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3568
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3569
void MacroAssembler::store_klass(Register klass, Register dst_oop) {
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3570
  if (UseCompressedOops) {
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3571
    assert(dst_oop != klass, "not enough registers");
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3572
    encode_heap_oop_not_null(klass);
593
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3573
    st(klass, dst_oop, oopDesc::klass_offset_in_bytes());
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3574
  } else {
590
2954744d7bba 6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents: 371
diff changeset
  3575
    st_ptr(klass, dst_oop, oopDesc::klass_offset_in_bytes());
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3576
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3577
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3578
593
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3579
void MacroAssembler::store_klass_gap(Register s, Register d) {
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3580
  if (UseCompressedOops) {
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3581
    assert(s != d, "not enough registers");
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3582
    st(s, d, oopDesc::klass_gap_offset_in_bytes());
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3583
  }
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3584
}
803947e176bd 6696264: assert("narrow oop can never be zero") for GCBasher & ParNewGC
coleenp
parents: 590
diff changeset
  3585
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3586
void MacroAssembler::load_heap_oop(const Address& s, Register d, int offset) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3587
  if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3588
    lduw(s, d, offset);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3589
    decode_heap_oop(d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3590
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3591
    ld_ptr(s, d, offset);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3592
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3593
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3594
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3595
void MacroAssembler::load_heap_oop(Register s1, Register s2, Register d) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3596
   if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3597
    lduw(s1, s2, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3598
    decode_heap_oop(d, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3599
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3600
    ld_ptr(s1, s2, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3601
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3602
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3603
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3604
void MacroAssembler::load_heap_oop(Register s1, int simm13a, Register d) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3605
   if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3606
    lduw(s1, simm13a, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3607
    decode_heap_oop(d, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3608
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3609
    ld_ptr(s1, simm13a, d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3610
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3611
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3612
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3613
void MacroAssembler::store_heap_oop(Register d, Register s1, Register s2) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3614
  if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3615
    assert(s1 != d && s2 != d, "not enough registers");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3616
    encode_heap_oop(d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3617
    st(d, s1, s2);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3618
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3619
    st_ptr(d, s1, s2);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3620
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3621
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3622
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3623
void MacroAssembler::store_heap_oop(Register d, Register s1, int simm13a) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3624
  if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3625
    assert(s1 != d, "not enough registers");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3626
    encode_heap_oop(d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3627
    st(d, s1, simm13a);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3628
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3629
    st_ptr(d, s1, simm13a);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3630
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3631
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3632
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3633
void MacroAssembler::store_heap_oop(Register d, const Address& a, int offset) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3634
  if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3635
    assert(a.base() != d, "not enough registers");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3636
    encode_heap_oop(d);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3637
    st(d, a, offset);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3638
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3639
    st_ptr(d, a, offset);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3640
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3641
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3642
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3643
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3644
void MacroAssembler::encode_heap_oop(Register src, Register dst) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3645
  assert (UseCompressedOops, "must be compressed");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3646
  Label done;
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3647
  if (src == dst) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3648
    // optimize for frequent case src == dst
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3649
    bpr(rc_nz, true, Assembler::pt, src, done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3650
    delayed() -> sub(src, G6_heapbase, dst); // annuled if not taken
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3651
    bind(done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3652
    srlx(src, LogMinObjAlignmentInBytes, dst);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3653
  } else {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3654
    bpr(rc_z, false, Assembler::pn, src, done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3655
    delayed() -> mov(G0, dst);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3656
    // could be moved before branch, and annulate delay,
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3657
    // but may add some unneeded work decoding null
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3658
    sub(src, G6_heapbase, dst);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3659
    srlx(dst, LogMinObjAlignmentInBytes, dst);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3660
    bind(done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3661
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3662
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3663
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3664
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3665
void MacroAssembler::encode_heap_oop_not_null(Register r) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3666
  assert (UseCompressedOops, "must be compressed");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3667
  sub(r, G6_heapbase, r);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3668
  srlx(r, LogMinObjAlignmentInBytes, r);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3669
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3670
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3671
void MacroAssembler::encode_heap_oop_not_null(Register src, Register dst) {
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3672
  assert (UseCompressedOops, "must be compressed");
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3673
  sub(src, G6_heapbase, dst);
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3674
  srlx(dst, LogMinObjAlignmentInBytes, dst);
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3675
}
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3676
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3677
// Same algorithm as oops.inline.hpp decode_heap_oop.
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3678
void  MacroAssembler::decode_heap_oop(Register src, Register dst) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3679
  assert (UseCompressedOops, "must be compressed");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3680
  Label done;
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3681
  sllx(src, LogMinObjAlignmentInBytes, dst);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3682
  bpr(rc_nz, true, Assembler::pt, dst, done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3683
  delayed() -> add(dst, G6_heapbase, dst); // annuled if not taken
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3684
  bind(done);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3685
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3686
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3687
void  MacroAssembler::decode_heap_oop_not_null(Register r) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3688
  // Do not add assert code to this unless you change vtableStubs_sparc.cpp
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3689
  // pd_code_size_limit.
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3690
  assert (UseCompressedOops, "must be compressed");
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3691
  sllx(r, LogMinObjAlignmentInBytes, r);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3692
  add(r, G6_heapbase, r);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3693
}
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3694
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3695
void  MacroAssembler::decode_heap_oop_not_null(Register src, Register dst) {
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3696
  // Do not add assert code to this unless you change vtableStubs_sparc.cpp
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3697
  // pd_code_size_limit.
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3698
  assert (UseCompressedOops, "must be compressed");
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3699
  sllx(src, LogMinObjAlignmentInBytes, dst);
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3700
  add(dst, G6_heapbase, dst);
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3701
}
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  3702
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3703
void MacroAssembler::reinit_heapbase() {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3704
  if (UseCompressedOops) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3705
    // call indirectly to solve generation ordering problem
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3706
    Address base(G6_heapbase, (address)Universe::heap_base_addr());
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3707
    load_ptr_contents(base, G6_heapbase);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3708
  }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 1
diff changeset
  3709
}