author | rkennke |
Sun, 06 May 2018 00:42:59 +0200 | |
changeset 50024 | 7238cb613dc5 |
parent 49724 | bf7f42f2f025 |
child 51093 | 4db6e8715e35 |
permissions | -rw-r--r-- |
29183 | 1 |
/* |
47881
0ce0ac68ace7
8189941: Implementation JEP 312: Thread-local handshake
rehn
parents:
47216
diff
changeset
|
2 |
* Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved. |
31381 | 3 |
* Copyright (c) 2015, Red Hat Inc. All rights reserved. |
29183 | 4 |
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
5 |
* |
|
6 |
* This code is free software; you can redistribute it and/or modify it |
|
7 |
* under the terms of the GNU General Public License version 2 only, as |
|
8 |
* published by the Free Software Foundation. |
|
9 |
* |
|
10 |
* This code is distributed in the hope that it will be useful, but WITHOUT |
|
11 |
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
12 |
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
13 |
* version 2 for more details (a copy is included in the LICENSE file that |
|
14 |
* accompanied this code). |
|
15 |
* |
|
16 |
* You should have received a copy of the GNU General Public License version |
|
17 |
* 2 along with this work; if not, write to the Free Software Foundation, |
|
18 |
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
|
19 |
* |
|
20 |
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
21 |
* or visit www.oracle.com if you need additional information or have any |
|
22 |
* questions. |
|
23 |
* |
|
24 |
*/ |
|
25 |
||
26 |
#ifndef CPU_AARCH64_VM_GLOBALS_AARCH64_HPP |
|
27 |
#define CPU_AARCH64_VM_GLOBALS_AARCH64_HPP |
|
28 |
||
29 |
#include "utilities/globalDefinitions.hpp" |
|
30 |
#include "utilities/macros.hpp" |
|
31 |
||
32 |
// Sets the default values for platform dependent flags used by the runtime system. |
|
33 |
// (see globals.hpp) |
|
34 |
||
35 |
define_pd_global(bool, ShareVtableStubs, true); |
|
36 |
define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this |
|
37 |
||
38 |
define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks |
|
39 |
define_pd_global(bool, TrapBasedNullChecks, false); |
|
40 |
define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs past to check cast |
|
41 |
||
42062 | 42 |
define_pd_global(uintx, CodeCacheSegmentSize, 64 TIERED_ONLY(+64)); // Tiered compilation has large code-entry alignment. |
29183 | 43 |
define_pd_global(intx, CodeEntryAlignment, 64); |
44 |
define_pd_global(intx, OptoLoopAlignment, 16); |
|
45 |
define_pd_global(intx, InlineFrequencyCount, 100); |
|
46 |
||
33222
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
47 |
#define DEFAULT_STACK_YELLOW_PAGES (2) |
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
48 |
#define DEFAULT_STACK_RED_PAGES (1) |
43290
eec57137c0a6
8173339: AArch64: Fix minimum stack size computations
adinn
parents:
42062
diff
changeset
|
49 |
// Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the |
eec57137c0a6
8173339: AArch64: Fix minimum stack size computations
adinn
parents:
42062
diff
changeset
|
50 |
// stack if compiled for unix and LP64. To pass stack overflow tests we need |
eec57137c0a6
8173339: AArch64: Fix minimum stack size computations
adinn
parents:
42062
diff
changeset
|
51 |
// 20 shadow pages. |
eec57137c0a6
8173339: AArch64: Fix minimum stack size computations
adinn
parents:
42062
diff
changeset
|
52 |
#define DEFAULT_STACK_SHADOW_PAGES (20 DEBUG_ONLY(+5)) |
43439
5e03c9ba74f3
8172144: AArch64: Implement "JEP 270: Reserved Stack Areas for Critical Sections"
aph
parents:
42062
diff
changeset
|
53 |
#define DEFAULT_STACK_RESERVED_PAGES (1) |
29183 | 54 |
|
38079
fd24ad51113a
8154379: MIN_STACK_SHADOW_PAGES should equal DEFAULT_STACK_SHADOW_PAGES on aarch64
cjplummer
parents:
38037
diff
changeset
|
55 |
#define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES |
fd24ad51113a
8154379: MIN_STACK_SHADOW_PAGES should equal DEFAULT_STACK_SHADOW_PAGES on aarch64
cjplummer
parents:
38037
diff
changeset
|
56 |
#define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES |
fd24ad51113a
8154379: MIN_STACK_SHADOW_PAGES should equal DEFAULT_STACK_SHADOW_PAGES on aarch64
cjplummer
parents:
38037
diff
changeset
|
57 |
#define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES |
35071
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
33628
diff
changeset
|
58 |
#define MIN_STACK_RESERVED_PAGES (0) |
33222
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
59 |
|
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
60 |
define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES); |
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
61 |
define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES); |
e0a340f4ab6e
8078556: Runtime: implement ranges (optionally constraints) for those flags that have them missing.
gziemski
parents:
31783
diff
changeset
|
62 |
define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES); |
35071
a0910b1d3e0d
8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents:
33628
diff
changeset
|
63 |
define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES); |
29183 | 64 |
|
65 |
define_pd_global(bool, RewriteBytecodes, true); |
|
30889
325a4db0d161
8081289: aarch64: add support for RewriteFrequentPairs in interpreter
enevill
parents:
30429
diff
changeset
|
66 |
define_pd_global(bool, RewriteFrequentPairs, true); |
29183 | 67 |
|
68 |
define_pd_global(bool, UseMembar, true); |
|
69 |
||
30305
b92a97e1e9cb
8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents:
29183
diff
changeset
|
70 |
define_pd_global(bool, PreserveFramePointer, false); |
b92a97e1e9cb
8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents:
29183
diff
changeset
|
71 |
|
29183 | 72 |
// GC Ergo Flags |
73 |
define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread |
|
74 |
||
75 |
define_pd_global(uintx, TypeProfileLevel, 111); |
|
76 |
||
40065 | 77 |
define_pd_global(bool, CompactStrings, true); |
29183 | 78 |
|
38037
31c22b526d30
8153713: aarch64: improve short array clearing using store pair
fyang
parents:
36564
diff
changeset
|
79 |
// Clear short arrays bigger than one word in an arch-specific way |
31c22b526d30
8153713: aarch64: improve short array clearing using store pair
fyang
parents:
36564
diff
changeset
|
80 |
define_pd_global(intx, InitArrayShortSize, BytesPerLong); |
36554
a7eb9ee4680c
8146801: Allocating short arrays of non-constant size is slow
shade
parents:
36103
diff
changeset
|
81 |
|
48127
efc459cf351e
8189596: AArch64: implementation for Thread-local handshakes
aph
parents:
47881
diff
changeset
|
82 |
define_pd_global(bool, ThreadLocalHandshakes, true); |
47881
0ce0ac68ace7
8189941: Implementation JEP 312: Thread-local handshake
rehn
parents:
47216
diff
changeset
|
83 |
|
29183 | 84 |
#if defined(COMPILER1) || defined(COMPILER2) |
85 |
define_pd_global(intx, InlineSmallCode, 1000); |
|
86 |
#endif |
|
87 |
||
88 |
#ifdef BUILTIN_SIM |
|
89 |
#define UseBuiltinSim true |
|
38273
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
90 |
#define ARCH_FLAGS(develop, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
91 |
product, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
92 |
diagnostic, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
93 |
experimental, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
94 |
notproduct, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
95 |
range, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
96 |
constraint, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
97 |
writeable) \ |
29183 | 98 |
\ |
99 |
product(bool, NotifySimulator, UseBuiltinSim, \ |
|
100 |
"tell the AArch64 sim where we are in method code") \ |
|
101 |
\ |
|
102 |
product(bool, UseSimulatorCache, false, \ |
|
103 |
"tell sim to cache memory updates until exclusive op occurs") \ |
|
104 |
\ |
|
105 |
product(bool, DisableBCCheck, true, \ |
|
106 |
"tell sim not to invoke bccheck callback") \ |
|
107 |
\ |
|
108 |
product(bool, NearCpool, true, \ |
|
109 |
"constant pool is close to instructions") \ |
|
110 |
\ |
|
30429
c980154ed1a3
8079203: AARCH64: Need to cater for different partner implementations
enevill
parents:
30305
diff
changeset
|
111 |
product(bool, UseBarriersForVolatile, false, \ |
c980154ed1a3
8079203: AARCH64: Need to cater for different partner implementations
enevill
parents:
30305
diff
changeset
|
112 |
"Use memory barriers to implement volatile accesses") \ |
29183 | 113 |
\ |
114 |
product(bool, UseCRC32, false, \ |
|
115 |
"Use CRC32 instructions for CRC32 computation") \ |
|
36562
4d1e93624d6a
8150394: aarch64: add support for 8.1 LSE CAS instructions
enevill
parents:
36554
diff
changeset
|
116 |
\ |
4d1e93624d6a
8150394: aarch64: add support for 8.1 LSE CAS instructions
enevill
parents:
36554
diff
changeset
|
117 |
product(bool, UseLSE, false, \ |
4d1e93624d6a
8150394: aarch64: add support for 8.1 LSE CAS instructions
enevill
parents:
36554
diff
changeset
|
118 |
"Use LSE instructions") \ |
29183 | 119 |
|
120 |
// Don't attempt to use Neon on builtin sim until builtin sim supports it |
|
121 |
#define UseCRC32 false |
|
36564
9442bb67de26
8150313: aarch64: optimise array copy using SIMD instructions
enevill
parents:
36562
diff
changeset
|
122 |
#define UseSIMDForMemoryOps false |
40023
49d647eeb7f0
8159063: aarch64: optimise unaligned array copy long
enevill
parents:
38273
diff
changeset
|
123 |
#define AvoidUnalignedAcesses false |
29183 | 124 |
|
125 |
#else |
|
126 |
#define UseBuiltinSim false |
|
127 |
#define NotifySimulator false |
|
128 |
#define UseSimulatorCache false |
|
129 |
#define DisableBCCheck true |
|
38273
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
130 |
#define ARCH_FLAGS(develop, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
131 |
product, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
132 |
diagnostic, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
133 |
experimental, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
134 |
notproduct, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
135 |
range, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
136 |
constraint, \ |
2634194d7555
8073500: Prevent certain commercial flags from being changed at runtime
gziemski
parents:
38144
diff
changeset
|
137 |
writeable) \ |
29183 | 138 |
\ |
139 |
product(bool, NearCpool, true, \ |
|
140 |
"constant pool is close to instructions") \ |
|
141 |
\ |
|
30429
c980154ed1a3
8079203: AARCH64: Need to cater for different partner implementations
enevill
parents:
30305
diff
changeset
|
142 |
product(bool, UseBarriersForVolatile, false, \ |
c980154ed1a3
8079203: AARCH64: Need to cater for different partner implementations
enevill
parents:
30305
diff
changeset
|
143 |
"Use memory barriers to implement volatile accesses") \ |
29183 | 144 |
product(bool, UseNeon, false, \ |
145 |
"Use Neon for CRC32 computation") \ |
|
146 |
product(bool, UseCRC32, false, \ |
|
147 |
"Use CRC32 instructions for CRC32 computation") \ |
|
36564
9442bb67de26
8150313: aarch64: optimise array copy using SIMD instructions
enevill
parents:
36562
diff
changeset
|
148 |
product(bool, UseSIMDForMemoryOps, false, \ |
9442bb67de26
8150313: aarch64: optimise array copy using SIMD instructions
enevill
parents:
36562
diff
changeset
|
149 |
"Use SIMD instructions in generated memory move code") \ |
49724
bf7f42f2f025
8187472: AARCH64: array_equals intrinsic doesn't use prefetch for large arrays
dpochepk
parents:
48127
diff
changeset
|
150 |
product(bool, UseSIMDForArrayEquals, true, \ |
bf7f42f2f025
8187472: AARCH64: array_equals intrinsic doesn't use prefetch for large arrays
dpochepk
parents:
48127
diff
changeset
|
151 |
"Use SIMD instructions in generated array equals code") \ |
bf7f42f2f025
8187472: AARCH64: array_equals intrinsic doesn't use prefetch for large arrays
dpochepk
parents:
48127
diff
changeset
|
152 |
product(bool, UseSimpleArrayEquals, false, \ |
bf7f42f2f025
8187472: AARCH64: array_equals intrinsic doesn't use prefetch for large arrays
dpochepk
parents:
48127
diff
changeset
|
153 |
"Use simpliest and shortest implementation for array equals") \ |
40023
49d647eeb7f0
8159063: aarch64: optimise unaligned array copy long
enevill
parents:
38273
diff
changeset
|
154 |
product(bool, AvoidUnalignedAccesses, false, \ |
49d647eeb7f0
8159063: aarch64: optimise unaligned array copy long
enevill
parents:
38273
diff
changeset
|
155 |
"Avoid generating unaligned memory accesses") \ |
36562
4d1e93624d6a
8150394: aarch64: add support for 8.1 LSE CAS instructions
enevill
parents:
36554
diff
changeset
|
156 |
product(bool, UseLSE, false, \ |
4d1e93624d6a
8150394: aarch64: add support for 8.1 LSE CAS instructions
enevill
parents:
36554
diff
changeset
|
157 |
"Use LSE instructions") \ |
38143 | 158 |
product(bool, UseBlockZeroing, true, \ |
159 |
"Use DC ZVA for block zeroing") \ |
|
160 |
product(intx, BlockZeroingLowLimit, 256, \ |
|
161 |
"Minimum size in bytes when block zeroing will be used") \ |
|
162 |
range(1, max_jint) \ |
|
46814 | 163 |
product(bool, TraceTraps, false, "Trace all traps the signal handler")\ |
164 |
product(int, SoftwarePrefetchHintDistance, -1, \ |
|
165 |
"Use prfm hint with specified distance in compiled code." \ |
|
166 |
"Value -1 means off.") \ |
|
167 |
range(-1, 32760) |
|
29183 | 168 |
#endif |
169 |
||
170 |
||
171 |
#endif // CPU_AARCH64_VM_GLOBALS_AARCH64_HPP |