src/hotspot/cpu/x86/macroAssembler_x86.hpp
author erikj
Tue, 12 Sep 2017 19:03:39 +0200
changeset 47216 71c04702a3d5
parent 46961 hotspot/src/cpu/x86/vm/macroAssembler_x86.hpp@c9094b1e5f87
child 47683 f433d49aceb4
permissions -rw-r--r--
8187443: Forest Consolidation: Move files to unified layout Reviewed-by: darcy, ihse
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/*
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 * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef CPU_X86_VM_MACROASSEMBLER_X86_HPP
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#define CPU_X86_VM_MACROASSEMBLER_X86_HPP
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#include "asm/assembler.hpp"
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#include "utilities/macros.hpp"
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#include "runtime/rtmLocking.hpp"
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// MacroAssembler extends Assembler by frequently used macros.
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//
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// Instructions for which a 'better' code sequence exists depending
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// on arguments should also go in here.
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class MacroAssembler: public Assembler {
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  friend class LIR_Assembler;
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  friend class Runtime1;      // as_Address()
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 protected:
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  Address as_Address(AddressLiteral adr);
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  Address as_Address(ArrayAddress adr);
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  // Support for VM calls
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  //
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  // This is the base routine called by the different versions of call_VM_leaf. The interpreter
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  // may customize this version by overriding it for its purposes (e.g., to save/restore
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  // additional registers when doing a VM call).
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  virtual void call_VM_leaf_base(
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    address entry_point,               // the entry point
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    int     number_of_arguments        // the number of arguments to pop after the call
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  );
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  // This is the base routine called by the different versions of call_VM. The interpreter
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  // may customize this version by overriding it for its purposes (e.g., to save/restore
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  // additional registers when doing a VM call).
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  //
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  // If no java_thread register is specified (noreg) than rdi will be used instead. call_VM_base
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  // returns the register which contains the thread upon return. If a thread register has been
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  // specified, the return value will correspond to that register. If no last_java_sp is specified
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  // (noreg) than rsp will be used instead.
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  virtual void call_VM_base(           // returns the register containing the thread upon return
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    Register oop_result,               // where an oop-result ends up if any; use noreg otherwise
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    Register java_thread,              // the thread if computed before     ; use noreg otherwise
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    Register last_java_sp,             // to set up last_Java_frame in stubs; use noreg otherwise
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    address  entry_point,              // the entry point
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    int      number_of_arguments,      // the number of arguments (w/o thread) to pop after the call
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    bool     check_exceptions          // whether to check for pending exceptions after return
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  );
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  void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions = true);
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  // helpers for FPU flag access
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  // tmp is a temporary register, if none is available use noreg
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  void save_rax   (Register tmp);
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  void restore_rax(Register tmp);
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 public:
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  MacroAssembler(CodeBuffer* code) : Assembler(code) {}
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 // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
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 // The implementation is only non-empty for the InterpreterMacroAssembler,
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 // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
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 virtual void check_and_handle_popframe(Register java_thread);
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 virtual void check_and_handle_earlyret(Register java_thread);
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  // Support for NULL-checks
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  //
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  // Generates code that causes a NULL OS exception if the content of reg is NULL.
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  // If the accessed location is M[reg + offset] and the offset is known, provide the
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  // offset. No explicit code generation is needed if the offset is within a certain
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  // range (0 <= offset <= page_size).
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  void null_check(Register reg, int offset = -1);
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  static bool needs_explicit_null_check(intptr_t offset);
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  // Required platform-specific helpers for Label::patch_instructions.
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  // They _shadow_ the declarations in AbstractAssembler, which are undefined.
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  void pd_patch_instruction(address branch, address target) {
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    unsigned char op = branch[0];
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    assert(op == 0xE8 /* call */ ||
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        op == 0xE9 /* jmp */ ||
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        op == 0xEB /* short jmp */ ||
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        (op & 0xF0) == 0x70 /* short jcc */ ||
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        op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */ ||
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        op == 0xC7 && branch[1] == 0xF8 /* xbegin */,
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        "Invalid opcode at patch point");
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    if (op == 0xEB || (op & 0xF0) == 0x70) {
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      // short offset operators (jmp and jcc)
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      char* disp = (char*) &branch[1];
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      int imm8 = target - (address) &disp[1];
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      guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset");
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      *disp = imm8;
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    } else {
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      int* disp = (int*) &branch[(op == 0x0F || op == 0xC7)? 2: 1];
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      int imm32 = target - (address) &disp[1];
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      *disp = imm32;
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    }
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  }
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  // The following 4 methods return the offset of the appropriate move instruction
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  // Support for fast byte/short loading with zero extension (depending on particular CPU)
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  int load_unsigned_byte(Register dst, Address src);
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  int load_unsigned_short(Register dst, Address src);
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  // Support for fast byte/short loading with sign extension (depending on particular CPU)
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  int load_signed_byte(Register dst, Address src);
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  int load_signed_short(Register dst, Address src);
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  // Support for sign-extension (hi:lo = extend_sign(lo))
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  void extend_sign(Register hi, Register lo);
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  // Load and store values by size and signed-ness
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  void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2 = noreg);
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  void store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2 = noreg);
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  // Support for inc/dec with optimal instruction selection depending on value
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  void increment(Register reg, int value = 1) { LP64_ONLY(incrementq(reg, value)) NOT_LP64(incrementl(reg, value)) ; }
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  void decrement(Register reg, int value = 1) { LP64_ONLY(decrementq(reg, value)) NOT_LP64(decrementl(reg, value)) ; }
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  void decrementl(Address dst, int value = 1);
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  void decrementl(Register reg, int value = 1);
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  void decrementq(Register reg, int value = 1);
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  void decrementq(Address dst, int value = 1);
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  void incrementl(Address dst, int value = 1);
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  void incrementl(Register reg, int value = 1);
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  void incrementq(Register reg, int value = 1);
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  void incrementq(Address dst, int value = 1);
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  // special instructions for EVEX
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  void setvectmask(Register dst, Register src);
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  void restorevectmask();
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  // Support optimal SSE move instructions.
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  void movflt(XMMRegister dst, XMMRegister src) {
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    if (UseXmmRegToRegMoveAll) { movaps(dst, src); return; }
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    else                       { movss (dst, src); return; }
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  }
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  void movflt(XMMRegister dst, Address src) { movss(dst, src); }
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  void movflt(XMMRegister dst, AddressLiteral src);
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  void movflt(Address dst, XMMRegister src) { movss(dst, src); }
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  void movdbl(XMMRegister dst, XMMRegister src) {
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    if (UseXmmRegToRegMoveAll) { movapd(dst, src); return; }
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    else                       { movsd (dst, src); return; }
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  }
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  void movdbl(XMMRegister dst, AddressLiteral src);
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  void movdbl(XMMRegister dst, Address src) {
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    if (UseXmmLoadAndClearUpper) { movsd (dst, src); return; }
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    else                         { movlpd(dst, src); return; }
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  }
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  void movdbl(Address dst, XMMRegister src) { movsd(dst, src); }
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  void incrementl(AddressLiteral dst);
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  void incrementl(ArrayAddress dst);
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  void incrementq(AddressLiteral dst);
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  // Alignment
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  void align(int modulus);
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  void align(int modulus, int target);
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  // A 5 byte nop that is safe for patching (see patch_verified_entry)
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  void fat_nop();
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  // Stack frame creation/removal
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  void enter();
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  void leave();
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  // Support for getting the JavaThread pointer (i.e.; a reference to thread-local information)
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  // The pointer will be loaded into the thread register.
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  void get_thread(Register thread);
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  // Support for VM calls
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  //
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  // It is imperative that all calls into the VM are handled via the call_VM macros.
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  // They make sure that the stack linkage is setup correctly. call_VM's correspond
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  // to ENTRY/ENTRY_X entry points while call_VM_leaf's correspond to LEAF entry points.
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  void call_VM(Register oop_result,
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               address entry_point,
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               bool check_exceptions = true);
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  void call_VM(Register oop_result,
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               address entry_point,
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               Register arg_1,
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               bool check_exceptions = true);
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  void call_VM(Register oop_result,
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               address entry_point,
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               Register arg_1, Register arg_2,
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               bool check_exceptions = true);
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  void call_VM(Register oop_result,
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               address entry_point,
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               Register arg_1, Register arg_2, Register arg_3,
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               bool check_exceptions = true);
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  // Overloadings with last_Java_sp
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  void call_VM(Register oop_result,
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               Register last_java_sp,
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               address entry_point,
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               int number_of_arguments = 0,
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               bool check_exceptions = true);
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  void call_VM(Register oop_result,
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               Register last_java_sp,
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               address entry_point,
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               Register arg_1, bool
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               check_exceptions = true);
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  void call_VM(Register oop_result,
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               Register last_java_sp,
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               address entry_point,
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               Register arg_1, Register arg_2,
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               bool check_exceptions = true);
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  void call_VM(Register oop_result,
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               Register last_java_sp,
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               address entry_point,
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               Register arg_1, Register arg_2, Register arg_3,
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               bool check_exceptions = true);
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  void get_vm_result  (Register oop_result, Register thread);
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  void get_vm_result_2(Register metadata_result, Register thread);
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  // These always tightly bind to MacroAssembler::call_VM_base
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  // bypassing the virtual implementation
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  void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, int number_of_arguments = 0, bool check_exceptions = true);
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  void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, bool check_exceptions = true);
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  void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
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  void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true);
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  void super_call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4, bool check_exceptions = true);
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  void call_VM_leaf0(address entry_point);
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  void call_VM_leaf(address entry_point,
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                    int number_of_arguments = 0);
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  void call_VM_leaf(address entry_point,
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                    Register arg_1);
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  void call_VM_leaf(address entry_point,
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                    Register arg_1, Register arg_2);
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  void call_VM_leaf(address entry_point,
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                    Register arg_1, Register arg_2, Register arg_3);
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  // These always tightly bind to MacroAssembler::call_VM_leaf_base
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  // bypassing the virtual implementation
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  void super_call_VM_leaf(address entry_point);
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  void super_call_VM_leaf(address entry_point, Register arg_1);
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  void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
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  void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
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  void super_call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3, Register arg_4);
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  // last Java Frame (fills frame anchor)
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  void set_last_Java_frame(Register thread,
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                           Register last_java_sp,
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                           Register last_java_fp,
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                           address last_java_pc);
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  // thread in the default location (r15_thread on 64bit)
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  void set_last_Java_frame(Register last_java_sp,
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                           Register last_java_fp,
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                           address last_java_pc);
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  void reset_last_Java_frame(Register thread, bool clear_fp);
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  // thread in the default location (r15_thread on 64bit)
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  void reset_last_Java_frame(bool clear_fp);
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  // Stores
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  void store_check(Register obj);                // store check for obj - register is destroyed afterwards
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  void store_check(Register obj, Address dst);   // same as above, dst is exact store location (reg. is destroyed)
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  void resolve_jobject(Register value, Register thread, Register tmp);
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  void clear_jweak_tag(Register possibly_jweak);
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#if INCLUDE_ALL_GCS
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  void g1_write_barrier_pre(Register obj,
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                            Register pre_val,
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                            Register thread,
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                            Register tmp,
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                            bool tosca_live,
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                            bool expand_call);
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  void g1_write_barrier_post(Register store_addr,
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                             Register new_val,
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                             Register thread,
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                             Register tmp,
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                             Register tmp2);
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#endif // INCLUDE_ALL_GCS
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  // C 'boolean' to Java boolean: x == 0 ? 0 : 1
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  void c2bool(Register x);
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  // C++ bool manipulation
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  void movbool(Register dst, Address src);
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  void movbool(Address dst, bool boolconst);
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  void movbool(Address dst, Register src);
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  void testbool(Register dst);
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  void resolve_oop_handle(Register result);
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  void load_mirror(Register mirror, Register method);
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  // oop manipulations
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  void load_klass(Register dst, Register src);
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  void store_klass(Register dst, Register src);
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  void load_heap_oop(Register dst, Address src);
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  void load_heap_oop_not_null(Register dst, Address src);
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  void store_heap_oop(Address dst, Register src);
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  void cmp_heap_oop(Register src1, Address src2, Register tmp = noreg);
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  // Used for storing NULL. All other oop constants should be
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  // stored using routines that take a jobject.
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  void store_heap_oop_null(Address dst);
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  void load_prototype_header(Register dst, Register src);
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#ifdef _LP64
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  void store_klass_gap(Register dst, Register src);
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  // This dummy is to prevent a call to store_heap_oop from
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  // converting a zero (like NULL) into a Register by giving
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  // the compiler two choices it can't resolve
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  void store_heap_oop(Address dst, void* dummy);
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  void encode_heap_oop(Register r);
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  void decode_heap_oop(Register r);
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  void encode_heap_oop_not_null(Register r);
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  void decode_heap_oop_not_null(Register r);
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  void encode_heap_oop_not_null(Register dst, Register src);
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  void decode_heap_oop_not_null(Register dst, Register src);
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   363
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  void set_narrow_oop(Register dst, jobject obj);
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  void set_narrow_oop(Address dst, jobject obj);
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  void cmp_narrow_oop(Register dst, jobject obj);
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  void cmp_narrow_oop(Address dst, jobject obj);
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  void encode_klass_not_null(Register r);
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  void decode_klass_not_null(Register r);
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  void encode_klass_not_null(Register dst, Register src);
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  void decode_klass_not_null(Register dst, Register src);
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  void set_narrow_klass(Register dst, Klass* k);
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  void set_narrow_klass(Address dst, Klass* k);
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  void cmp_narrow_klass(Register dst, Klass* k);
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  void cmp_narrow_klass(Address dst, Klass* k);
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  // Returns the byte size of the instructions generated by decode_klass_not_null()
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  // when compressed klass pointers are being used.
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  static int instr_size_for_decode_klass_not_null();
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  // if heap base register is used - reinit it with the correct value
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  void reinit_heapbase();
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   384
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  DEBUG_ONLY(void verify_heapbase(const char* msg);)
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#endif // _LP64
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   388
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  // Int division/remainder for Java
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  // (as idivl, but checks for special case as described in JVM spec.)
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  // returns idivl instruction offset for implicit exception handling
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  int corrected_idivl(Register reg);
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   393
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  // Long division/remainder for Java
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  // (as idivq, but checks for special case as described in JVM spec.)
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  // returns idivq instruction offset for implicit exception handling
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  int corrected_idivq(Register reg);
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   398
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  void int3();
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  // Long operation macros for a 32bit cpu
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   402
  // Long negation for Java
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  void lneg(Register hi, Register lo);
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   404
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   405
  // Long multiplication for Java
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  // (destroys contents of eax, ebx, ecx and edx)
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  void lmul(int x_rsp_offset, int y_rsp_offset); // rdx:rax = x * y
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   408
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  // Long shifts for Java
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  // (semantics as described in JVM spec.)
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  void lshl(Register hi, Register lo);                               // hi:lo << (rcx & 0x3f)
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  void lshr(Register hi, Register lo, bool sign_extension = false);  // hi:lo >> (rcx & 0x3f)
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   413
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  // Long compare for Java
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  // (semantics as described in JVM spec.)
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  void lcmp2int(Register x_hi, Register x_lo, Register y_hi, Register y_lo); // x_hi = lcmp(x, y)
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   417
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   418
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  // misc
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   420
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  // Sign extension
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  void sign_extend_short(Register reg);
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  void sign_extend_byte(Register reg);
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   424
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  // Division by power of 2, rounding towards 0
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  void division_with_shift(Register reg, int shift_value);
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   427
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  // Compares the top-most stack entries on the FPU stack and sets the eflags as follows:
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  //
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  // CF (corresponds to C0) if x < y
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twisti
parents:
diff changeset
   431
  // PF (corresponds to C2) if unordered
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   432
  // ZF (corresponds to C3) if x = y
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   433
  //
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   434
  // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   435
  // tmp is a temporary register, if none is available use noreg (only matters for non-P6 code)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   436
  void fcmp(Register tmp);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   437
  // Variant of the above which allows y to be further down the stack
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   438
  // and which only pops x and y if specified. If pop_right is
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   439
  // specified then pop_left must also be specified.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   440
  void fcmp(Register tmp, int index, bool pop_left, bool pop_right);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   441
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   442
  // Floating-point comparison for Java
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   443
  // Compares the top-most stack entries on the FPU stack and stores the result in dst.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   444
  // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   445
  // (semantics as described in JVM spec.)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   446
  void fcmp2int(Register dst, bool unordered_is_less);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   447
  // Variant of the above which allows y to be further down the stack
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   448
  // and which only pops x and y if specified. If pop_right is
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   449
  // specified then pop_left must also be specified.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   450
  void fcmp2int(Register dst, bool unordered_is_less, int index, bool pop_left, bool pop_right);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   451
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   452
  // Floating-point remainder for Java (ST0 = ST0 fremr ST1, ST1 is empty afterwards)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   453
  // tmp is a temporary register, if none is available use noreg
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   454
  void fremr(Register tmp);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   455
41323
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40644
diff changeset
   456
  // dst = c = a * b + c
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40644
diff changeset
   457
  void fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40644
diff changeset
   458
  void fmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
ddd5600d4762 8154122: Intrinsify fused mac operations
vdeshpande
parents: 40644
diff changeset
   459
46528
cf0da758e7b5 8181616: FMA Vectorization on x86
vdeshpande
parents: 46369
diff changeset
   460
  void vfmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
cf0da758e7b5 8181616: FMA Vectorization on x86
vdeshpande
parents: 46369
diff changeset
   461
  void vfmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
cf0da758e7b5 8181616: FMA Vectorization on x86
vdeshpande
parents: 46369
diff changeset
   462
  void vfmad(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
cf0da758e7b5 8181616: FMA Vectorization on x86
vdeshpande
parents: 46369
diff changeset
   463
  void vfmaf(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
cf0da758e7b5 8181616: FMA Vectorization on x86
vdeshpande
parents: 46369
diff changeset
   464
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   465
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   466
  // same as fcmp2int, but using SSE2
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   467
  void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   468
  void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   469
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   470
  // branch to L if FPU flag C2 is set/not set
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   471
  // tmp is a temporary register, if none is available use noreg
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   472
  void jC2 (Register tmp, Label& L);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   473
  void jnC2(Register tmp, Label& L);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   474
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   475
  // Pop ST (ffree & fincstp combined)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   476
  void fpop();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   477
32391
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   478
  // Load float value from 'address'. If UseSSE >= 1, the value is loaded into
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   479
  // register xmm0. Otherwise, the value is loaded onto the FPU stack.
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   480
  void load_float(Address src);
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   481
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   482
  // Store float value to 'address'. If UseSSE >= 1, the value is stored
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   483
  // from register xmm0. Otherwise, the value is stored from the FPU stack.
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   484
  void store_float(Address dst);
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   485
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   486
  // Load double value from 'address'. If UseSSE >= 2, the value is loaded into
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   487
  // register xmm0. Otherwise, the value is loaded onto the FPU stack.
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   488
  void load_double(Address src);
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   489
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   490
  // Store double value to 'address'. If UseSSE >= 2, the value is stored
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   491
  // from register xmm0. Otherwise, the value is stored from the FPU stack.
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   492
  void store_double(Address dst);
01e2f5e916c7 8076373: In 32-bit VM interpreter and compiled code process NaN values differently
zmajo
parents: 32203
diff changeset
   493
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   494
  // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   495
  void push_fTOS();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   496
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   497
  // pops double TOS element from CPU stack and pushes on FPU stack
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   498
  void pop_fTOS();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   499
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   500
  void empty_FPU_stack();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   501
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   502
  void push_IU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   503
  void pop_IU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   504
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   505
  void push_FPU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   506
  void pop_FPU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   507
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   508
  void push_CPU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   509
  void pop_CPU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   510
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   511
  // Round up to a power of two
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   512
  void round_to(Register reg, int modulus);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   513
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   514
  // Callee saved registers handling
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   515
  void push_callee_saved_registers();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   516
  void pop_callee_saved_registers();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   517
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   518
  // allocation
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   519
  void eden_allocate(
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   520
    Register obj,                      // result: pointer to object after successful allocation
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   521
    Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   522
    int      con_size_in_bytes,        // object size in bytes if   known at compile time
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   523
    Register t1,                       // temp register
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   524
    Label&   slow_case                 // continuation point if fast allocation fails
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   525
  );
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   526
  void tlab_allocate(
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   527
    Register obj,                      // result: pointer to object after successful allocation
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   528
    Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   529
    int      con_size_in_bytes,        // object size in bytes if   known at compile time
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   530
    Register t1,                       // temp register
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   531
    Register t2,                       // temp register
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   532
    Label&   slow_case                 // continuation point if fast allocation fails
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   533
  );
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   534
  Register tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case); // returns TLS address
35548
8d3afe96ffea 8086053: Address inconsistencies regarding ZeroTLAB
zmajo
parents: 35546
diff changeset
   535
  void zero_memory(Register address, Register length_in_bytes, int offset_in_bytes, Register temp);
8d3afe96ffea 8086053: Address inconsistencies regarding ZeroTLAB
zmajo
parents: 35546
diff changeset
   536
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   537
  void incr_allocated_bytes(Register thread,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   538
                            Register var_size_in_bytes, int con_size_in_bytes,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   539
                            Register t1 = noreg);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   540
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   541
  // interface method calling
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   542
  void lookup_interface_method(Register recv_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   543
                               Register intf_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   544
                               RegisterOrConstant itable_index,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   545
                               Register method_result,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   546
                               Register scan_temp,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   547
                               Label& no_such_interface);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   548
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   549
  // virtual method calling
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   550
  void lookup_virtual_method(Register recv_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   551
                             RegisterOrConstant vtable_index,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   552
                             Register method_result);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   553
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   554
  // Test sub_klass against super_klass, with fast and slow paths.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   555
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   556
  // The fast path produces a tri-state answer: yes / no / maybe-slow.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   557
  // One of the three labels can be NULL, meaning take the fall-through.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   558
  // If super_check_offset is -1, the value is loaded up from super_klass.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   559
  // No registers are killed, except temp_reg.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   560
  void check_klass_subtype_fast_path(Register sub_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   561
                                     Register super_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   562
                                     Register temp_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   563
                                     Label* L_success,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   564
                                     Label* L_failure,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   565
                                     Label* L_slow_path,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   566
                RegisterOrConstant super_check_offset = RegisterOrConstant(-1));
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   567
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   568
  // The rest of the type check; must be wired to a corresponding fast path.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   569
  // It does not repeat the fast path logic, so don't use it standalone.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   570
  // The temp_reg and temp2_reg can be noreg, if no temps are available.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   571
  // Updates the sub's secondary super cache as necessary.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   572
  // If set_cond_codes, condition codes will be Z on success, NZ on failure.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   573
  void check_klass_subtype_slow_path(Register sub_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   574
                                     Register super_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   575
                                     Register temp_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   576
                                     Register temp2_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   577
                                     Label* L_success,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   578
                                     Label* L_failure,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   579
                                     bool set_cond_codes = false);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   580
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   581
  // Simplified, combined version, good for typical uses.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   582
  // Falls through on failure.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   583
  void check_klass_subtype(Register sub_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   584
                           Register super_klass,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   585
                           Register temp_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   586
                           Label& L_success);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   587
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   588
  // method handles (JSR 292)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   589
  Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   590
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   591
  //----
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   592
  void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   593
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   594
  // Debugging
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   595
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   596
  // only if +VerifyOops
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   597
  // TODO: Make these macros with file and line like sparc version!
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   598
  void verify_oop(Register reg, const char* s = "broken oop");
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   599
  void verify_oop_addr(Address addr, const char * s = "broken oop addr");
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   600
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   601
  // TODO: verify method and klass metadata (compare against vptr?)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   602
  void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   603
  void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   604
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   605
#define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   606
#define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   607
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   608
  // only if +VerifyFPU
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   609
  void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   610
16624
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15483
diff changeset
   611
  // Verify or restore cpu control state after JNI call
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15483
diff changeset
   612
  void restore_cpu_control_state_after_jni();
9dbd4b210bf9 8011102: Clear AVX registers after return from JNI call
kvn
parents: 15483
diff changeset
   613
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   614
  // prints msg, dumps registers and stops execution
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   615
  void stop(const char* msg);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   616
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   617
  // prints msg and continues
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   618
  void warn(const char* msg);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   619
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   620
  // dumps registers and other state
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   621
  void print_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   622
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   623
  static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   624
  static void debug64(char* msg, int64_t pc, int64_t regs[]);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   625
  static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   626
  static void print_state64(int64_t pc, int64_t regs[]);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   627
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   628
  void os_breakpoint();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   629
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   630
  void untested()                                { stop("untested"); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   631
46560
388aa8d67c80 8181449: Fix debug.hpp / globalDefinitions.hpp dependency inversion
kbarrett
parents: 46530
diff changeset
   632
  void unimplemented(const char* what = "");
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   633
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   634
  void should_not_reach_here()                   { stop("should not reach here"); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   635
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   636
  void print_CPU_state();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   637
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   638
  // Stack overflow checking
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   639
  void bang_stack_with_offset(int offset) {
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   640
    // stack grows down, caller passes positive offset
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   641
    assert(offset > 0, "must bang with negative offset");
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   642
    movl(Address(rsp, (-offset)), rax);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   643
  }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   644
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   645
  // Writes to stack successive pages until offset reached to check for
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   646
  // stack overflow + shadow pages.  Also, clobbers tmp
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   647
  void bang_stack_size(Register size, Register tmp);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   648
35071
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 34203
diff changeset
   649
  // Check for reserved stack access in method being exited (for JIT)
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 34203
diff changeset
   650
  void reserved_stack_check();
a0910b1d3e0d 8046936: JEP 270: Reserved Stack Areas for Critical Sections
fparain
parents: 34203
diff changeset
   651
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   652
  virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   653
                                                Register tmp,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   654
                                                int offset);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   655
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   656
  // Support for serializing memory accesses between threads
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   657
  void serialize_memory(Register thread, Register tmp);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   658
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   659
  void verify_tlab();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   660
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   661
  // Biased locking support
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   662
  // lock_reg and obj_reg must be loaded up with the appropriate values.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   663
  // swap_reg must be rax, and is killed.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   664
  // tmp_reg is optional. If it is supplied (i.e., != noreg) it will
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   665
  // be killed; if not supplied, push/pop will be used internally to
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   666
  // allocate a temporary (inefficient, avoid if possible).
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   667
  // Optional slow case is for implementations (interpreter and C1) which branch to
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   668
  // slow case directly. Leaves condition codes set for C2's Fast_Lock node.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   669
  // Returns offset of first potentially-faulting instruction for null
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   670
  // check info (currently consumed only by C1). If
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   671
  // swap_reg_contains_mark is true then returns -1 as it is assumed
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   672
  // the calling code has already passed any potential faults.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   673
  int biased_locking_enter(Register lock_reg, Register obj_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   674
                           Register swap_reg, Register tmp_reg,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   675
                           bool swap_reg_contains_mark,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   676
                           Label& done, Label* slow_case = NULL,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   677
                           BiasedLockingCounters* counters = NULL);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   678
  void biased_locking_exit (Register obj_reg, Register temp_reg, Label& done);
22910
88c3369b5967 8033805: Move Fast_Lock/Fast_Unlock code from .ad files to macroassembler
kvn
parents: 20702
diff changeset
   679
#ifdef COMPILER2
88c3369b5967 8033805: Move Fast_Lock/Fast_Unlock code from .ad files to macroassembler
kvn
parents: 20702
diff changeset
   680
  // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
88c3369b5967 8033805: Move Fast_Lock/Fast_Unlock code from .ad files to macroassembler
kvn
parents: 20702
diff changeset
   681
  // See full desription in macroAssembler_x86.cpp.
23491
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   682
  void fast_lock(Register obj, Register box, Register tmp,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   683
                 Register scr, Register cx1, Register cx2,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   684
                 BiasedLockingCounters* counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   685
                 RTMLockingCounters* rtm_counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   686
                 RTMLockingCounters* stack_rtm_counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   687
                 Metadata* method_data,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   688
                 bool use_rtm, bool profile_rtm);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   689
  void fast_unlock(Register obj, Register box, Register tmp, bool use_rtm);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   690
#if INCLUDE_RTM_OPT
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   691
  void rtm_counters_update(Register abort_status, Register rtm_counters);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   692
  void branch_on_random_using_rdtsc(Register tmp, Register scr, int count, Label& brLabel);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   693
  void rtm_abort_ratio_calculation(Register tmp, Register rtm_counters_reg,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   694
                                   RTMLockingCounters* rtm_counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   695
                                   Metadata* method_data);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   696
  void rtm_profiling(Register abort_status_Reg, Register rtm_counters_Reg,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   697
                     RTMLockingCounters* rtm_counters, Metadata* method_data, bool profile_rtm);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   698
  void rtm_retry_lock_on_abort(Register retry_count, Register abort_status, Label& retryLabel);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   699
  void rtm_retry_lock_on_busy(Register retry_count, Register box, Register tmp, Register scr, Label& retryLabel);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   700
  void rtm_stack_locking(Register obj, Register tmp, Register scr,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   701
                         Register retry_on_abort_count,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   702
                         RTMLockingCounters* stack_rtm_counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   703
                         Metadata* method_data, bool profile_rtm,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   704
                         Label& DONE_LABEL, Label& IsInflated);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   705
  void rtm_inflated_locking(Register obj, Register box, Register tmp,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   706
                            Register scr, Register retry_on_busy_count,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   707
                            Register retry_on_abort_count,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   708
                            RTMLockingCounters* rtm_counters,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   709
                            Metadata* method_data, bool profile_rtm,
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   710
                            Label& DONE_LABEL);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   711
#endif
22910
88c3369b5967 8033805: Move Fast_Lock/Fast_Unlock code from .ad files to macroassembler
kvn
parents: 20702
diff changeset
   712
#endif
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   713
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   714
  Condition negate_condition(Condition cond);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   715
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   716
  // Instructions that use AddressLiteral operands. These instruction can handle 32bit/64bit
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   717
  // operands. In general the names are modified to avoid hiding the instruction in Assembler
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   718
  // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   719
  // here in MacroAssembler. The major exception to this rule is call
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   720
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   721
  // Arithmetics
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   722
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   723
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   724
  void addptr(Address dst, int32_t src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   725
  void addptr(Address dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   726
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   727
  void addptr(Register dst, Address src) { LP64_ONLY(addq(dst, src)) NOT_LP64(addl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   728
  void addptr(Register dst, int32_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   729
  void addptr(Register dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   730
  void addptr(Register dst, RegisterOrConstant src) {
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   731
    if (src.is_constant()) addptr(dst, (int) src.as_constant());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   732
    else                   addptr(dst,       src.as_register());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   733
  }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   734
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   735
  void andptr(Register dst, int32_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   736
  void andptr(Register src1, Register src2) { LP64_ONLY(andq(src1, src2)) NOT_LP64(andl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   737
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   738
  void cmp8(AddressLiteral src1, int imm);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   739
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   740
  // renamed to drag out the casting of address to int32_t/intptr_t
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   741
  void cmp32(Register src1, int32_t imm);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   742
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   743
  void cmp32(AddressLiteral src1, int32_t imm);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   744
  // compare reg - mem, or reg - &mem
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   745
  void cmp32(Register src1, AddressLiteral src2);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   746
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   747
  void cmp32(Register src1, Address src2);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   748
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   749
#ifndef _LP64
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   750
  void cmpklass(Address dst, Metadata* obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   751
  void cmpklass(Register dst, Metadata* obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   752
  void cmpoop(Address dst, jobject obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   753
  void cmpoop(Register dst, jobject obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   754
#endif // _LP64
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   755
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   756
  // NOTE src2 must be the lval. This is NOT an mem-mem compare
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   757
  void cmpptr(Address src1, AddressLiteral src2);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   758
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   759
  void cmpptr(Register src1, AddressLiteral src2);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   760
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   761
  void cmpptr(Register src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   762
  void cmpptr(Register src1, Address src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   763
  // void cmpptr(Address src1, Register src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   764
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   765
  void cmpptr(Register src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   766
  void cmpptr(Address src1, int32_t src2) { LP64_ONLY(cmpq(src1, src2)) NOT_LP64(cmpl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   767
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   768
  // cmp64 to avoild hiding cmpq
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   769
  void cmp64(Register src1, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   770
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   771
  void cmpxchgptr(Register reg, Address adr);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   772
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   773
  void locked_cmpxchgptr(Register reg, AddressLiteral adr);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   774
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   775
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   776
  void imulptr(Register dst, Register src) { LP64_ONLY(imulq(dst, src)) NOT_LP64(imull(dst, src)); }
23491
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   777
  void imulptr(Register dst, Register src, int imm32) { LP64_ONLY(imulq(dst, src, imm32)) NOT_LP64(imull(dst, src, imm32)); }
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   778
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   779
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   780
  void negptr(Register dst) { LP64_ONLY(negq(dst)) NOT_LP64(negl(dst)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   781
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   782
  void notptr(Register dst) { LP64_ONLY(notq(dst)) NOT_LP64(notl(dst)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   783
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   784
  void shlptr(Register dst, int32_t shift);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   785
  void shlptr(Register dst) { LP64_ONLY(shlq(dst)) NOT_LP64(shll(dst)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   786
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   787
  void shrptr(Register dst, int32_t shift);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   788
  void shrptr(Register dst) { LP64_ONLY(shrq(dst)) NOT_LP64(shrl(dst)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   789
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   790
  void sarptr(Register dst) { LP64_ONLY(sarq(dst)) NOT_LP64(sarl(dst)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   791
  void sarptr(Register dst, int32_t src) { LP64_ONLY(sarq(dst, src)) NOT_LP64(sarl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   792
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   793
  void subptr(Address dst, int32_t src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   794
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   795
  void subptr(Register dst, Address src) { LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   796
  void subptr(Register dst, int32_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   797
  // Force generation of a 4 byte immediate value even if it fits into 8bit
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   798
  void subptr_imm32(Register dst, int32_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   799
  void subptr(Register dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   800
  void subptr(Register dst, RegisterOrConstant src) {
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   801
    if (src.is_constant()) subptr(dst, (int) src.as_constant());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   802
    else                   subptr(dst,       src.as_register());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   803
  }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   804
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   805
  void sbbptr(Address dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   806
  void sbbptr(Register dst, int32_t src) { LP64_ONLY(sbbq(dst, src)) NOT_LP64(sbbl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   807
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   808
  void xchgptr(Register src1, Register src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   809
  void xchgptr(Register src1, Address src2) { LP64_ONLY(xchgq(src1, src2)) NOT_LP64(xchgl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   810
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   811
  void xaddptr(Address src1, Register src2) { LP64_ONLY(xaddq(src1, src2)) NOT_LP64(xaddl(src1, src2)) ; }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   812
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   813
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   814
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   815
  // Helper functions for statistics gathering.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   816
  // Conditionally (atomically, on MPs) increments passed counter address, preserving condition codes.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   817
  void cond_inc32(Condition cond, AddressLiteral counter_addr);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   818
  // Unconditional atomic increment.
23491
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   819
  void atomic_incl(Address counter_addr);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   820
  void atomic_incl(AddressLiteral counter_addr, Register scr = rscratch1);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   821
#ifdef _LP64
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   822
  void atomic_incq(Address counter_addr);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   823
  void atomic_incq(AddressLiteral counter_addr, Register scr = rscratch1);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   824
#endif
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   825
  void atomic_incptr(AddressLiteral counter_addr, Register scr = rscratch1) { LP64_ONLY(atomic_incq(counter_addr, scr)) NOT_LP64(atomic_incl(counter_addr, scr)) ; }
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
   826
  void atomic_incptr(Address counter_addr) { LP64_ONLY(atomic_incq(counter_addr)) NOT_LP64(atomic_incl(counter_addr)) ; }
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   827
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   828
  void lea(Register dst, AddressLiteral adr);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   829
  void lea(Address dst, AddressLiteral adr);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   830
  void lea(Register dst, Address adr) { Assembler::lea(dst, adr); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   831
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   832
  void leal32(Register dst, Address src) { leal(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   833
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   834
  // Import other testl() methods from the parent class or else
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   835
  // they will be hidden by the following overriding declaration.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   836
  using Assembler::testl;
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   837
  void testl(Register dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   838
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   839
  void orptr(Register dst, Address src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   840
  void orptr(Register dst, Register src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   841
  void orptr(Register dst, int32_t src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
20702
bbe0fcde6e13 8023657: New type profiling points: arguments to call
roland
parents: 19319
diff changeset
   842
  void orptr(Address dst, int32_t imm32) { LP64_ONLY(orq(dst, imm32)) NOT_LP64(orl(dst, imm32)); }
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   843
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   844
  void testptr(Register src, int32_t imm32) {  LP64_ONLY(testq(src, imm32)) NOT_LP64(testl(src, imm32)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   845
  void testptr(Register src1, Register src2);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   846
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   847
  void xorptr(Register dst, Register src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   848
  void xorptr(Register dst, Address src) { LP64_ONLY(xorq(dst, src)) NOT_LP64(xorl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   849
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   850
  // Calls
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   851
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   852
  void call(Label& L, relocInfo::relocType rtype);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   853
  void call(Register entry);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   854
38238
1bbcc430c78d 8151268: Wire up the x86 _vectorizedMismatch stub routine in C1
psandoz
parents: 38135
diff changeset
   855
  // NOTE: this call transfers to the effective address of entry NOT
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   856
  // the address contained by entry. This is because this is more natural
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   857
  // for jumps/calls.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   858
  void call(AddressLiteral entry);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   859
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   860
  // Emit the CompiledIC call idiom
35086
bbf32241d851 8072008: Emit direct call instead of linkTo* for recursive indy/MH.invoke* calls
vlivanov
parents: 34203
diff changeset
   861
  void ic_call(address entry, jint method_index = 0);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   862
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   863
  // Jumps
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   864
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   865
  // NOTE: these jumps tranfer to the effective address of dst NOT
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   866
  // the address contained by dst. This is because this is more natural
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   867
  // for jumps/calls.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   868
  void jump(AddressLiteral dst);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   869
  void jump_cc(Condition cc, AddressLiteral dst);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   870
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   871
  // 32bit can do a case table jump in one instruction but we no longer allow the base
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   872
  // to be installed in the Address class. This jump will tranfers to the address
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   873
  // contained in the location described by entry (not the address of entry)
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   874
  void jump(ArrayAddress entry);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   875
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   876
  // Floating
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   877
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   878
  void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   879
  void andpd(XMMRegister dst, AddressLiteral src);
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
   880
  void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   881
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   882
  void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   883
  void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   884
  void andps(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   885
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   886
  void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   887
  void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   888
  void comiss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   889
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   890
  void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   891
  void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   892
  void comisd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   893
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   894
  void fadd_s(Address src)        { Assembler::fadd_s(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   895
  void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   896
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   897
  void fldcw(Address src) { Assembler::fldcw(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   898
  void fldcw(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   899
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   900
  void fld_s(int index)   { Assembler::fld_s(index); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   901
  void fld_s(Address src) { Assembler::fld_s(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   902
  void fld_s(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   903
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   904
  void fld_d(Address src) { Assembler::fld_d(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   905
  void fld_d(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   906
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   907
  void fld_x(Address src) { Assembler::fld_x(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   908
  void fld_x(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   909
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   910
  void fmul_s(Address src)        { Assembler::fmul_s(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   911
  void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   912
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   913
  void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   914
  void ldmxcsr(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
   915
38135
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   916
#ifdef _LP64
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   917
 private:
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   918
  void sha256_AVX2_one_round_compute(
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   919
    Register  reg_old_h,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   920
    Register  reg_a,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   921
    Register  reg_b,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   922
    Register  reg_c,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   923
    Register  reg_d,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   924
    Register  reg_e,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   925
    Register  reg_f,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   926
    Register  reg_g,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   927
    Register  reg_h,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   928
    int iter);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   929
  void sha256_AVX2_four_rounds_compute_first(int start);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   930
  void sha256_AVX2_four_rounds_compute_last(int start);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   931
  void sha256_AVX2_one_round_and_sched(
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   932
        XMMRegister xmm_0,     /* == ymm4 on 0, 1, 2, 3 iterations, then rotate 4 registers left on 4, 8, 12 iterations */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   933
        XMMRegister xmm_1,     /* ymm5 */  /* full cycle is 16 iterations */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   934
        XMMRegister xmm_2,     /* ymm6 */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   935
        XMMRegister xmm_3,     /* ymm7 */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   936
        Register    reg_a,      /* == eax on 0 iteration, then rotate 8 register right on each next iteration */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   937
        Register    reg_b,      /* ebx */    /* full cycle is 8 iterations */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   938
        Register    reg_c,      /* edi */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   939
        Register    reg_d,      /* esi */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   940
        Register    reg_e,      /* r8d */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   941
        Register    reg_f,      /* r9d */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   942
        Register    reg_g,      /* r10d */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   943
        Register    reg_h,      /* r11d */
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   944
        int iter);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   945
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   946
  void addm(int disp, Register r1, Register r2);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   947
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   948
 public:
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   949
  void sha256_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   950
                   XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   951
                   Register buf, Register state, Register ofs, Register limit, Register rsp,
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   952
                   bool multi_block, XMMRegister shuf_mask);
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   953
#endif
e06e2d071465 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
jcivlin
parents: 38049
diff changeset
   954
42039
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   955
#ifdef _LP64
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   956
 private:
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   957
  void sha512_AVX2_one_round_compute(Register old_h, Register a, Register b, Register c, Register d,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   958
                                     Register e, Register f, Register g, Register h, int iteration);
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   959
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   960
  void sha512_AVX2_one_round_and_schedule(XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   961
                                          Register a, Register b, Register c, Register d, Register e, Register f,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   962
                                          Register g, Register h, int iteration);
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   963
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   964
  void addmq(int disp, Register r1, Register r2);
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   965
 public:
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   966
  void sha512_AVX2(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   967
                   XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   968
                   Register buf, Register state, Register ofs, Register limit, Register rsp, bool multi_block,
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   969
                   XMMRegister shuf_mask);
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   970
#endif
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
   971
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   972
  void fast_sha1(XMMRegister abcd, XMMRegister e0, XMMRegister e1, XMMRegister msg0,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   973
                 XMMRegister msg1, XMMRegister msg2, XMMRegister msg3, XMMRegister shuf_mask,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   974
                 Register buf, Register state, Register ofs, Register limit, Register rsp,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   975
                 bool multi_block);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   976
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   977
#ifdef _LP64
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   978
  void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   979
                   XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   980
                   Register buf, Register state, Register ofs, Register limit, Register rsp,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   981
                   bool multi_block, XMMRegister shuf_mask);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   982
#else
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   983
  void fast_sha256(XMMRegister msg, XMMRegister state0, XMMRegister state1, XMMRegister msgtmp0,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   984
                   XMMRegister msgtmp1, XMMRegister msgtmp2, XMMRegister msgtmp3, XMMRegister msgtmp4,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   985
                   Register buf, Register state, Register ofs, Register limit, Register rsp,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   986
                   bool multi_block);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   987
#endif
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   988
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
   989
  void fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
   990
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
   991
                Register rax, Register rcx, Register rdx, Register tmp);
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
   992
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   993
#ifdef _LP64
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
   994
  void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
   995
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
   996
                Register rax, Register rcx, Register rdx, Register tmp1, Register tmp2);
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
   997
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
   998
  void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
   999
                  XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1000
                  Register rax, Register rcx, Register rdx, Register r11);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1001
35146
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  1002
  void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
9ebfec283f56 8145688: Update for x86 pow in the math lib
kvn
parents: 35135
diff changeset
  1003
                XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1004
                Register rdx, Register tmp1, Register tmp2, Register tmp3, Register tmp4);
33465
6063f28a6efb 8139575: Update for x86 log in the math lib
iveresov
parents: 33089
diff changeset
  1005
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1006
  void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1007
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1008
                Register rax, Register rbx, Register rcx, Register rdx, Register tmp1, Register tmp2,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1009
                Register tmp3, Register tmp4);
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1010
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1011
  void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1012
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1013
                Register rax, Register rcx, Register rdx, Register tmp1,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1014
                Register tmp2, Register tmp3, Register tmp4);
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1015
  void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1016
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1017
                Register rax, Register rcx, Register rdx, Register tmp1,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1018
                Register tmp2, Register tmp3, Register tmp4);
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1019
#else
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1020
  void fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1021
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1022
                Register rax, Register rcx, Register rdx, Register tmp1);
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1023
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1024
  void fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1025
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1026
                Register rax, Register rcx, Register rdx, Register tmp);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1027
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1028
  void fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1029
                XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1030
                Register rdx, Register tmp);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1031
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1032
  void fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1033
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1034
                Register rax, Register rbx, Register rdx);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1035
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1036
  void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1037
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1038
                Register rax, Register rcx, Register rdx, Register tmp);
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1039
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1040
  void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1041
                        Register edx, Register ebx, Register esi, Register edi,
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1042
                        Register ebp, Register esp);
36555
4f37fd7a5a09 8150767: Enables SHA Extensions on x86
vdeshpande
parents: 36554
diff changeset
  1043
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1044
  void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1045
                         Register esi, Register edi, Register ebp, Register esp);
38018
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1046
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1047
  void libm_tancot_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1048
                        Register edx, Register ebx, Register esi, Register edi,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1049
                        Register ebp, Register esp);
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1050
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1051
  void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1052
                XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1dc6c6f21231 8152907: Update for x86 tan and log10 in the math lib
vdeshpande
parents: 37293
diff changeset
  1053
                Register rax, Register rcx, Register rdx, Register tmp);
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1054
#endif
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1055
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1056
  void increase_precision();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1057
  void restore_precision();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1058
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1059
private:
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1060
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1061
  // these are private because users should be doing movflt/movdbl
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1062
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1063
  void movss(Address dst, XMMRegister src)     { Assembler::movss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1064
  void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1065
  void movss(XMMRegister dst, Address src)     { Assembler::movss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1066
  void movss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1067
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1068
  void movlpd(XMMRegister dst, Address src)    {Assembler::movlpd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1069
  void movlpd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1070
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1071
public:
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1072
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1073
  void addsd(XMMRegister dst, XMMRegister src)    { Assembler::addsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1074
  void addsd(XMMRegister dst, Address src)        { Assembler::addsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1075
  void addsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1076
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1077
  void addss(XMMRegister dst, XMMRegister src)    { Assembler::addss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1078
  void addss(XMMRegister dst, Address src)        { Assembler::addss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1079
  void addss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1080
35540
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1081
  void addpd(XMMRegister dst, XMMRegister src)    { Assembler::addpd(dst, src); }
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1082
  void addpd(XMMRegister dst, Address src)        { Assembler::addpd(dst, src); }
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1083
  void addpd(XMMRegister dst, AddressLiteral src);
e001ad24dcdb 8143353: update for x86 sin and cos in the math lib
vdeshpande
parents: 35146
diff changeset
  1084
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1085
  void divsd(XMMRegister dst, XMMRegister src)    { Assembler::divsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1086
  void divsd(XMMRegister dst, Address src)        { Assembler::divsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1087
  void divsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1088
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1089
  void divss(XMMRegister dst, XMMRegister src)    { Assembler::divss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1090
  void divss(XMMRegister dst, Address src)        { Assembler::divss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1091
  void divss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1092
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1093
  // Move Unaligned Double Quadword
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1094
  void movdqu(Address     dst, XMMRegister src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1095
  void movdqu(XMMRegister dst, Address src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1096
  void movdqu(XMMRegister dst, XMMRegister src);
43423
bcaab17f72a5 8171974: Fix for R10 Register clobbering with usage of ExternalAddress
vdeshpande
parents: 42039
diff changeset
  1097
  void movdqu(XMMRegister dst, AddressLiteral src, Register scratchReg = rscratch1);
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1098
  // AVX Unaligned forms
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1099
  void vmovdqu(Address     dst, XMMRegister src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1100
  void vmovdqu(XMMRegister dst, Address src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1101
  void vmovdqu(XMMRegister dst, XMMRegister src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1102
  void vmovdqu(XMMRegister dst, AddressLiteral src);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1103
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1104
  // Move Aligned Double Quadword
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1105
  void movdqa(XMMRegister dst, Address src)       { Assembler::movdqa(dst, src); }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1106
  void movdqa(XMMRegister dst, XMMRegister src)   { Assembler::movdqa(dst, src); }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1107
  void movdqa(XMMRegister dst, AddressLiteral src);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1108
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1109
  void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1110
  void movsd(Address dst, XMMRegister src)     { Assembler::movsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1111
  void movsd(XMMRegister dst, Address src)     { Assembler::movsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1112
  void movsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1113
33089
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  1114
  void mulpd(XMMRegister dst, XMMRegister src)    { Assembler::mulpd(dst, src); }
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  1115
  void mulpd(XMMRegister dst, Address src)        { Assembler::mulpd(dst, src); }
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  1116
  void mulpd(XMMRegister dst, AddressLiteral src);
f4e956ed8b43 8132207: update for x86 exp in the math lib
iveresov
parents: 33066
diff changeset
  1117
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1118
  void mulsd(XMMRegister dst, XMMRegister src)    { Assembler::mulsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1119
  void mulsd(XMMRegister dst, Address src)        { Assembler::mulsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1120
  void mulsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1121
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1122
  void mulss(XMMRegister dst, XMMRegister src)    { Assembler::mulss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1123
  void mulss(XMMRegister dst, Address src)        { Assembler::mulss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1124
  void mulss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1125
25932
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1126
  // Carry-Less Multiplication Quadword
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1127
  void pclmulldq(XMMRegister dst, XMMRegister src) {
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1128
    // 0x00 - multiply lower 64 bits [0:63]
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1129
    Assembler::pclmulqdq(dst, src, 0x00);
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1130
  }
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1131
  void pclmulhdq(XMMRegister dst, XMMRegister src) {
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1132
    // 0x11 - multiply upper 64 bits [64:127]
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1133
    Assembler::pclmulqdq(dst, src, 0x11);
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1134
  }
15d133edd8f6 8052081: Optimize generated by C2 code for Intel's Atom processor
kvn
parents: 24018
diff changeset
  1135
34203
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1136
  void pcmpeqb(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1137
  void pcmpeqw(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1138
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1139
  void pcmpestri(XMMRegister dst, Address src, int imm8);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1140
  void pcmpestri(XMMRegister dst, XMMRegister src, int imm8);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1141
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1142
  void pmovzxbw(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1143
  void pmovzxbw(XMMRegister dst, Address src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1144
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1145
  void pmovmskb(Register dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1146
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1147
  void ptest(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1148
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1149
  void sqrtsd(XMMRegister dst, XMMRegister src)    { Assembler::sqrtsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1150
  void sqrtsd(XMMRegister dst, Address src)        { Assembler::sqrtsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1151
  void sqrtsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1152
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1153
  void sqrtss(XMMRegister dst, XMMRegister src)    { Assembler::sqrtss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1154
  void sqrtss(XMMRegister dst, Address src)        { Assembler::sqrtss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1155
  void sqrtss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1156
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1157
  void subsd(XMMRegister dst, XMMRegister src)    { Assembler::subsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1158
  void subsd(XMMRegister dst, Address src)        { Assembler::subsd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1159
  void subsd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1160
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1161
  void subss(XMMRegister dst, XMMRegister src)    { Assembler::subss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1162
  void subss(XMMRegister dst, Address src)        { Assembler::subss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1163
  void subss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1164
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1165
  void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1166
  void ucomiss(XMMRegister dst, Address src)     { Assembler::ucomiss(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1167
  void ucomiss(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1168
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1169
  void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1170
  void ucomisd(XMMRegister dst, Address src)     { Assembler::ucomisd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1171
  void ucomisd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1172
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1173
  // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1174
  void xorpd(XMMRegister dst, XMMRegister src);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1175
  void xorpd(XMMRegister dst, Address src)     { Assembler::xorpd(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1176
  void xorpd(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1177
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1178
  // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1179
  void xorps(XMMRegister dst, XMMRegister src);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1180
  void xorps(XMMRegister dst, Address src)     { Assembler::xorps(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1181
  void xorps(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1182
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1183
  // Shuffle Bytes
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1184
  void pshufb(XMMRegister dst, XMMRegister src) { Assembler::pshufb(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1185
  void pshufb(XMMRegister dst, Address src)     { Assembler::pshufb(dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1186
  void pshufb(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1187
  // AVX 3-operands instructions
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1188
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1189
  void vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1190
  void vaddsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1191
  void vaddsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1192
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1193
  void vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vaddss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1194
  void vaddss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vaddss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1195
  void vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1196
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1197
  void vabsss(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1198
  void vabssd(XMMRegister dst, XMMRegister nds, XMMRegister src, AddressLiteral negate_field, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1199
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1200
  void vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1201
  void vpaddb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1202
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1203
  void vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1204
  void vpaddw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1205
42039
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
  1206
  void vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
  1207
  void vpand(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vpand(dst, nds, src, vector_len); }
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
  1208
  void vpand(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len);
db627462f2c9 8165381: Update for x86 SHA512 using AVX2
kvn
parents: 41323
diff changeset
  1209
34203
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1210
  void vpbroadcastw(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1211
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1212
  void vpcmpeqb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1213
  void vpcmpeqw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1214
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1215
  void vpmovzxbw(XMMRegister dst, Address src, int vector_len);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1216
  void vpmovmskb(Register dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1217
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1218
  void vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1219
  void vpmullw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1220
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1221
  void vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1222
  void vpsubb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1223
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1224
  void vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1225
  void vpsubw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1226
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1227
  void vpsraw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1228
  void vpsraw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1229
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1230
  void vpsrlw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1231
  void vpsrlw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1232
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1233
  void vpsllw(XMMRegister dst, XMMRegister nds, XMMRegister shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1234
  void vpsllw(XMMRegister dst, XMMRegister nds, int shift, int vector_len);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1235
34203
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1236
  void vptest(XMMRegister dst, XMMRegister src);
6817dadf6c7e 8142980: SKX SpecJvm2008 - Derby
mcberg
parents: 34162
diff changeset
  1237
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1238
  void punpcklbw(XMMRegister dst, XMMRegister src);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1239
  void punpcklbw(XMMRegister dst, Address src) { Assembler::punpcklbw(dst, src); }
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1240
45236
1b8879e6d9c2 8178800: compiler/c2/PolynomialRoot.java fails on Xeon Phi linux host with UseAVX=3
mcberg
parents: 44406
diff changeset
  1241
  void pshufd(XMMRegister dst, Address src, int mode);
1b8879e6d9c2 8178800: compiler/c2/PolynomialRoot.java fails on Xeon Phi linux host with UseAVX=3
mcberg
parents: 44406
diff changeset
  1242
  void pshufd(XMMRegister dst, XMMRegister src, int mode) { Assembler::pshufd(dst, src, mode); }
1b8879e6d9c2 8178800: compiler/c2/PolynomialRoot.java fails on Xeon Phi linux host with UseAVX=3
mcberg
parents: 44406
diff changeset
  1243
34162
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1244
  void pshuflw(XMMRegister dst, XMMRegister src, int mode);
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1245
  void pshuflw(XMMRegister dst, Address src, int mode) { Assembler::pshuflw(dst, src, mode); }
16b54851eaf6 8140779: Code generation fixes for avx512
iveresov
parents: 33628
diff changeset
  1246
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1247
  void vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandpd(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1248
  void vandpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandpd(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1249
  void vandpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1250
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1251
  void vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vandps(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1252
  void vandps(XMMRegister dst, XMMRegister nds, Address src, int vector_len)     { Assembler::vandps(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1253
  void vandps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1254
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1255
  void vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1256
  void vdivsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1257
  void vdivsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1258
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1259
  void vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vdivss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1260
  void vdivss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vdivss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1261
  void vdivss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1262
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1263
  void vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1264
  void vmulsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1265
  void vmulsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1266
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1267
  void vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vmulss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1268
  void vmulss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vmulss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1269
  void vmulss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1270
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1271
  void vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1272
  void vsubsd(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubsd(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1273
  void vsubsd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1274
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1275
  void vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { Assembler::vsubss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1276
  void vsubss(XMMRegister dst, XMMRegister nds, Address src)     { Assembler::vsubss(dst, nds, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1277
  void vsubss(XMMRegister dst, XMMRegister nds, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1278
32727
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32391
diff changeset
  1279
  void vnegatess(XMMRegister dst, XMMRegister nds, AddressLiteral src);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32391
diff changeset
  1280
  void vnegatesd(XMMRegister dst, XMMRegister nds, AddressLiteral src);
320855c2baef 8132160: support for AVX 512 call frames and stack management
mcberg
parents: 32391
diff changeset
  1281
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1282
  // AVX Vector instructions
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1283
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1284
  void vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1285
  void vxorpd(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorpd(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1286
  void vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1287
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1288
  void vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1289
  void vxorps(XMMRegister dst, XMMRegister nds, Address src, int vector_len) { Assembler::vxorps(dst, nds, src, vector_len); }
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1290
  void vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1291
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1292
  void vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1293
    if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1294
      Assembler::vpxor(dst, nds, src, vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1295
    else
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1296
      Assembler::vxorpd(dst, nds, src, vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1297
  }
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1298
  void vpxor(XMMRegister dst, XMMRegister nds, Address src, int vector_len) {
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1299
    if (UseAVX > 1 || (vector_len < 1)) // vpxor 256 bit is available only in AVX2
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1300
      Assembler::vpxor(dst, nds, src, vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1301
    else
30624
2e1803c8a26d 8076276: Add support for AVX512
kvn
parents: 26434
diff changeset
  1302
      Assembler::vxorpd(dst, nds, src, vector_len);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1303
  }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1304
15117
625397df6f4f 8005419: Improve intrinsics code performance on x86 by using AVX2
kvn
parents: 15114
diff changeset
  1305
  // Simple version for AVX2 256bit vectors
625397df6f4f 8005419: Improve intrinsics code performance on x86 by using AVX2
kvn
parents: 15114
diff changeset
  1306
  void vpxor(XMMRegister dst, XMMRegister src) { Assembler::vpxor(dst, dst, src, true); }
625397df6f4f 8005419: Improve intrinsics code performance on x86 by using AVX2
kvn
parents: 15114
diff changeset
  1307
  void vpxor(XMMRegister dst, Address src) { Assembler::vpxor(dst, dst, src, true); }
625397df6f4f 8005419: Improve intrinsics code performance on x86 by using AVX2
kvn
parents: 15114
diff changeset
  1308
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1309
  void vinserti128(XMMRegister dst, XMMRegister nds, XMMRegister src, uint8_t imm8) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1310
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1311
      Assembler::vinserti32x4(dst, dst, src, imm8);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1312
    } else if (UseAVX > 1) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1313
      // vinserti128 is available only in AVX2
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1314
      Assembler::vinserti128(dst, nds, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1315
    } else {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1316
      Assembler::vinsertf128(dst, nds, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1317
    }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1318
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1319
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1320
  void vinserti128(XMMRegister dst, XMMRegister nds, Address src, uint8_t imm8) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1321
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1322
      Assembler::vinserti32x4(dst, dst, src, imm8);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1323
    } else if (UseAVX > 1) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1324
      // vinserti128 is available only in AVX2
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1325
      Assembler::vinserti128(dst, nds, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1326
    } else {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1327
      Assembler::vinsertf128(dst, nds, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1328
    }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1329
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1330
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1331
  void vextracti128(XMMRegister dst, XMMRegister src, uint8_t imm8) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1332
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1333
      Assembler::vextracti32x4(dst, src, imm8);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1334
    } else if (UseAVX > 1) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1335
      // vextracti128 is available only in AVX2
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1336
      Assembler::vextracti128(dst, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1337
    } else {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1338
      Assembler::vextractf128(dst, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1339
    }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1340
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1341
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1342
  void vextracti128(Address dst, XMMRegister src, uint8_t imm8) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1343
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1344
      Assembler::vextracti32x4(dst, src, imm8);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1345
    } else if (UseAVX > 1) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1346
      // vextracti128 is available only in AVX2
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1347
      Assembler::vextracti128(dst, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1348
    } else {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1349
      Assembler::vextractf128(dst, src, imm8);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1350
    }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1351
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1352
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1353
  // 128bit copy to/from high 128 bits of 256bit (YMM) vector registers
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1354
  void vinserti128_high(XMMRegister dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1355
    vinserti128(dst, dst, src, 1);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1356
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1357
  void vinserti128_high(XMMRegister dst, Address src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1358
    vinserti128(dst, dst, src, 1);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1359
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1360
  void vextracti128_high(XMMRegister dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1361
    vextracti128(dst, src, 1);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1362
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1363
  void vextracti128_high(Address dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1364
    vextracti128(dst, src, 1);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1365
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1366
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1367
  void vinsertf128_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1368
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1369
      Assembler::vinsertf32x4(dst, dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1370
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1371
      Assembler::vinsertf128(dst, dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1372
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1373
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1374
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1375
  void vinsertf128_high(XMMRegister dst, Address src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1376
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1377
      Assembler::vinsertf32x4(dst, dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1378
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1379
      Assembler::vinsertf128(dst, dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1380
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1381
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1382
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1383
  void vextractf128_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1384
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1385
      Assembler::vextractf32x4(dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1386
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1387
      Assembler::vextractf128(dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1388
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1389
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1390
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1391
  void vextractf128_high(Address dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1392
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1393
      Assembler::vextractf32x4(dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1394
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1395
      Assembler::vextractf128(dst, src, 1);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1396
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1397
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1398
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1399
  // 256bit copy to/from high 256 bits of 512bit (ZMM) vector registers
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1400
  void vinserti64x4_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1401
    Assembler::vinserti64x4(dst, dst, src, 1);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1402
  }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1403
  void vinsertf64x4_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1404
    Assembler::vinsertf64x4(dst, dst, src, 1);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1405
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1406
  void vextracti64x4_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1407
    Assembler::vextracti64x4(dst, src, 1);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1408
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1409
  void vextractf64x4_high(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1410
    Assembler::vextractf64x4(dst, src, 1);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1411
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1412
  void vextractf64x4_high(Address dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1413
    Assembler::vextractf64x4(dst, src, 1);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1414
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1415
  void vinsertf64x4_high(XMMRegister dst, Address src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1416
    Assembler::vinsertf64x4(dst, dst, src, 1);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1417
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1418
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1419
  // 128bit copy to/from low 128 bits of 256bit (YMM) vector registers
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1420
  void vinserti128_low(XMMRegister dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1421
    vinserti128(dst, dst, src, 0);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1422
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1423
  void vinserti128_low(XMMRegister dst, Address src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1424
    vinserti128(dst, dst, src, 0);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1425
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1426
  void vextracti128_low(XMMRegister dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1427
    vextracti128(dst, src, 0);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1428
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1429
  void vextracti128_low(Address dst, XMMRegister src) {
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1430
    vextracti128(dst, src, 0);
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1431
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1432
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1433
  void vinsertf128_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1434
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1435
      Assembler::vinsertf32x4(dst, dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1436
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1437
      Assembler::vinsertf128(dst, dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1438
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1439
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1440
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1441
  void vinsertf128_low(XMMRegister dst, Address src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1442
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1443
      Assembler::vinsertf32x4(dst, dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1444
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1445
      Assembler::vinsertf128(dst, dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1446
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1447
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1448
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1449
  void vextractf128_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1450
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1451
      Assembler::vextractf32x4(dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1452
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1453
      Assembler::vextractf128(dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1454
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1455
  }
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1456
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1457
  void vextractf128_low(Address dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1458
    if (UseAVX > 2) {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1459
      Assembler::vextractf32x4(dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1460
    } else {
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1461
      Assembler::vextractf128(dst, src, 0);
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1462
    }
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1463
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1464
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1465
  // 256bit copy to/from low 256 bits of 512bit (ZMM) vector registers
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1466
  void vinserti64x4_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1467
    Assembler::vinserti64x4(dst, dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1468
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1469
  void vinsertf64x4_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1470
    Assembler::vinsertf64x4(dst, dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1471
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1472
  void vextracti64x4_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1473
    Assembler::vextracti64x4(dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1474
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1475
  void vextractf64x4_low(XMMRegister dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1476
    Assembler::vextractf64x4(dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1477
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1478
  void vextractf64x4_low(Address dst, XMMRegister src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1479
    Assembler::vextractf64x4(dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1480
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1481
  void vinsertf64x4_low(XMMRegister dst, Address src) {
37293
c010188d360f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp
mcberg
parents: 36561
diff changeset
  1482
    Assembler::vinsertf64x4(dst, dst, src, 0);
36561
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1483
  }
b18243f4d955 8151002: Make Assembler methods vextract and vinsert match actual instructions
mikael
parents: 36555
diff changeset
  1484
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1485
  // Carry-Less Multiplication Quadword
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1486
  void vpclmulldq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1487
    // 0x00 - multiply lower 64 bits [0:63]
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1488
    Assembler::vpclmulqdq(dst, nds, src, 0x00);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1489
  }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1490
  void vpclmulhdq(XMMRegister dst, XMMRegister nds, XMMRegister src) {
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1491
    // 0x11 - multiply upper 64 bits [64:127]
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1492
    Assembler::vpclmulqdq(dst, nds, src, 0x11);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1493
  }
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1494
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1495
  // Data
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1496
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1497
  void cmov32( Condition cc, Register dst, Address  src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1498
  void cmov32( Condition cc, Register dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1499
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1500
  void cmov(   Condition cc, Register dst, Register src) { cmovptr(cc, dst, src); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1501
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1502
  void cmovptr(Condition cc, Register dst, Address  src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1503
  void cmovptr(Condition cc, Register dst, Register src) { LP64_ONLY(cmovq(cc, dst, src)) NOT_LP64(cmov32(cc, dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1504
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1505
  void movoop(Register dst, jobject obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1506
  void movoop(Address dst, jobject obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1507
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1508
  void mov_metadata(Register dst, Metadata* obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1509
  void mov_metadata(Address dst, Metadata* obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1510
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1511
  void movptr(ArrayAddress dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1512
  // can this do an lea?
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1513
  void movptr(Register dst, ArrayAddress src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1514
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1515
  void movptr(Register dst, Address src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1516
23491
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
  1517
#ifdef _LP64
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
  1518
  void movptr(Register dst, AddressLiteral src, Register scratch=rscratch1);
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
  1519
#else
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
  1520
  void movptr(Register dst, AddressLiteral src, Register scratch=noreg); // Scratch reg is ignored in 32-bit
f690330b10b9 8031320: Use Intel RTM instructions for locks
kvn
parents: 22910
diff changeset
  1521
#endif
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1522
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1523
  void movptr(Register dst, intptr_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1524
  void movptr(Register dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1525
  void movptr(Address dst, intptr_t src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1526
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1527
  void movptr(Address dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1528
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1529
  void movptr(Register dst, RegisterOrConstant src) {
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1530
    if (src.is_constant()) movptr(dst, src.as_constant());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1531
    else                   movptr(dst, src.as_register());
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1532
  }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1533
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1534
#ifdef _LP64
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1535
  // Generally the next two are only used for moving NULL
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1536
  // Although there are situations in initializing the mark word where
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1537
  // they could be used. They are dangerous.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1538
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1539
  // They only exist on LP64 so that int32_t and intptr_t are not the same
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1540
  // and we have ambiguous declarations.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1541
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1542
  void movptr(Address dst, int32_t imm32);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1543
  void movptr(Register dst, int32_t imm32);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1544
#endif // _LP64
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1545
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1546
  // to avoid hiding movl
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1547
  void mov32(AddressLiteral dst, Register src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1548
  void mov32(Register dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1549
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1550
  // to avoid hiding movb
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1551
  void movbyte(ArrayAddress dst, int src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1552
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1553
  // Import other mov() methods from the parent class or else
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1554
  // they will be hidden by the following overriding declaration.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1555
  using Assembler::movdl;
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1556
  using Assembler::movq;
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1557
  void movdl(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1558
  void movq(XMMRegister dst, AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1559
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1560
  // Can push value or effective address
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1561
  void pushptr(AddressLiteral src);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1562
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1563
  void pushptr(Address src) { LP64_ONLY(pushq(src)) NOT_LP64(pushl(src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1564
  void popptr(Address src) { LP64_ONLY(popq(src)) NOT_LP64(popl(src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1565
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1566
  void pushoop(jobject obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1567
  void pushklass(Metadata* obj);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1568
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1569
  // sign extend as need a l to ptr sized element
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1570
  void movl2ptr(Register dst, Address src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(movl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1571
  void movl2ptr(Register dst, Register src) { LP64_ONLY(movslq(dst, src)) NOT_LP64(if (dst != src) movl(dst, src)); }
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1572
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1573
  // C2 compiled method's prolog code.
24018
77b156916bab 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 23491
diff changeset
  1574
  void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1575
36554
a7eb9ee4680c 8146801: Allocating short arrays of non-constant size is slow
shade
parents: 35548
diff changeset
  1576
  // clear memory of size 'cnt' qwords, starting at 'base';
a7eb9ee4680c 8146801: Allocating short arrays of non-constant size is slow
shade
parents: 35548
diff changeset
  1577
  // if 'is_large' is set, do not try to produce short loop
a7eb9ee4680c 8146801: Allocating short arrays of non-constant size is slow
shade
parents: 35548
diff changeset
  1578
  void clear_mem(Register base, Register cnt, Register rtmp, bool is_large);
15114
4074553c678b 8005522: use fast-string instructions on x86 for zeroing
kvn
parents: 14827
diff changeset
  1579
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1580
#ifdef COMPILER2
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1581
  void string_indexof_char(Register str1, Register cnt1, Register ch, Register result,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1582
                           XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1583
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1584
  // IndexOf strings.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1585
  // Small strings are loaded through stack if they cross page boundary.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1586
  void string_indexof(Register str1, Register str2,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1587
                      Register cnt1, Register cnt2,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1588
                      int int_cnt2,  Register result,
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1589
                      XMMRegister vec, Register tmp,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1590
                      int ae);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1591
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1592
  // IndexOf for constant substrings with size >= 8 elements
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1593
  // which don't need to be loaded through stack.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1594
  void string_indexofC8(Register str1, Register str2,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1595
                      Register cnt1, Register cnt2,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1596
                      int int_cnt2,  Register result,
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1597
                      XMMRegister vec, Register tmp,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1598
                      int ae);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1599
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1600
    // Smallest code: we don't need to load through stack,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1601
    // check string tail.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1602
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1603
  // helper function for string_compare
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1604
  void load_next_elements(Register elem1, Register elem2, Register str1, Register str2,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1605
                          Address::ScaleFactor scale, Address::ScaleFactor scale1,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1606
                          Address::ScaleFactor scale2, Register index, int ae);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1607
  // Compare strings.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1608
  void string_compare(Register str1, Register str2,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1609
                      Register cnt1, Register cnt2, Register result,
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1610
                      XMMRegister vec1, int ae);
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1611
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1612
  // Search for Non-ASCII character (Negative byte value) in a byte array,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1613
  // return true if it has any and false otherwise.
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1614
  void has_negatives(Register ary1, Register len,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1615
                     Register result, Register tmp1,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1616
                     XMMRegister vec1, XMMRegister vec2);
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1617
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1618
  // Compare char[] or byte[] arrays.
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1619
  void arrays_equals(bool is_array_equ, Register ary1, Register ary2,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1620
                     Register limit, Register result, Register chr,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1621
                     XMMRegister vec1, XMMRegister vec2, bool is_char);
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1622
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1623
#endif
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1624
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1625
  // Fill primitive arrays
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1626
  void generate_fill(BasicType t, bool aligned,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1627
                     Register to, Register value, Register count,
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1628
                     Register rtmp, XMMRegister xtmp);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1629
15242
695bb216be99 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 15117
diff changeset
  1630
  void encode_iso_array(Register src, Register dst, Register len,
695bb216be99 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 15117
diff changeset
  1631
                        XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
695bb216be99 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 15117
diff changeset
  1632
                        XMMRegister tmp4, Register tmp5, Register result);
695bb216be99 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents: 15117
diff changeset
  1633
26434
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1634
#ifdef _LP64
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1635
  void add2_with_carry(Register dest_hi, Register dest_lo, Register src1, Register src2);
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1636
  void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1637
                             Register y, Register y_idx, Register z,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1638
                             Register carry, Register product,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1639
                             Register idx, Register kdx);
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1640
  void multiply_add_128_x_128(Register x_xstart, Register y, Register z,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1641
                              Register yz_idx, Register idx,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1642
                              Register carry, Register product, int offset);
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1643
  void multiply_128_x_128_bmi2_loop(Register y, Register z,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1644
                                    Register carry, Register carry2,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1645
                                    Register idx, Register jdx,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1646
                                    Register yz_idx1, Register yz_idx2,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1647
                                    Register tmp, Register tmp3, Register tmp4);
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1648
  void multiply_128_x_128_loop(Register x_xstart, Register y, Register z,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1649
                               Register yz_idx, Register idx, Register jdx,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1650
                               Register carry, Register product,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1651
                               Register carry2);
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1652
  void multiply_to_len(Register x, Register xlen, Register y, Register ylen, Register z, Register zlen,
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1653
                       Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5);
31129
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1654
  void square_rshift(Register x, Register len, Register z, Register tmp1, Register tmp3,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1655
                     Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1656
  void multiply_add_64_bmi2(Register sum, Register op1, Register op2, Register carry,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1657
                            Register tmp2);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1658
  void multiply_add_64(Register sum, Register op1, Register op2, Register carry,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1659
                       Register rdxReg, Register raxReg);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1660
  void add_one_64(Register z, Register zlen, Register carry, Register tmp1);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1661
  void lshift_by_1(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1662
                       Register tmp3, Register tmp4);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1663
  void square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1664
                     Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1665
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1666
  void mul_add_128_x_32_loop(Register out, Register in, Register offset, Register len, Register tmp1,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1667
               Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1668
               Register raxReg);
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1669
  void mul_add(Register out, Register in, Register offset, Register len, Register k, Register tmp1,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1670
               Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg,
02ee7609f0e1 8081778: Use Intel x64 CPU instructions for RSA acceleration
kvn
parents: 30624
diff changeset
  1671
               Register raxReg);
35110
f19bcdf40799 8143355: Update for addition of vectorizedMismatch intrinsic for x86
kvn
parents: 35086
diff changeset
  1672
  void vectorized_mismatch(Register obja, Register objb, Register length, Register log2_array_indxscale,
f19bcdf40799 8143355: Update for addition of vectorizedMismatch intrinsic for x86
kvn
parents: 35086
diff changeset
  1673
                           Register result, Register tmp1, Register tmp2,
f19bcdf40799 8143355: Update for addition of vectorizedMismatch intrinsic for x86
kvn
parents: 35086
diff changeset
  1674
                           XMMRegister vec1, XMMRegister vec2, XMMRegister vec3);
26434
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1675
#endif
09ad55e5f486 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
kvn
parents: 25932
diff changeset
  1676
33066
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1677
  // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1678
  void update_byte_crc32(Register crc, Register val, Register table);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1679
  void kernel_crc32(Register crc, Register buf, Register len, Register table, Register tmp);
33066
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1680
  // CRC32C code for java.util.zip.CRC32C::updateBytes() intrinsic
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1681
  // Note on a naming convention:
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1682
  // Prefix w = register only used on a Westmere+ architecture
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1683
  // Prefix n = register only used on a Nehalem architecture
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1684
#ifdef _LP64
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1685
  void crc32c_ipl_alg4(Register in_out, uint32_t n,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1686
                       Register tmp1, Register tmp2, Register tmp3);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1687
#else
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1688
  void crc32c_ipl_alg4(Register in_out, uint32_t n,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1689
                       Register tmp1, Register tmp2, Register tmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1690
                       XMMRegister xtmp1, XMMRegister xtmp2);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1691
#endif
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1692
  void crc32c_pclmulqdq(XMMRegister w_xtmp1,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1693
                        Register in_out,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1694
                        uint32_t const_or_pre_comp_const_index, bool is_pclmulqdq_supported,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1695
                        XMMRegister w_xtmp2,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1696
                        Register tmp1,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1697
                        Register n_tmp2, Register n_tmp3);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1698
  void crc32c_rec_alt2(uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported, Register in_out, Register in1, Register in2,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1699
                       XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1700
                       Register tmp1, Register tmp2,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1701
                       Register n_tmp3);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1702
  void crc32c_proc_chunk(uint32_t size, uint32_t const_or_pre_comp_const_index_u1, uint32_t const_or_pre_comp_const_index_u2, bool is_pclmulqdq_supported,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1703
                         Register in_out1, Register in_out2, Register in_out3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1704
                         Register tmp1, Register tmp2, Register tmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1705
                         XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1706
                         Register tmp4, Register tmp5,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1707
                         Register n_tmp6);
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1708
  void crc32c_ipl_alg2_alt2(Register in_out, Register in1, Register in2,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1709
                            Register tmp1, Register tmp2, Register tmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1710
                            Register tmp4, Register tmp5, Register tmp6,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1711
                            XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
d98eab8215c4 8134553: CRC32C implementations for x86/x64 targets
kvn
parents: 32727
diff changeset
  1712
                            bool is_pclmulqdq_supported);
18507
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1713
  // Fold 128-bit data chunk
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1714
  void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1715
  void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1716
  // Fold 8-bit data
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1717
  void fold_8bit_crc32(Register crc, Register table, Register tmp);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1718
  void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
61bfc8995bb3 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents: 16624
diff changeset
  1719
33628
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1720
  // Compress char[] array to byte[].
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1721
  void char_array_compress(Register src, Register dst, Register len,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1722
                           XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1723
                           XMMRegister tmp4, Register tmp5, Register result);
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1724
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1725
  // Inflate byte[] array to char[].
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1726
  void byte_array_inflate(Register src, Register dst, Register len,
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1727
                          XMMRegister tmp1, Register tmp2);
09241459a8b8 8141132: JEP 254: Compact Strings
thartmann
parents: 33465
diff changeset
  1728
14626
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1729
};
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1730
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1731
/**
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1732
 * class SkipIfEqual:
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1733
 *
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1734
 * Instantiating this class will result in assembly code being output that will
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1735
 * jump around any code emitted between the creation of the instance and it's
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1736
 * automatic destruction at the end of a scope block, depending on the value of
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1737
 * the flag passed to the constructor, which will be checked at run-time.
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1738
 */
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1739
class SkipIfEqual {
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1740
 private:
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1741
  MacroAssembler* _masm;
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1742
  Label _label;
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1743
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1744
 public:
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1745
   SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1746
   ~SkipIfEqual();
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1747
};
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1748
0cf4eccf130f 8003240: x86: move MacroAssembler into separate file
twisti
parents:
diff changeset
  1749
#endif // CPU_X86_VM_MACROASSEMBLER_X86_HPP