author | erikj |
Tue, 12 Sep 2017 19:03:39 +0200 | |
changeset 47216 | 71c04702a3d5 |
parent 42653 | hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.hpp@62a5d76872d4 |
child 51875 | e1368526699d |
permissions | -rw-r--r-- |
29184 | 1 |
/* |
2 |
* Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
|
3 |
* Copyright (c) 2014, Red Hat Inc. All rights reserved. |
|
4 |
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
|
5 |
* |
|
6 |
* This code is free software; you can redistribute it and/or modify it |
|
7 |
* under the terms of the GNU General Public License version 2 only, as |
|
8 |
* published by the Free Software Foundation. |
|
9 |
* |
|
10 |
* This code is distributed in the hope that it will be useful, but WITHOUT |
|
11 |
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
|
12 |
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
|
13 |
* version 2 for more details (a copy is included in the LICENSE file that |
|
14 |
* accompanied this code). |
|
15 |
* |
|
16 |
* You should have received a copy of the GNU General Public License version |
|
17 |
* 2 along with this work; if not, write to the Free Software Foundation, |
|
18 |
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
|
19 |
* |
|
20 |
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
|
21 |
* or visit www.oracle.com if you need additional information or have any |
|
22 |
* questions. |
|
23 |
* |
|
24 |
*/ |
|
25 |
||
38711
462b3dc4ab27
8156585: Cosmetic: AARCH64 defines in c1_LIRAssembler_aarch64.hpp
dpochepk
parents:
32086
diff
changeset
|
26 |
#ifndef CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP |
462b3dc4ab27
8156585: Cosmetic: AARCH64 defines in c1_LIRAssembler_aarch64.hpp
dpochepk
parents:
32086
diff
changeset
|
27 |
#define CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP |
29184 | 28 |
|
32086
7590882ae33a
8132875: AArch64: Fix error introduced into AArch64 CodeCache by commit for 8130309
adinn
parents:
29184
diff
changeset
|
29 |
// ArrayCopyStub needs access to bailout |
7590882ae33a
8132875: AArch64: Fix error introduced into AArch64 CodeCache by commit for 8130309
adinn
parents:
29184
diff
changeset
|
30 |
friend class ArrayCopyStub; |
7590882ae33a
8132875: AArch64: Fix error introduced into AArch64 CodeCache by commit for 8130309
adinn
parents:
29184
diff
changeset
|
31 |
|
29184 | 32 |
private: |
33 |
||
34 |
int array_element_size(BasicType type) const; |
|
35 |
||
36 |
void arith_fpu_implementation(LIR_Code code, int left_index, int right_index, int dest_index, bool pop_fpu_stack); |
|
37 |
||
38 |
// helper functions which checks for overflow and sets bailout if it |
|
39 |
// occurs. Always returns a valid embeddable pointer but in the |
|
40 |
// bailout case the pointer won't be to unique storage. |
|
41 |
address float_constant(float f); |
|
42 |
address double_constant(double d); |
|
43 |
||
44 |
address int_constant(jlong n); |
|
45 |
||
46 |
bool is_literal_address(LIR_Address* addr); |
|
47 |
||
48 |
// When we need to use something other than rscratch1 use this |
|
49 |
// method. |
|
50 |
Address as_Address(LIR_Address* addr, Register tmp); |
|
51 |
||
52 |
// Record the type of the receiver in ReceiverTypeData |
|
53 |
void type_profile_helper(Register mdo, |
|
54 |
ciMethodData *md, ciProfileData *data, |
|
55 |
Register recv, Label* update_done); |
|
56 |
void add_debug_info_for_branch(address adr, CodeEmitInfo* info); |
|
57 |
||
58 |
void casw(Register addr, Register newval, Register cmpval); |
|
59 |
void casl(Register addr, Register newval, Register cmpval); |
|
60 |
||
61 |
void poll_for_safepoint(relocInfo::relocType rtype, CodeEmitInfo* info = NULL); |
|
62 |
||
63 |
static const int max_tableswitches = 20; |
|
64 |
struct tableswitch switches[max_tableswitches]; |
|
65 |
int tableswitch_count; |
|
66 |
||
67 |
void init() { tableswitch_count = 0; } |
|
68 |
||
69 |
void deoptimize_trap(CodeEmitInfo *info); |
|
70 |
||
42650 | 71 |
enum { |
72 |
_call_stub_size = 12 * NativeInstruction::instruction_size, |
|
73 |
_call_aot_stub_size = 0, |
|
74 |
_exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(175), |
|
75 |
_deopt_handler_size = 7 * NativeInstruction::instruction_size |
|
76 |
}; |
|
77 |
||
42653 | 78 |
void arithmetic_idiv(LIR_Op3* op, bool is_irem); |
79 |
||
29184 | 80 |
public: |
81 |
||
82 |
void store_parameter(Register r, int offset_from_esp_in_words); |
|
83 |
void store_parameter(jint c, int offset_from_esp_in_words); |
|
84 |
void store_parameter(jobject c, int offset_from_esp_in_words); |
|
85 |
||
38711
462b3dc4ab27
8156585: Cosmetic: AARCH64 defines in c1_LIRAssembler_aarch64.hpp
dpochepk
parents:
32086
diff
changeset
|
86 |
#endif // CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP |