author | stefank |
Tue, 23 Nov 2010 13:22:55 -0800 | |
changeset 7397 | 5b173b4ca846 |
parent 5547 | f4b087cbb361 |
child 8107 | 78e5bd944384 |
permissions | -rw-r--r-- |
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/* |
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* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#ifndef SHARE_VM_OPTO_REGMASK_HPP |
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#define SHARE_VM_OPTO_REGMASK_HPP |
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#include "code/vmreg.hpp" |
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#include "libadt/port.hpp" |
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#include "opto/optoreg.hpp" |
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#ifdef TARGET_ARCH_MODEL_x86_32 |
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# include "adfiles/adGlobals_x86_32.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_x86_64 |
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# include "adfiles/adGlobals_x86_64.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_sparc |
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# include "adfiles/adGlobals_sparc.hpp" |
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#endif |
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#ifdef TARGET_ARCH_MODEL_zero |
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# include "adfiles/adGlobals_zero.hpp" |
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#endif |
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// Some fun naming (textual) substitutions: |
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// |
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// RegMask::get_low_elem() ==> RegMask::find_first_elem() |
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// RegMask::Special ==> RegMask::Empty |
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// RegMask::_flags ==> RegMask::is_AllStack() |
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// RegMask::operator<<=() ==> RegMask::Insert() |
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// RegMask::operator>>=() ==> RegMask::Remove() |
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// RegMask::Union() ==> RegMask::OR |
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// RegMask::Inter() ==> RegMask::AND |
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// |
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// OptoRegister::RegName ==> OptoReg::Name |
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// |
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// OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version |
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// |
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// numregs in chaitin ==> proper degree in chaitin |
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//-------------Non-zero bit search methods used by RegMask--------------------- |
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// Find lowest 1, or return 32 if empty |
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int find_lowest_bit( uint32 mask ); |
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// Find highest 1, or return 32 if empty |
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int find_hihghest_bit( uint32 mask ); |
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//------------------------------RegMask---------------------------------------- |
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// The ADL file describes how to print the machine-specific registers, as well |
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// as any notion of register classes. We provide a register mask, which is |
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// just a collection of Register numbers. |
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// The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. |
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// RM_SIZE is the size of a register mask in words. |
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// FORALL_BODY replicates a BODY macro once per word in the register mask. |
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// The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. |
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// However, it means the ADLC can redefine the unroll macro and all loops |
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// over register masks will be unrolled by the correct amount. |
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class RegMask VALUE_OBJ_CLASS_SPEC { |
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union { |
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double _dummy_force_double_alignment[RM_SIZE>>1]; |
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// Array of Register Mask bits. This array is large enough to cover |
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// all the machine registers and all parameters that need to be passed |
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// on the stack (stack registers) up to some interesting limit. Methods |
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// that need more parameters will NOT be compiled. On Intel, the limit |
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// is something like 90+ parameters. |
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int _A[RM_SIZE]; |
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}; |
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enum { |
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_WordBits = BitsPerInt, |
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_LogWordBits = LogBitsPerInt, |
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_RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef |
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}; |
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public: |
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enum { CHUNK_SIZE = RM_SIZE*_WordBits }; |
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// SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. |
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// Also, consider the maximum alignment size for a normally allocated |
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// value. Since we allocate register pairs but not register quads (at |
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// present), this alignment is SlotsPerLong (== 2). A normally |
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// aligned allocated register is either a single register, or a pair |
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// of adjacent registers, the lower-numbered being even. |
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// See also is_aligned_Pairs() below, and the padding added before |
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// Matcher::_new_SP to keep allocated pairs aligned properly. |
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// If we ever go to quad-word allocations, SlotsPerQuad will become |
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// the controlling alignment constraint. Note that this alignment |
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// requirement is internal to the allocator, and independent of any |
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// particular platform. |
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enum { SlotsPerLong = 2 }; |
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// A constructor only used by the ADLC output. All mask fields are filled |
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// in directly. Calls to this look something like RM(1,2,3,4); |
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RegMask( |
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# define BODY(I) int a##I, |
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FORALL_BODY |
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# undef BODY |
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int dummy = 0 ) { |
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# define BODY(I) _A[I] = a##I; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Handy copying constructor |
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RegMask( RegMask *rm ) { |
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# define BODY(I) _A[I] = rm->_A[I]; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Construct an empty mask |
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RegMask( ) { Clear(); } |
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// Construct a mask with a single bit |
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RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } |
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// Check for register being in mask |
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int Member( OptoReg::Name reg ) const { |
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assert( reg < CHUNK_SIZE, "" ); |
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return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); |
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} |
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// The last bit in the register mask indicates that the mask should repeat |
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// indefinitely with ONE bits. Returns TRUE if mask is infinite or |
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// unbounded in size. Returns FALSE if mask is finite size. |
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int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } |
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// Work around an -xO3 optimization problme in WS6U1. The old way: |
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// void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } |
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// will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() |
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// follows an Insert() loop, like the one found in init_spill_mask(). Using |
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// Insert() instead works because the index into _A in computed instead of |
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// constant. See bug 4665841. |
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void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } |
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// Test for being a not-empty mask. |
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int is_NotEmpty( ) const { |
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int tmp = 0; |
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# define BODY(I) tmp |= _A[I]; |
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FORALL_BODY |
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# undef BODY |
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return tmp; |
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} |
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// Find lowest-numbered register from mask, or BAD if mask is empty. |
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OptoReg::Name find_first_elem() const { |
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int base, bits; |
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# define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else |
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FORALL_BODY |
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# undef BODY |
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{ base = OptoReg::Bad; bits = 1<<0; } |
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return OptoReg::Name(base + find_lowest_bit(bits)); |
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} |
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// Get highest-numbered register from mask, or BAD if mask is empty. |
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OptoReg::Name find_last_elem() const { |
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int base, bits; |
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# define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else |
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FORALL_BODY |
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# undef BODY |
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{ base = OptoReg::Bad; bits = 1<<0; } |
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return OptoReg::Name(base + find_hihghest_bit(bits)); |
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} |
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// Find the lowest-numbered register pair in the mask. Return the |
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// HIGHEST register number in the pair, or BAD if no pairs. |
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// Assert that the mask contains only bit pairs. |
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OptoReg::Name find_first_pair() const; |
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// Clear out partial bits; leave only aligned adjacent bit pairs. |
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void ClearToPairs(); |
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// Smear out partial bits; leave only aligned adjacent bit pairs. |
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void SmearToPairs(); |
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// Verify that the mask contains only aligned adjacent bit pairs |
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void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); } |
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// Test that the mask contains only aligned adjacent bit pairs |
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bool is_aligned_Pairs() const; |
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// mask is a pair of misaligned registers |
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bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();} |
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// Test for single register |
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int is_bound1() const; |
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// Test for a single adjacent pair |
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int is_bound2() const; |
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// Fast overlap test. Non-zero if any registers in common. |
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int overlap( const RegMask &rm ) const { |
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return |
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# define BODY(I) (_A[I] & rm._A[I]) | |
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FORALL_BODY |
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# undef BODY |
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0 ; |
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} |
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// Special test for register pressure based splitting |
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// UP means register only, Register plus stack, or stack only is DOWN |
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bool is_UP() const; |
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// Clear a register mask |
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void Clear( ) { |
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# define BODY(I) _A[I] = 0; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Fill a register mask with 1's |
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void Set_All( ) { |
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# define BODY(I) _A[I] = -1; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Insert register into mask |
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void Insert( OptoReg::Name reg ) { |
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assert( reg < CHUNK_SIZE, "" ); |
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_A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); |
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} |
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// Remove register from mask |
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void Remove( OptoReg::Name reg ) { |
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assert( reg < CHUNK_SIZE, "" ); |
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_A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); |
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} |
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// OR 'rm' into 'this' |
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void OR( const RegMask &rm ) { |
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# define BODY(I) this->_A[I] |= rm._A[I]; |
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FORALL_BODY |
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# undef BODY |
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} |
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// AND 'rm' into 'this' |
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void AND( const RegMask &rm ) { |
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# define BODY(I) this->_A[I] &= rm._A[I]; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Subtract 'rm' from 'this' |
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void SUBTRACT( const RegMask &rm ) { |
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# define BODY(I) _A[I] &= ~rm._A[I]; |
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FORALL_BODY |
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# undef BODY |
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} |
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// Compute size of register mask: number of bits |
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uint Size() const; |
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#ifndef PRODUCT |
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void print() const { dump(); } |
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void dump() const; // Print a mask |
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#endif |
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static const RegMask Empty; // Common empty mask |
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static bool can_represent(OptoReg::Name reg) { |
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// NOTE: -1 in computation reflects the usage of the last |
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// bit of the regmask as an infinite stack flag. |
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return (int)reg < (int)(CHUNK_SIZE-1); |
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} |
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}; |
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// Do not use this constant directly in client code! |
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#undef RM_SIZE |
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#endif // SHARE_VM_OPTO_REGMASK_HPP |