hotspot/src/cpu/x86/vm/c1_MacroAssembler_x86.cpp
author stefank
Tue, 23 Nov 2010 13:22:55 -0800
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6989984: Use standard include model for Hospot Summary: Replaced MakeDeps and the includeDB files with more standardized solutions. Reviewed-by: coleenp, kvn, kamg
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/*
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 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "c1/c1_Runtime1.hpp"
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#include "classfile/systemDictionary.hpp"
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#include "gc_interface/collectedHeap.hpp"
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#include "interpreter/interpreter.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/markOop.hpp"
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#include "runtime/basicLock.hpp"
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#include "runtime/biasedLocking.hpp"
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#include "runtime/os.hpp"
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#include "runtime/stubRoutines.hpp"
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int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case) {
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  const int aligned_mask = BytesPerWord -1;
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  const int hdr_offset = oopDesc::mark_offset_in_bytes();
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  assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
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  assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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  Label done;
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  int null_check_offset = -1;
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  verify_oop(obj);
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  // save object being locked into the BasicObjectLock
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  movptr(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
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  if (UseBiasedLocking) {
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    assert(scratch != noreg, "should have scratch register at this point");
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    null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
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  } else {
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    null_check_offset = offset();
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  }
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  // Load object header
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  movptr(hdr, Address(obj, hdr_offset));
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  // and mark it as unlocked
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  orptr(hdr, markOopDesc::unlocked_value);
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  // save unlocked object header into the displaced header location on the stack
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  movptr(Address(disp_hdr, 0), hdr);
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  // test if object header is still the same (i.e. unlocked), and if so, store the
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  // displaced header address in the object header - if it is not the same, get the
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  // object header instead
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  if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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  cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
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  // if the object header was the same, we're done
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  if (PrintBiasedLockingStatistics) {
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    cond_inc32(Assembler::equal,
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               ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
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  }
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  jcc(Assembler::equal, done);
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  // if the object header was not the same, it is now in the hdr register
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  // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
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  //
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  // 1) (hdr & aligned_mask) == 0
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  // 2) rsp <= hdr
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  // 3) hdr <= rsp + page_size
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  //
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  // these 3 tests can be done by evaluating the following expression:
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  //
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  // (hdr - rsp) & (aligned_mask - page_size)
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  //
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  // assuming both the stack pointer and page_size have their least
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  // significant 2 bits cleared and page_size is a power of 2
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  subptr(hdr, rsp);
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  andptr(hdr, aligned_mask - os::vm_page_size());
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  // for recursive locking, the result is zero => save it in the displaced header
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  // location (NULL in the displaced hdr location indicates recursive locking)
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  movptr(Address(disp_hdr, 0), hdr);
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  // otherwise we don't care about the result and handle locking via runtime call
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  jcc(Assembler::notZero, slow_case);
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  // done
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  bind(done);
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  return null_check_offset;
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}
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void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
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  const int aligned_mask = BytesPerWord -1;
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  const int hdr_offset = oopDesc::mark_offset_in_bytes();
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  assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
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  assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
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  Label done;
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  if (UseBiasedLocking) {
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    // load object
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    movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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    biased_locking_exit(obj, hdr, done);
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  }
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  // load displaced header
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  movptr(hdr, Address(disp_hdr, 0));
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  // if the loaded hdr is NULL we had recursive locking
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  testptr(hdr, hdr);
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  // if we had recursive locking, we are done
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  jcc(Assembler::zero, done);
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  if (!UseBiasedLocking) {
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    // load object
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    movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
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  }
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  verify_oop(obj);
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  // test if object header is pointing to the displaced header, and if so, restore
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  // the displaced header in the object - if the object header is not pointing to
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  // the displaced header, get the object header instead
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  if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
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  cmpxchgptr(hdr, Address(obj, hdr_offset));
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  // if the object header was not pointing to the displaced header,
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  // we do unlocking via runtime call
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  jcc(Assembler::notEqual, slow_case);
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  // done
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  bind(done);
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}
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// Defines obj, preserves var_size_in_bytes
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void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
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  if (UseTLAB) {
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    tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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  } else {
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    eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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  }
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}
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void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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  assert_different_registers(obj, klass, len);
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  if (UseBiasedLocking && !len->is_valid()) {
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    assert_different_registers(obj, klass, len, t1, t2);
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    movptr(t1, Address(klass, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes()));
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    movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
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  } else {
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    // This assumes that all prototype bits fit in an int32_t
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    movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markOopDesc::prototype());
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  }
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  movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
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  if (len->is_valid()) {
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    movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
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  }
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}
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// preserves obj, destroys len_in_bytes
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void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
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  Label done;
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  assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
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  assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
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  Register index = len_in_bytes;
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  // index is positive and ptr sized
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  subptr(index, hdr_size_in_bytes);
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  jcc(Assembler::zero, done);
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  // initialize topmost word, divide index by 2, check if odd and test if zero
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  // note: for the remaining code to work, index must be a multiple of BytesPerWord
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#ifdef ASSERT
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  { Label L;
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    testptr(index, BytesPerWord - 1);
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    jcc(Assembler::zero, L);
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    stop("index is not a multiple of BytesPerWord");
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    bind(L);
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  }
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#endif
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  xorptr(t1, t1);    // use _zero reg to clear memory (shorter code)
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  if (UseIncDec) {
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    shrptr(index, 3);  // divide by 8/16 and set carry flag if bit 2 was set
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  } else {
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    shrptr(index, 2);  // use 2 instructions to avoid partial flag stall
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    shrptr(index, 1);
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  }
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#ifndef _LP64
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  // index could have been not a multiple of 8 (i.e., bit 2 was set)
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  { Label even;
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    // note: if index was a multiple of 8, than it cannot
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    //       be 0 now otherwise it must have been 0 before
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    //       => if it is even, we don't need to check for 0 again
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    jcc(Assembler::carryClear, even);
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    // clear topmost word (no jump needed if conditional assignment would work here)
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    movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
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    // index could be 0 now, need to check again
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    jcc(Assembler::zero, done);
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    bind(even);
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  }
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#endif // !_LP64
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  // initialize remaining object fields: rdx is a multiple of 2 now
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  { Label loop;
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    bind(loop);
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    movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
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    NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);)
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    decrement(index);
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    jcc(Assembler::notZero, loop);
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  }
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  // done
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  bind(done);
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}
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void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
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  assert(obj == rax, "obj must be in rax, for cmpxchg");
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  assert(obj != t1 && obj != t2 && t1 != t2, "registers must be different"); // XXX really?
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  assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
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  try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
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  initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
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}
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void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
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  assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
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         "con_size_in_bytes is not multiple of alignment");
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  const int hdr_size_in_bytes = instanceOopDesc::base_offset_in_bytes();
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  initialize_header(obj, klass, noreg, t1, t2);
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  // clear rest of allocated space
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  const Register t1_zero = t1;
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  const Register index = t2;
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  const int threshold = 6 * BytesPerWord;   // approximate break even point for code size (see comments below)
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  if (var_size_in_bytes != noreg) {
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    mov(index, var_size_in_bytes);
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    initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
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  } else if (con_size_in_bytes <= threshold) {
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    // use explicit null stores
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    // code size = 2 + 3*n bytes (n = number of fields to clear)
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    xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
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      movptr(Address(obj, i), t1_zero);
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  } else if (con_size_in_bytes > hdr_size_in_bytes) {
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    // use loop to null out the fields
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    // code size = 16 bytes for even n (n = number of fields to clear)
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    // initialize last object field first if odd number of fields
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    xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
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    movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
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    // initialize last object field if constant size is odd
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    if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
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      movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
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    // initialize remaining object fields: rdx is a multiple of 2
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    { Label loop;
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      bind(loop);
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      movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
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             t1_zero);
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      NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
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             t1_zero);)
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      decrement(index);
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      jcc(Assembler::notZero, loop);
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    }
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  }
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  if (CURRENT_ENV->dtrace_alloc_probes()) {
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    assert(obj == rax, "must be");
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    call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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  }
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  verify_oop(obj);
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}
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void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
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  assert(obj == rax, "obj must be in rax, for cmpxchg");
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  assert_different_registers(obj, len, t1, t2, klass);
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  // determine alignment mask
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  assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
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  // check for negative or excessive length
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  cmpptr(len, (int32_t)max_array_allocation_length);
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  jcc(Assembler::above, slow_case);
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  const Register arr_size = t2; // okay to be the same
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  // align object end
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  movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
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  lea(arr_size, Address(arr_size, len, f));
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  andptr(arr_size, ~MinObjAlignmentInBytesMask);
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  try_allocate(obj, arr_size, 0, t1, t2, slow_case);
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  initialize_header(obj, klass, len, t1, t2);
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  // clear rest of allocated space
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  const Register len_zero = len;
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  initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
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  if (CURRENT_ENV->dtrace_alloc_probes()) {
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    assert(obj == rax, "must be");
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    call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
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  }
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  verify_oop(obj);
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}
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void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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  verify_oop(receiver);
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  // explicit NULL check not needed since load from [klass_offset] causes a trap
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  // check against inline cache
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  assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
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  int start_offset = offset();
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  cmpptr(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
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  // if icache check fails, then jump to runtime routine
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  // Note: RECEIVER must still contain the receiver!
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  jump_cc(Assembler::notEqual,
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          RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
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  const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
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  assert(offset() - start_offset == ic_cmp_size, "check alignment in emit_method_entry");
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}
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   329
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void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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  // Make sure there is enough stack space for this method's activation.
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  // Note that we do this before doing an enter(). This matches the
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  // ordering of C2's stack overflow check / rsp decrement and allows
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  // the SharedRuntime stack overflow handling to be consistent
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  // between the two compilers.
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  generate_stack_overflow_check(frame_size_in_bytes);
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  push(rbp);
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#ifdef TIERED
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  // c2 leaves fpu stack dirty. Clean it on entry
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  if (UseSSE < 2 ) {
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    empty_FPU_stack();
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  }
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#endif // TIERED
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  decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
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}
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void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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  increment(rsp, frame_size_in_bytes);  // Does not emit code for frame_size == 0
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  pop(rbp);
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}
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1
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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  if (C1Breakpoint) int3();
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  inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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  if (C1Breakpoint)int3();
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  // build frame
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  verify_FPU(0, "method_entry");
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}
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#ifndef PRODUCT
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void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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  if (!VerifyOops) return;
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  verify_oop_addr(Address(rsp, stack_offset));
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}
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void C1_MacroAssembler::verify_not_null_oop(Register r) {
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  if (!VerifyOops) return;
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  Label not_null;
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  testptr(r, r);
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  jcc(Assembler::notZero, not_null);
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  stop("non-null oop required");
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  bind(not_null);
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  verify_oop(r);
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}
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void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
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#ifdef ASSERT
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  if (inv_rax) movptr(rax, 0xDEAD);
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  if (inv_rbx) movptr(rbx, 0xDEAD);
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  if (inv_rcx) movptr(rcx, 0xDEAD);
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  if (inv_rdx) movptr(rdx, 0xDEAD);
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  if (inv_rsi) movptr(rsi, 0xDEAD);
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  if (inv_rdi) movptr(rdi, 0xDEAD);
1
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#endif
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}
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#endif // ifndef PRODUCT