author | stefank |
Wed, 07 Mar 2018 21:57:36 +0100 | |
changeset 49359 | 59f6547e151f |
parent 49347 | edb65305d3ac |
child 49449 | ef5d5d343e2a |
permissions | -rw-r--r-- |
42065 | 1 |
/* |
49347
edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents:
47216
diff
changeset
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* Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. |
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* Copyright (c) 2016 SAP SE. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#include "precompiled.hpp" |
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#include "asm/assembler.inline.hpp" |
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#include "compiler/disassembler.hpp" |
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#include "gc/shared/collectedHeap.inline.hpp" |
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#include "interpreter/interpreter.hpp" |
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#include "gc/shared/cardTableModRefBS.hpp" |
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#include "memory/resourceArea.hpp" |
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#include "prims/methodHandles.hpp" |
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#include "runtime/biasedLocking.hpp" |
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#include "runtime/interfaceSupport.hpp" |
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#include "runtime/objectMonitor.hpp" |
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#include "runtime/os.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "runtime/stubRoutines.hpp" |
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#include "utilities/macros.hpp" |
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#if INCLUDE_ALL_GCS |
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49347
edb65305d3ac
8195148: Collapse G1SATBCardTableModRefBS and G1SATBCardTableLoggingModRefBS into a single G1BarrierSet
eosterlund
parents:
47216
diff
changeset
|
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#include "gc/g1/g1BarrierSet.hpp" |
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#include "gc/g1/g1CollectedHeap.inline.hpp" |
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#include "gc/g1/heapRegion.hpp" |
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#endif |
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// Convention: Use Z_R0 and Z_R1 instead of Z_scratch_* in all |
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// assembler_s390.* files. |
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// Convert the raw encoding form into the form expected by the |
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// constructor for Address. This is called by adlc generated code. |
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Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
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assert(scale == 0, "Scale should not be used on z/Architecture. The call to make_raw is " |
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"generated by adlc and this must mirror all features of Operands from machnode.hpp."); |
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assert(disp_reloc == relocInfo::none, "not implemented on z/Architecture."); |
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Address madr(as_Register(base), as_Register(index), in_ByteSize(disp)); |
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return madr; |
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} |
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int AbstractAssembler::code_fill_byte() { |
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return 0x00; // Illegal instruction 0x00000000. |
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} |
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// Condition code masks. Details see enum branch_condition. |
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// Although this method is meant for INT CCs, the Overflow/Ordered |
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// bit in the masks has to be considered. The CC might have been set |
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// by a float operation, but is evaluated while calculating an integer |
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// result. See elementary test TestFloat.isNotEqual(FF)Z for example. |
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Assembler::branch_condition Assembler::inverse_condition(Assembler::branch_condition cc) { |
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Assembler::branch_condition unordered_bit = (Assembler::branch_condition)(cc & bcondNotOrdered); |
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Assembler::branch_condition inverse_cc; |
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// Some are commented out to avoid duplicate labels. |
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switch (cc) { |
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case bcondNever : inverse_cc = bcondAlways; break; // 0 -> 15 |
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case bcondAlways : inverse_cc = bcondNever; break; // 15 -> 0 |
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case bcondOverflow : inverse_cc = bcondNotOverflow; break; // 1 -> 14 |
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case bcondNotOverflow : inverse_cc = bcondOverflow; break; // 14 -> 1 |
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default : |
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switch ((Assembler::branch_condition)(cc & bcondOrdered)) { |
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case bcondEqual : inverse_cc = bcondNotEqual; break; // 8 -> 6 |
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// case bcondZero : |
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// case bcondAllZero : |
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case bcondNotEqual : inverse_cc = bcondEqual; break; // 6 -> 8 |
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// case bcondNotZero : |
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// case bcondMixed : |
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case bcondLow : inverse_cc = bcondNotLow; break; // 4 -> 10 |
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// case bcondNegative : |
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case bcondNotLow : inverse_cc = bcondLow; break; // 10 -> 4 |
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// case bcondNotNegative : |
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case bcondHigh : inverse_cc = bcondNotHigh; break; // 2 -> 12 |
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// case bcondPositive : |
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case bcondNotHigh : inverse_cc = bcondHigh; break; // 12 -> 2 |
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// case bcondNotPositive : |
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default : |
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fprintf(stderr, "inverse_condition(%d)\n", (int)cc); |
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fflush(stderr); |
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ShouldNotReachHere(); |
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return bcondNever; |
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} |
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// If cc is even, inverse_cc must be odd. |
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if (!unordered_bit) { |
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inverse_cc = (Assembler::branch_condition)(inverse_cc | bcondNotOrdered); |
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} |
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break; |
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} |
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return inverse_cc; |
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} |
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Assembler::branch_condition Assembler::inverse_float_condition(Assembler::branch_condition cc) { |
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Assembler::branch_condition inverse_cc; |
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switch (cc) { |
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case bcondNever : inverse_cc = bcondAlways; break; // 0 |
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case bcondAlways : inverse_cc = bcondNever; break; // 15 |
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case bcondNotOrdered : inverse_cc = bcondOrdered; break; // 14 |
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case bcondOrdered : inverse_cc = bcondNotOrdered; break; // 1 |
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case bcondEqual : inverse_cc = (branch_condition)(bcondNotEqual + bcondNotOrdered); break; // 8 |
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case bcondNotEqual + bcondNotOrdered : inverse_cc = bcondEqual; break; // 7 |
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case bcondLow + bcondNotOrdered : inverse_cc = (branch_condition)(bcondHigh + bcondEqual); break; // 5 |
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case bcondNotLow : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered); break; // 10 |
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case bcondHigh : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered + bcondEqual); break; // 2 |
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case bcondNotHigh + bcondNotOrdered : inverse_cc = bcondHigh; break; // 13 |
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default : |
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fprintf(stderr, "inverse_float_condition(%d)\n", (int)cc); |
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fflush(stderr); |
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ShouldNotReachHere(); |
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return bcondNever; |
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} |
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return inverse_cc; |
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} |
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#ifdef ASSERT |
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void Assembler::print_dbg_msg(outputStream* out, unsigned long inst, const char* msg, int ilen) { |
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out->flush(); |
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switch (ilen) { |
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case 2: out->print_cr("inst = %4.4x, %s", (unsigned short)inst, msg); break; |
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case 4: out->print_cr("inst = %8.8x, %s\n", (unsigned int)inst, msg); break; |
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case 6: out->print_cr("inst = %12.12lx, %s\n", inst, msg); break; |
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default: out->print_cr("inst = %16.16lx, %s\n", inst, msg); break; |
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} |
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out->flush(); |
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} |
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void Assembler::dump_code_range(outputStream* out, address pc, const unsigned int range, const char* msg) { |
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out->cr(); |
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out->print_cr("-------------------------------"); |
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out->print_cr("-- %s", msg); |
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out->print_cr("-------------------------------"); |
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out->print_cr("Hex dump of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); |
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os::print_hex_dump(out, pc-range, pc+range, 2); |
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out->cr(); |
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out->print_cr("Disassembly of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); |
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Disassembler::decode(pc, pc + range, out); |
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} |
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#endif |