hotspot/src/cpu/x86/vm/stubGenerator_x86_64.cpp
author roland
Fri, 07 Dec 2012 01:09:03 -0800
changeset 14633 58caa6fc3b7c
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parent 14626 0cf4eccf130f
child 14834 f29c91f2f22b
permissions -rw-r--r--
Merge
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/*
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 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/macroAssembler.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "interpreter/interpreter.hpp"
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#include "nativeInst_x86.hpp"
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#include "oops/instanceOop.hpp"
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#include "oops/method.hpp"
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#include "oops/objArrayKlass.hpp"
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#include "oops/oop.inline.hpp"
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#include "prims/methodHandles.hpp"
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#include "runtime/frame.inline.hpp"
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#include "runtime/handles.inline.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "runtime/thread.inline.hpp"
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#include "utilities/top.hpp"
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#ifdef COMPILER2
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#include "opto/runtime.hpp"
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#endif
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// Declaration and definition of StubGenerator (no .hpp file).
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// For a more detailed description of the stub routine structure
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// see the comment in stubRoutines.hpp
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#define __ _masm->
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#define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
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#define a__ ((Assembler*)_masm)->
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#ifdef PRODUCT
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#define BLOCK_COMMENT(str) /* nothing */
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#else
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#define BLOCK_COMMENT(str) __ block_comment(str)
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#endif
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#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
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const int MXCSR_MASK = 0xFFC0;  // Mask out any pending exceptions
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// Stub Code definitions
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static address handle_unsafe_access() {
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  JavaThread* thread = JavaThread::current();
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  address pc = thread->saved_exception_pc();
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  // pc is the instruction which we must emulate
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  // doing a no-op is fine:  return garbage from the load
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  // therefore, compute npc
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  address npc = Assembler::locate_next_instruction(pc);
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  // request an async exception
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  thread->set_pending_unsafe_access_error();
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  // return address of next instruction to execute
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  return npc;
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}
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class StubGenerator: public StubCodeGenerator {
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 private:
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#ifdef PRODUCT
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#define inc_counter_np(counter) (0)
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#else
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  void inc_counter_np_(int& counter) {
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    // This can destroy rscratch1 if counter is far from the code cache
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    __ incrementl(ExternalAddress((address)&counter));
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  }
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#define inc_counter_np(counter) \
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  BLOCK_COMMENT("inc_counter " #counter); \
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  inc_counter_np_(counter);
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#endif
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  // Call stubs are used to call Java from C
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  //
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  // Linux Arguments:
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  //    c_rarg0:   call wrapper address                   address
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  //    c_rarg1:   result                                 address
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  //    c_rarg2:   result type                            BasicType
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  //    c_rarg3:   method                                 Method*
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  //    c_rarg4:   (interpreter) entry point              address
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  //    c_rarg5:   parameters                             intptr_t*
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  //    16(rbp): parameter size (in words)              int
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  //    24(rbp): thread                                 Thread*
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  //
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  //     [ return_from_Java     ] <--- rsp
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  //     [ argument word n      ]
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  //      ...
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  // -12 [ argument word 1      ]
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  // -11 [ saved r15            ] <--- rsp_after_call
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  // -10 [ saved r14            ]
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  //  -9 [ saved r13            ]
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  //  -8 [ saved r12            ]
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  //  -7 [ saved rbx            ]
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  //  -6 [ call wrapper         ]
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  //  -5 [ result               ]
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  //  -4 [ result type          ]
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  //  -3 [ method               ]
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  //  -2 [ entry point          ]
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  //  -1 [ parameters           ]
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  //   0 [ saved rbp            ] <--- rbp
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  //   1 [ return address       ]
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  //   2 [ parameter size       ]
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  //   3 [ thread               ]
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  //
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  // Windows Arguments:
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  //    c_rarg0:   call wrapper address                   address
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  //    c_rarg1:   result                                 address
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  //    c_rarg2:   result type                            BasicType
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  //    c_rarg3:   method                                 Method*
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  //    48(rbp): (interpreter) entry point              address
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  //    56(rbp): parameters                             intptr_t*
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  //    64(rbp): parameter size (in words)              int
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  //    72(rbp): thread                                 Thread*
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  //
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  //     [ return_from_Java     ] <--- rsp
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  //     [ argument word n      ]
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  //      ...
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  // -28 [ argument word 1      ]
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  // -27 [ saved xmm15          ] <--- rsp_after_call
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  //     [ saved xmm7-xmm14     ]
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  //  -9 [ saved xmm6           ] (each xmm register takes 2 slots)
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  //  -7 [ saved r15            ]
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  //  -6 [ saved r14            ]
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  //  -5 [ saved r13            ]
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  //  -4 [ saved r12            ]
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  //  -3 [ saved rdi            ]
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  //  -2 [ saved rsi            ]
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  //  -1 [ saved rbx            ]
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  //   0 [ saved rbp            ] <--- rbp
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  //   1 [ return address       ]
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  //   2 [ call wrapper         ]
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  //   3 [ result               ]
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  //   4 [ result type          ]
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  //   5 [ method               ]
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  //   6 [ entry point          ]
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  //   7 [ parameters           ]
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  //   8 [ parameter size       ]
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  //   9 [ thread               ]
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  //
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  //    Windows reserves the callers stack space for arguments 1-4.
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  //    We spill c_rarg0-c_rarg3 to this space.
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  // Call stub stack layout word offsets from rbp
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  enum call_stub_layout {
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#ifdef _WIN64
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    xmm_save_first     = 6,  // save from xmm6
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    xmm_save_last      = 15, // to xmm15
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    xmm_save_base      = -9,
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    rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
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    r15_off            = -7,
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    r14_off            = -6,
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    r13_off            = -5,
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    r12_off            = -4,
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    rdi_off            = -3,
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    rsi_off            = -2,
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    rbx_off            = -1,
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    rbp_off            =  0,
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    retaddr_off        =  1,
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    call_wrapper_off   =  2,
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    result_off         =  3,
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    result_type_off    =  4,
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    method_off         =  5,
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    entry_point_off    =  6,
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    parameters_off     =  7,
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    parameter_size_off =  8,
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    thread_off         =  9
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#else
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    rsp_after_call_off = -12,
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    mxcsr_off          = rsp_after_call_off,
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    r15_off            = -11,
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    r14_off            = -10,
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    r13_off            = -9,
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    r12_off            = -8,
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    rbx_off            = -7,
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    call_wrapper_off   = -6,
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    result_off         = -5,
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    result_type_off    = -4,
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    method_off         = -3,
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    entry_point_off    = -2,
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    parameters_off     = -1,
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    rbp_off            =  0,
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    retaddr_off        =  1,
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    parameter_size_off =  2,
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    thread_off         =  3
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#endif
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  };
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#ifdef _WIN64
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  Address xmm_save(int reg) {
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    assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
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    return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
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  }
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#endif
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1
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  address generate_call_stub(address& return_address) {
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    assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
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           (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
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           "adjust this code");
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    StubCodeMark mark(this, "StubRoutines", "call_stub");
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    address start = __ pc();
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    // same as in generate_catch_exception()!
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    const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
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    const Address call_wrapper  (rbp, call_wrapper_off   * wordSize);
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    const Address result        (rbp, result_off         * wordSize);
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    const Address result_type   (rbp, result_type_off    * wordSize);
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    const Address method        (rbp, method_off         * wordSize);
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    const Address entry_point   (rbp, entry_point_off    * wordSize);
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    const Address parameters    (rbp, parameters_off     * wordSize);
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    const Address parameter_size(rbp, parameter_size_off * wordSize);
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    // same as in generate_catch_exception()!
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    const Address thread        (rbp, thread_off         * wordSize);
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    const Address r15_save(rbp, r15_off * wordSize);
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    const Address r14_save(rbp, r14_off * wordSize);
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    const Address r13_save(rbp, r13_off * wordSize);
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    const Address r12_save(rbp, r12_off * wordSize);
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    const Address rbx_save(rbp, rbx_off * wordSize);
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    // stub code
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    __ enter();
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    __ subptr(rsp, -rsp_after_call_off * wordSize);
1
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    // save register parameters
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#ifndef _WIN64
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    __ movptr(parameters,   c_rarg5); // parameters
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    __ movptr(entry_point,  c_rarg4); // entry_point
1
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#endif
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    __ movptr(method,       c_rarg3); // method
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    __ movl(result_type,  c_rarg2);   // result type
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    __ movptr(result,       c_rarg1); // result
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    __ movptr(call_wrapper, c_rarg0); // call wrapper
1
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   258
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    // save regs belonging to calling function
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    __ movptr(rbx_save, rbx);
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    __ movptr(r12_save, r12);
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    __ movptr(r13_save, r13);
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    __ movptr(r14_save, r14);
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    __ movptr(r15_save, r15);
1
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#ifdef _WIN64
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    for (int i = 6; i <= 15; i++) {
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      __ movdqu(xmm_save(i), as_XMMRegister(i));
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    }
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1
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    const Address rdi_save(rbp, rdi_off * wordSize);
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    const Address rsi_save(rbp, rsi_off * wordSize);
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    __ movptr(rsi_save, rsi);
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    __ movptr(rdi_save, rdi);
1
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#else
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    const Address mxcsr_save(rbp, mxcsr_off * wordSize);
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    {
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      Label skip_ldmx;
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      __ stmxcsr(mxcsr_save);
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      __ movl(rax, mxcsr_save);
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      __ andl(rax, MXCSR_MASK);    // Only check control and mask bits
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      ExternalAddress mxcsr_std(StubRoutines::x86::mxcsr_std());
1
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      __ cmp32(rax, mxcsr_std);
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      __ jcc(Assembler::equal, skip_ldmx);
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      __ ldmxcsr(mxcsr_std);
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      __ bind(skip_ldmx);
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    }
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#endif
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    // Load up thread register
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    __ movptr(r15_thread, thread);
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    __ reinit_heapbase();
1
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   293
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#ifdef ASSERT
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    // make sure we have no pending exceptions
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    {
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      Label L;
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      __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
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      __ jcc(Assembler::equal, L);
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      __ stop("StubRoutines::call_stub: entered with pending exception");
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      __ bind(L);
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    }
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#endif
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    // pass parameters if any
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    BLOCK_COMMENT("pass parameters if any");
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    Label parameters_done;
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    __ movl(c_rarg3, parameter_size);
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    __ testl(c_rarg3, c_rarg3);
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    __ jcc(Assembler::zero, parameters_done);
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   311
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    Label loop;
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    __ movptr(c_rarg2, parameters);       // parameter pointer
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    __ movl(c_rarg1, c_rarg3);            // parameter counter is in c_rarg1
1
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    __ BIND(loop);
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    __ movptr(rax, Address(c_rarg2, 0));// get parameter
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    __ addptr(c_rarg2, wordSize);       // advance to next parameter
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    __ decrementl(c_rarg1);             // decrement counter
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    __ push(rax);                       // pass parameter
1
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    __ jcc(Assembler::notZero, loop);
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   321
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    // call Java function
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    __ BIND(parameters_done);
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    __ movptr(rbx, method);             // get Method*
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    __ movptr(c_rarg1, entry_point);    // get entry_point
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   326
    __ mov(r13, rsp);                   // set sender sp
1
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    BLOCK_COMMENT("call Java function");
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    __ call(c_rarg1);
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   329
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   330
    BLOCK_COMMENT("call_stub_return_address:");
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    return_address = __ pc();
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   332
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    // store result depending on type (everything that is not
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    // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
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    __ movptr(c_rarg0, result);
1
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    Label is_long, is_float, is_double, exit;
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   337
    __ movl(c_rarg1, result_type);
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   338
    __ cmpl(c_rarg1, T_OBJECT);
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   339
    __ jcc(Assembler::equal, is_long);
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   340
    __ cmpl(c_rarg1, T_LONG);
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   341
    __ jcc(Assembler::equal, is_long);
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   342
    __ cmpl(c_rarg1, T_FLOAT);
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   343
    __ jcc(Assembler::equal, is_float);
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   344
    __ cmpl(c_rarg1, T_DOUBLE);
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   345
    __ jcc(Assembler::equal, is_double);
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   346
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    // handle T_INT case
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    __ movl(Address(c_rarg0, 0), rax);
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   349
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    __ BIND(exit);
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   351
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    // pop parameters
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    __ lea(rsp, rsp_after_call);
1
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   354
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#ifdef ASSERT
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   356
    // verify that threads correspond
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    {
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      Label L, S;
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      __ cmpptr(r15_thread, thread);
1
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      __ jcc(Assembler::notEqual, S);
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   361
      __ get_thread(rbx);
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diff changeset
   362
      __ cmpptr(r15_thread, rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   363
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   364
      __ bind(S);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   365
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   366
      __ stop("StubRoutines::call_stub: threads must correspond");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   367
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   368
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   369
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   370
489c9b5090e2 Initial load
duke
parents:
diff changeset
   371
    // restore regs belonging to calling function
8874
b2030880129c 6741940: Nonvolatile XMM registers not preserved across JNI calls
iveresov
parents: 8498
diff changeset
   372
#ifdef _WIN64
b2030880129c 6741940: Nonvolatile XMM registers not preserved across JNI calls
iveresov
parents: 8498
diff changeset
   373
    for (int i = 15; i >= 6; i--) {
b2030880129c 6741940: Nonvolatile XMM registers not preserved across JNI calls
iveresov
parents: 8498
diff changeset
   374
      __ movdqu(as_XMMRegister(i), xmm_save(i));
b2030880129c 6741940: Nonvolatile XMM registers not preserved across JNI calls
iveresov
parents: 8498
diff changeset
   375
    }
b2030880129c 6741940: Nonvolatile XMM registers not preserved across JNI calls
iveresov
parents: 8498
diff changeset
   376
#endif
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   377
    __ movptr(r15, r15_save);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   378
    __ movptr(r14, r14_save);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   379
    __ movptr(r13, r13_save);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   380
    __ movptr(r12, r12_save);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   381
    __ movptr(rbx, rbx_save);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   382
489c9b5090e2 Initial load
duke
parents:
diff changeset
   383
#ifdef _WIN64
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   384
    __ movptr(rdi, rdi_save);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   385
    __ movptr(rsi, rsi_save);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
    __ ldmxcsr(mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
    // restore rsp
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   391
    __ addptr(rsp, -rsp_after_call_off * wordSize);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
    // return
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   394
    __ pop(rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
    // handle return types different from T_INT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
    __ BIND(is_long);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   399
    __ movq(Address(c_rarg0, 0), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   400
    __ jmp(exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   401
489c9b5090e2 Initial load
duke
parents:
diff changeset
   402
    __ BIND(is_float);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   403
    __ movflt(Address(c_rarg0, 0), xmm0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   404
    __ jmp(exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   405
489c9b5090e2 Initial load
duke
parents:
diff changeset
   406
    __ BIND(is_double);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   407
    __ movdbl(Address(c_rarg0, 0), xmm0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   408
    __ jmp(exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   409
489c9b5090e2 Initial load
duke
parents:
diff changeset
   410
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   411
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   412
489c9b5090e2 Initial load
duke
parents:
diff changeset
   413
  // Return point for a Java call if there's an exception thrown in
489c9b5090e2 Initial load
duke
parents:
diff changeset
   414
  // Java code.  The exception is caught and transformed into a
489c9b5090e2 Initial load
duke
parents:
diff changeset
   415
  // pending exception stored in JavaThread that can be tested from
489c9b5090e2 Initial load
duke
parents:
diff changeset
   416
  // within the VM.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   417
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   418
  // Note: Usually the parameters are removed by the callee. In case
489c9b5090e2 Initial load
duke
parents:
diff changeset
   419
  // of an exception crossing an activation frame boundary, that is
489c9b5090e2 Initial load
duke
parents:
diff changeset
   420
  // not the case if the callee is compiled code => need to setup the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   421
  // rsp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   422
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   423
  // rax: exception oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
   424
489c9b5090e2 Initial load
duke
parents:
diff changeset
   425
  address generate_catch_exception() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   426
    StubCodeMark mark(this, "StubRoutines", "catch_exception");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   427
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   428
489c9b5090e2 Initial load
duke
parents:
diff changeset
   429
    // same as in generate_call_stub():
489c9b5090e2 Initial load
duke
parents:
diff changeset
   430
    const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   431
    const Address thread        (rbp, thread_off         * wordSize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   432
489c9b5090e2 Initial load
duke
parents:
diff changeset
   433
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   434
    // verify that threads correspond
489c9b5090e2 Initial load
duke
parents:
diff changeset
   435
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   436
      Label L, S;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   437
      __ cmpptr(r15_thread, thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   438
      __ jcc(Assembler::notEqual, S);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   439
      __ get_thread(rbx);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   440
      __ cmpptr(r15_thread, rbx);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   441
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   442
      __ bind(S);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   443
      __ stop("StubRoutines::catch_exception: threads must correspond");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   444
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   445
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   446
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   447
489c9b5090e2 Initial load
duke
parents:
diff changeset
   448
    // set pending exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   449
    __ verify_oop(rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   450
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   451
    __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   452
    __ lea(rscratch1, ExternalAddress((address)__FILE__));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   453
    __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   454
    __ movl(Address(r15_thread, Thread::exception_line_offset()), (int)  __LINE__);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   455
489c9b5090e2 Initial load
duke
parents:
diff changeset
   456
    // complete return to VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
   457
    assert(StubRoutines::_call_stub_return_address != NULL,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   458
           "_call_stub_return_address must have been generated before");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   459
    __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   460
489c9b5090e2 Initial load
duke
parents:
diff changeset
   461
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   462
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   463
489c9b5090e2 Initial load
duke
parents:
diff changeset
   464
  // Continuation point for runtime calls returning with a pending
489c9b5090e2 Initial load
duke
parents:
diff changeset
   465
  // exception.  The pending exception check happened in the runtime
489c9b5090e2 Initial load
duke
parents:
diff changeset
   466
  // or native call stub.  The pending exception in Thread is
489c9b5090e2 Initial load
duke
parents:
diff changeset
   467
  // converted into a Java-level exception.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   468
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   469
  // Contract with Java-level exception handlers:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   470
  // rax: exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   471
  // rdx: throwing pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   472
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   473
  // NOTE: At entry of this stub, exception-pc must be on stack !!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   474
489c9b5090e2 Initial load
duke
parents:
diff changeset
   475
  address generate_forward_exception() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   476
    StubCodeMark mark(this, "StubRoutines", "forward exception");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   477
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   478
489c9b5090e2 Initial load
duke
parents:
diff changeset
   479
    // Upon entry, the sp points to the return address returning into
489c9b5090e2 Initial load
duke
parents:
diff changeset
   480
    // Java (interpreted or compiled) code; i.e., the return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   481
    // becomes the throwing pc.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   482
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   483
    // Arguments pushed before the runtime call are still on the stack
489c9b5090e2 Initial load
duke
parents:
diff changeset
   484
    // but the exception handler will reset the stack pointer ->
489c9b5090e2 Initial load
duke
parents:
diff changeset
   485
    // ignore them.  A potential result in registers can be ignored as
489c9b5090e2 Initial load
duke
parents:
diff changeset
   486
    // well.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   487
489c9b5090e2 Initial load
duke
parents:
diff changeset
   488
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   489
    // make sure this code is only executed if there is a pending exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   490
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   491
      Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   492
      __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   493
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   494
      __ stop("StubRoutines::forward exception: no pending exception (1)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   495
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   496
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   497
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   498
489c9b5090e2 Initial load
duke
parents:
diff changeset
   499
    // compute exception handler into rbx
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   500
    __ movptr(c_rarg0, Address(rsp, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   501
    BLOCK_COMMENT("call exception_handler_for_return_address");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   502
    __ call_VM_leaf(CAST_FROM_FN_PTR(address,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   503
                         SharedRuntime::exception_handler_for_return_address),
5046
27e801a857cb 6919934: JSR 292 needs to support x86 C1
twisti
parents: 4740
diff changeset
   504
                    r15_thread, c_rarg0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   505
    __ mov(rbx, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   506
489c9b5090e2 Initial load
duke
parents:
diff changeset
   507
    // setup rax & rdx, remove return address & clear pending exception
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   508
    __ pop(rdx);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   509
    __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
1888
bbf498fb4354 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents: 1437
diff changeset
   510
    __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   511
489c9b5090e2 Initial load
duke
parents:
diff changeset
   512
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
   513
    // make sure exception is set
489c9b5090e2 Initial load
duke
parents:
diff changeset
   514
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   515
      Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   516
      __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   517
      __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   518
      __ stop("StubRoutines::forward exception: no pending exception (2)");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   519
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   520
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   521
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
   522
489c9b5090e2 Initial load
duke
parents:
diff changeset
   523
    // continue at exception handler (return address removed)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   524
    // rax: exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
   525
    // rbx: exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
   526
    // rdx: throwing pc
489c9b5090e2 Initial load
duke
parents:
diff changeset
   527
    __ verify_oop(rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   528
    __ jmp(rbx);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   529
489c9b5090e2 Initial load
duke
parents:
diff changeset
   530
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   531
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   532
489c9b5090e2 Initial load
duke
parents:
diff changeset
   533
  // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   534
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   535
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   536
  //    c_rarg0: exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   537
  //    c_rarg0: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   538
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   539
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   540
  //    *dest <- ex, return (orig *dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   541
  address generate_atomic_xchg() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   542
    StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   543
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   544
489c9b5090e2 Initial load
duke
parents:
diff changeset
   545
    __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
489c9b5090e2 Initial load
duke
parents:
diff changeset
   546
    __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
489c9b5090e2 Initial load
duke
parents:
diff changeset
   547
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   548
489c9b5090e2 Initial load
duke
parents:
diff changeset
   549
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   550
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   551
489c9b5090e2 Initial load
duke
parents:
diff changeset
   552
  // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   553
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   554
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   555
  //    c_rarg0: exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   556
  //    c_rarg1: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   557
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   558
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   559
  //    *dest <- ex, return (orig *dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   560
  address generate_atomic_xchg_ptr() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   561
    StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   562
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   563
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   564
    __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   565
    __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   566
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   567
489c9b5090e2 Initial load
duke
parents:
diff changeset
   568
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   569
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   570
489c9b5090e2 Initial load
duke
parents:
diff changeset
   571
  // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   572
  //                                         jint compare_value)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   573
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   574
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   575
  //    c_rarg0: exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   576
  //    c_rarg1: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   577
  //    c_rarg2: compare_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   578
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   579
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   580
  //    if ( compare_value == *dest ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   581
  //       *dest = exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   582
  //       return compare_value;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   583
  //    else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   584
  //       return *dest;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   585
  address generate_atomic_cmpxchg() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   586
    StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   587
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   588
489c9b5090e2 Initial load
duke
parents:
diff changeset
   589
    __ movl(rax, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   590
   if ( os::is_MP() ) __ lock();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   591
    __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   592
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   593
489c9b5090e2 Initial load
duke
parents:
diff changeset
   594
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   595
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   596
489c9b5090e2 Initial load
duke
parents:
diff changeset
   597
  // Support for jint atomic::atomic_cmpxchg_long(jlong exchange_value,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   598
  //                                             volatile jlong* dest,
489c9b5090e2 Initial load
duke
parents:
diff changeset
   599
  //                                             jlong compare_value)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   600
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   601
  //    c_rarg0: exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   602
  //    c_rarg1: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   603
  //    c_rarg2: compare_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   604
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   605
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   606
  //    if ( compare_value == *dest ) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   607
  //       *dest = exchange_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   608
  //       return compare_value;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   609
  //    else
489c9b5090e2 Initial load
duke
parents:
diff changeset
   610
  //       return *dest;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   611
  address generate_atomic_cmpxchg_long() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   612
    StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   613
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   614
489c9b5090e2 Initial load
duke
parents:
diff changeset
   615
    __ movq(rax, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   616
   if ( os::is_MP() ) __ lock();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   617
    __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   618
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   619
489c9b5090e2 Initial load
duke
parents:
diff changeset
   620
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   621
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   622
489c9b5090e2 Initial load
duke
parents:
diff changeset
   623
  // Support for jint atomic::add(jint add_value, volatile jint* dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   624
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   625
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   626
  //    c_rarg0: add_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   627
  //    c_rarg1: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   628
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   629
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   630
  //    *dest += add_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   631
  //    return *dest;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   632
  address generate_atomic_add() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   633
    StubCodeMark mark(this, "StubRoutines", "atomic_add");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   634
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   635
489c9b5090e2 Initial load
duke
parents:
diff changeset
   636
    __ movl(rax, c_rarg0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   637
   if ( os::is_MP() ) __ lock();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   638
    __ xaddl(Address(c_rarg1, 0), c_rarg0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   639
    __ addl(rax, c_rarg0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   640
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   641
489c9b5090e2 Initial load
duke
parents:
diff changeset
   642
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   643
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   644
489c9b5090e2 Initial load
duke
parents:
diff changeset
   645
  // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   646
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   647
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   648
  //    c_rarg0: add_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   649
  //    c_rarg1: dest
489c9b5090e2 Initial load
duke
parents:
diff changeset
   650
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   651
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   652
  //    *dest += add_value
489c9b5090e2 Initial load
duke
parents:
diff changeset
   653
  //    return *dest;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   654
  address generate_atomic_add_ptr() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   655
    StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   656
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   657
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   658
    __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   659
   if ( os::is_MP() ) __ lock();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   660
    __ xaddptr(Address(c_rarg1, 0), c_rarg0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   661
    __ addptr(rax, c_rarg0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   662
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   663
489c9b5090e2 Initial load
duke
parents:
diff changeset
   664
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   665
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   666
489c9b5090e2 Initial load
duke
parents:
diff changeset
   667
  // Support for intptr_t OrderAccess::fence()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   668
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   669
  // Arguments :
489c9b5090e2 Initial load
duke
parents:
diff changeset
   670
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   671
  // Result:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   672
  address generate_orderaccess_fence() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   673
    StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   674
    address start = __ pc();
2338
a8660a1b709b 6822204: volatile fences should prefer lock:addl to actual mfence instructions
never
parents: 2259
diff changeset
   675
    __ membar(Assembler::StoreLoad);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   676
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   677
489c9b5090e2 Initial load
duke
parents:
diff changeset
   678
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   679
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   680
489c9b5090e2 Initial load
duke
parents:
diff changeset
   681
  // Support for intptr_t get_previous_fp()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   682
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   683
  // This routine is used to find the previous frame pointer for the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   684
  // caller (current_frame_guess). This is used as part of debugging
489c9b5090e2 Initial load
duke
parents:
diff changeset
   685
  // ps() is seemingly lost trying to find frames.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   686
  // This code assumes that caller current_frame_guess) has a frame.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   687
  address generate_get_previous_fp() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   688
    StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   689
    const Address old_fp(rbp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   690
    const Address older_fp(rax, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   691
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   692
489c9b5090e2 Initial load
duke
parents:
diff changeset
   693
    __ enter();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   694
    __ movptr(rax, old_fp); // callers fp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   695
    __ movptr(rax, older_fp); // the frame for ps()
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   696
    __ pop(rbp);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   697
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   698
489c9b5090e2 Initial load
duke
parents:
diff changeset
   699
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   700
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   701
11961
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   702
  // Support for intptr_t get_previous_sp()
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   703
  //
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   704
  // This routine is used to find the previous stack pointer for the
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   705
  // caller.
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   706
  address generate_get_previous_sp() {
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   707
    StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   708
    address start = __ pc();
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   709
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   710
    __ movptr(rax, rsp);
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   711
    __ addptr(rax, 8); // return address is at the top of the stack.
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   712
    __ ret(0);
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   713
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   714
    return start;
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   715
  }
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
   716
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   717
  //----------------------------------------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
   718
  // Support for void verify_mxcsr()
489c9b5090e2 Initial load
duke
parents:
diff changeset
   719
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   720
  // This routine is used with -Xcheck:jni to verify that native
489c9b5090e2 Initial load
duke
parents:
diff changeset
   721
  // JNI code does not return to Java code without restoring the
489c9b5090e2 Initial load
duke
parents:
diff changeset
   722
  // MXCSR register to our expected state.
489c9b5090e2 Initial load
duke
parents:
diff changeset
   723
489c9b5090e2 Initial load
duke
parents:
diff changeset
   724
  address generate_verify_mxcsr() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   725
    StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   726
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   727
489c9b5090e2 Initial load
duke
parents:
diff changeset
   728
    const Address mxcsr_save(rsp, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   729
489c9b5090e2 Initial load
duke
parents:
diff changeset
   730
    if (CheckJNICalls) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   731
      Label ok_ret;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   732
      __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   733
      __ subptr(rsp, wordSize);      // allocate a temp location
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   734
      __ stmxcsr(mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   735
      __ movl(rax, mxcsr_save);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   736
      __ andl(rax, MXCSR_MASK);    // Only check control and mask bits
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   737
      __ cmpl(rax, *(int *)(StubRoutines::x86::mxcsr_std()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   738
      __ jcc(Assembler::equal, ok_ret);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   739
489c9b5090e2 Initial load
duke
parents:
diff changeset
   740
      __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   741
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   742
      __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   743
489c9b5090e2 Initial load
duke
parents:
diff changeset
   744
      __ bind(ok_ret);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   745
      __ addptr(rsp, wordSize);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   746
      __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   747
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   748
489c9b5090e2 Initial load
duke
parents:
diff changeset
   749
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   750
489c9b5090e2 Initial load
duke
parents:
diff changeset
   751
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   752
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   753
489c9b5090e2 Initial load
duke
parents:
diff changeset
   754
  address generate_f2i_fixup() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   755
    StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   756
    Address inout(rsp, 5 * wordSize); // return address + 4 saves
489c9b5090e2 Initial load
duke
parents:
diff changeset
   757
489c9b5090e2 Initial load
duke
parents:
diff changeset
   758
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   759
489c9b5090e2 Initial load
duke
parents:
diff changeset
   760
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   761
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   762
    __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   763
    __ push(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   764
    __ push(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   765
    __ push(c_rarg1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   766
489c9b5090e2 Initial load
duke
parents:
diff changeset
   767
    __ movl(rax, 0x7f800000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   768
    __ xorl(c_rarg3, c_rarg3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   769
    __ movl(c_rarg2, inout);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   770
    __ movl(c_rarg1, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   771
    __ andl(c_rarg1, 0x7fffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   772
    __ cmpl(rax, c_rarg1); // NaN? -> 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   773
    __ jcc(Assembler::negative, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   774
    __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
489c9b5090e2 Initial load
duke
parents:
diff changeset
   775
    __ movl(c_rarg3, 0x80000000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   776
    __ movl(rax, 0x7fffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   777
    __ cmovl(Assembler::positive, c_rarg3, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   778
489c9b5090e2 Initial load
duke
parents:
diff changeset
   779
    __ bind(L);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   780
    __ movptr(inout, c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   781
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   782
    __ pop(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   783
    __ pop(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   784
    __ pop(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   785
    __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   786
489c9b5090e2 Initial load
duke
parents:
diff changeset
   787
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   788
489c9b5090e2 Initial load
duke
parents:
diff changeset
   789
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   790
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   791
489c9b5090e2 Initial load
duke
parents:
diff changeset
   792
  address generate_f2l_fixup() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   793
    StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   794
    Address inout(rsp, 5 * wordSize); // return address + 4 saves
489c9b5090e2 Initial load
duke
parents:
diff changeset
   795
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   796
489c9b5090e2 Initial load
duke
parents:
diff changeset
   797
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   798
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   799
    __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   800
    __ push(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   801
    __ push(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   802
    __ push(c_rarg1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   803
489c9b5090e2 Initial load
duke
parents:
diff changeset
   804
    __ movl(rax, 0x7f800000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   805
    __ xorl(c_rarg3, c_rarg3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   806
    __ movl(c_rarg2, inout);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   807
    __ movl(c_rarg1, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   808
    __ andl(c_rarg1, 0x7fffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   809
    __ cmpl(rax, c_rarg1); // NaN? -> 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   810
    __ jcc(Assembler::negative, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   811
    __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
489c9b5090e2 Initial load
duke
parents:
diff changeset
   812
    __ mov64(c_rarg3, 0x8000000000000000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   813
    __ mov64(rax, 0x7fffffffffffffff);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   814
    __ cmov(Assembler::positive, c_rarg3, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   815
489c9b5090e2 Initial load
duke
parents:
diff changeset
   816
    __ bind(L);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   817
    __ movptr(inout, c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   818
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   819
    __ pop(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   820
    __ pop(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   821
    __ pop(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   822
    __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   823
489c9b5090e2 Initial load
duke
parents:
diff changeset
   824
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   825
489c9b5090e2 Initial load
duke
parents:
diff changeset
   826
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   827
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   828
489c9b5090e2 Initial load
duke
parents:
diff changeset
   829
  address generate_d2i_fixup() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   830
    StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   831
    Address inout(rsp, 6 * wordSize); // return address + 5 saves
489c9b5090e2 Initial load
duke
parents:
diff changeset
   832
489c9b5090e2 Initial load
duke
parents:
diff changeset
   833
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   834
489c9b5090e2 Initial load
duke
parents:
diff changeset
   835
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   836
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   837
    __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   838
    __ push(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   839
    __ push(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   840
    __ push(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   841
    __ push(c_rarg0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   842
489c9b5090e2 Initial load
duke
parents:
diff changeset
   843
    __ movl(rax, 0x7ff00000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   844
    __ movq(c_rarg2, inout);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   845
    __ movl(c_rarg3, c_rarg2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   846
    __ mov(c_rarg1, c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   847
    __ mov(c_rarg0, c_rarg2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   848
    __ negl(c_rarg3);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   849
    __ shrptr(c_rarg1, 0x20);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   850
    __ orl(c_rarg3, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   851
    __ andl(c_rarg1, 0x7fffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   852
    __ xorl(c_rarg2, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   853
    __ shrl(c_rarg3, 0x1f);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   854
    __ orl(c_rarg1, c_rarg3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   855
    __ cmpl(rax, c_rarg1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   856
    __ jcc(Assembler::negative, L); // NaN -> 0
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   857
    __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   858
    __ movl(c_rarg2, 0x80000000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   859
    __ movl(rax, 0x7fffffff);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   860
    __ cmov(Assembler::positive, c_rarg2, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   861
489c9b5090e2 Initial load
duke
parents:
diff changeset
   862
    __ bind(L);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   863
    __ movptr(inout, c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   864
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   865
    __ pop(c_rarg0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   866
    __ pop(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   867
    __ pop(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   868
    __ pop(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   869
    __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   870
489c9b5090e2 Initial load
duke
parents:
diff changeset
   871
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   872
489c9b5090e2 Initial load
duke
parents:
diff changeset
   873
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   874
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   875
489c9b5090e2 Initial load
duke
parents:
diff changeset
   876
  address generate_d2l_fixup() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   877
    StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   878
    Address inout(rsp, 6 * wordSize); // return address + 5 saves
489c9b5090e2 Initial load
duke
parents:
diff changeset
   879
489c9b5090e2 Initial load
duke
parents:
diff changeset
   880
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   881
489c9b5090e2 Initial load
duke
parents:
diff changeset
   882
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   883
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   884
    __ push(rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   885
    __ push(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   886
    __ push(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   887
    __ push(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   888
    __ push(c_rarg0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   889
489c9b5090e2 Initial load
duke
parents:
diff changeset
   890
    __ movl(rax, 0x7ff00000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   891
    __ movq(c_rarg2, inout);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   892
    __ movl(c_rarg3, c_rarg2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   893
    __ mov(c_rarg1, c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   894
    __ mov(c_rarg0, c_rarg2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   895
    __ negl(c_rarg3);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   896
    __ shrptr(c_rarg1, 0x20);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   897
    __ orl(c_rarg3, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   898
    __ andl(c_rarg1, 0x7fffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   899
    __ xorl(c_rarg2, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   900
    __ shrl(c_rarg3, 0x1f);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   901
    __ orl(c_rarg1, c_rarg3);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   902
    __ cmpl(rax, c_rarg1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   903
    __ jcc(Assembler::negative, L); // NaN -> 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
   904
    __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
489c9b5090e2 Initial load
duke
parents:
diff changeset
   905
    __ mov64(c_rarg2, 0x8000000000000000);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   906
    __ mov64(rax, 0x7fffffffffffffff);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   907
    __ cmovq(Assembler::positive, c_rarg2, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   908
489c9b5090e2 Initial load
duke
parents:
diff changeset
   909
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   910
    __ movq(inout, c_rarg2);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   911
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   912
    __ pop(c_rarg0);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   913
    __ pop(c_rarg1);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   914
    __ pop(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   915
    __ pop(c_rarg3);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   916
    __ pop(rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   917
489c9b5090e2 Initial load
duke
parents:
diff changeset
   918
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   919
489c9b5090e2 Initial load
duke
parents:
diff changeset
   920
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   921
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   922
489c9b5090e2 Initial load
duke
parents:
diff changeset
   923
  address generate_fp_mask(const char *stub_name, int64_t mask) {
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
   924
    __ align(CodeEntryAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   925
    StubCodeMark mark(this, "StubRoutines", stub_name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   926
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   927
489c9b5090e2 Initial load
duke
parents:
diff changeset
   928
    __ emit_data64( mask, relocInfo::none );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   929
    __ emit_data64( mask, relocInfo::none );
489c9b5090e2 Initial load
duke
parents:
diff changeset
   930
489c9b5090e2 Initial load
duke
parents:
diff changeset
   931
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   932
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   933
489c9b5090e2 Initial load
duke
parents:
diff changeset
   934
  // The following routine generates a subroutine to throw an
489c9b5090e2 Initial load
duke
parents:
diff changeset
   935
  // asynchronous UnknownError when an unsafe access gets a fault that
489c9b5090e2 Initial load
duke
parents:
diff changeset
   936
  // could not be reasonably prevented by the programmer.  (Example:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   937
  // SIGBUS/OBJERR.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
   938
  address generate_handler_for_unsafe_access() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   939
    StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   940
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   941
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   942
    __ push(0);                       // hole for return address-to-be
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   943
    __ pusha();                       // push registers
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   944
    Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   945
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
   946
    // FIXME: this probably needs alignment logic
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
   947
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   948
    __ subptr(rsp, frame::arg_reg_save_area_bytes);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   949
    BLOCK_COMMENT("call handle_unsafe_access");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   950
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   951
    __ addptr(rsp, frame::arg_reg_save_area_bytes);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   952
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   953
    __ movptr(next_pc, rax);          // stuff next address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   954
    __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   955
    __ ret(0);                        // jump to next address
489c9b5090e2 Initial load
duke
parents:
diff changeset
   956
489c9b5090e2 Initial load
duke
parents:
diff changeset
   957
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   958
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   959
489c9b5090e2 Initial load
duke
parents:
diff changeset
   960
  // Non-destructive plausibility checks for oops
489c9b5090e2 Initial load
duke
parents:
diff changeset
   961
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   962
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   963
  //    all args on stack!
489c9b5090e2 Initial load
duke
parents:
diff changeset
   964
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
   965
  // Stack after saving c_rarg3:
489c9b5090e2 Initial load
duke
parents:
diff changeset
   966
  //    [tos + 0]: saved c_rarg3
489c9b5090e2 Initial load
duke
parents:
diff changeset
   967
  //    [tos + 1]: saved c_rarg2
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   968
  //    [tos + 2]: saved r12 (several TemplateTable methods use it)
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   969
  //    [tos + 3]: saved flags
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   970
  //    [tos + 4]: return address
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   971
  //  * [tos + 5]: error message (char*)
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   972
  //  * [tos + 6]: object to verify (oop)
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   973
  //  * [tos + 7]: saved rax - saved by caller and bashed
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
   974
  //  * [tos + 8]: saved r10 (rscratch1) - saved by caller
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   975
  //  * = popped on exit
489c9b5090e2 Initial load
duke
parents:
diff changeset
   976
  address generate_verify_oop() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   977
    StubCodeMark mark(this, "StubRoutines", "verify_oop");
489c9b5090e2 Initial load
duke
parents:
diff changeset
   978
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
   979
489c9b5090e2 Initial load
duke
parents:
diff changeset
   980
    Label exit, error;
489c9b5090e2 Initial load
duke
parents:
diff changeset
   981
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   982
    __ pushf();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   983
    __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
   984
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   985
    __ push(r12);
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   986
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   987
    // save c_rarg2 and c_rarg3
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   988
    __ push(c_rarg2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
   989
    __ push(c_rarg3);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
   990
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   991
    enum {
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   992
           // After previous pushes.
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   993
           oop_to_verify = 6 * wordSize,
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   994
           saved_rax     = 7 * wordSize,
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
   995
           saved_r10     = 8 * wordSize,
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   996
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   997
           // Before the call to MacroAssembler::debug(), see below.
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   998
           return_addr   = 16 * wordSize,
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
   999
           error_msg     = 17 * wordSize
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1000
    };
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1001
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1002
    // get object
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1003
    __ movptr(rax, Address(rsp, oop_to_verify));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1004
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1005
    // make sure object is 'reasonable'
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1006
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1007
    __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1008
    // Check if the oop is in the right area of memory
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1009
    __ movptr(c_rarg2, rax);
1888
bbf498fb4354 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents: 1437
diff changeset
  1010
    __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1011
    __ andptr(c_rarg2, c_rarg3);
1888
bbf498fb4354 6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents: 1437
diff changeset
  1012
    __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1013
    __ cmpptr(c_rarg2, c_rarg3);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1014
    __ jcc(Assembler::notZero, error);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1015
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1016
    // set r12 to heapbase for load_klass()
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1017
    __ reinit_heapbase();
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1018
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13391
diff changeset
  1019
    // make sure klass is 'reasonable', which is not zero.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1020
    __ load_klass(rax, rax);  // get klass
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1021
    __ testptr(rax, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1022
    __ jcc(Assembler::zero, error); // if klass is NULL it is broken
13728
882756847a04 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 13391
diff changeset
  1023
    // TODO: Future assert that klass is lower 4g memory for UseCompressedKlassPointers
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1024
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1025
    // return if everything seems ok
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1026
    __ bind(exit);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1027
    __ movptr(rax, Address(rsp, saved_rax));     // get saved rax back
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
  1028
    __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1029
    __ pop(c_rarg3);                             // restore c_rarg3
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1030
    __ pop(c_rarg2);                             // restore c_rarg2
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1031
    __ pop(r12);                                 // restore r12
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1032
    __ popf();                                   // restore flags
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
  1033
    __ ret(4 * wordSize);                        // pop caller saved stuff
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1034
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1035
    // handle errors
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1036
    __ bind(error);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1037
    __ movptr(rax, Address(rsp, saved_rax));     // get saved rax back
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
  1038
    __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1039
    __ pop(c_rarg3);                             // get saved c_rarg3 back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1040
    __ pop(c_rarg2);                             // get saved c_rarg2 back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1041
    __ pop(r12);                                 // get saved r12 back
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1042
    __ popf();                                   // get saved flags off stack --
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1043
                                                 // will be ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1044
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1045
    __ pusha();                                  // push registers
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1046
                                                 // (rip is already
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1047
                                                 // already pushed)
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1048
    // debug(char* msg, int64_t pc, int64_t regs[])
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1049
    // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1050
    // pushed all the registers, so now the stack looks like:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1051
    //     [tos +  0] 16 saved registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1052
    //     [tos + 16] return address
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1053
    //   * [tos + 17] error message (char*)
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1054
    //   * [tos + 18] object to verify (oop)
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1055
    //   * [tos + 19] saved rax - saved by caller and bashed
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
  1056
    //   * [tos + 20] saved r10 (rscratch1) - saved by caller
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1057
    //   * = popped on exit
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1058
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1059
    __ movptr(c_rarg0, Address(rsp, error_msg));    // pass address of error message
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1060
    __ movptr(c_rarg1, Address(rsp, return_addr));  // pass return address
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1061
    __ movq(c_rarg2, rsp);                          // pass address of regs on stack
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1062
    __ mov(r12, rsp);                               // remember rsp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1063
    __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1064
    __ andptr(rsp, -16);                            // align stack as required by ABI
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1065
    BLOCK_COMMENT("call MacroAssembler::debug");
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1066
    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1067
    __ mov(rsp, r12);                               // restore rsp
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1068
    __ popa();                                      // pop registers (includes r12)
5706
0c91076143f9 6958254: -XX:+VerifyOops is broken on x86
kvn
parents: 5547
diff changeset
  1069
    __ ret(4 * wordSize);                           // pop caller saved stuff
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1070
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1071
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1072
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1073
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1074
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1075
  // Verify that a register contains clean 32-bits positive value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1076
  // (high 32-bits are 0) so it could be used in 64-bits shifts.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1077
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1078
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1079
  //    Rint  -  32-bits value
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1080
  //    Rtmp  -  scratch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1081
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1082
  void assert_clean_int(Register Rint, Register Rtmp) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1083
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1084
    Label L;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1085
    assert_different_registers(Rtmp, Rint);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1086
    __ movslq(Rtmp, Rint);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1087
    __ cmpq(Rtmp, Rint);
371
1aacedc9db7c 6689060: Escape Analysis does not work with Compressed Oops
kvn
parents: 360
diff changeset
  1088
    __ jcc(Assembler::equal, L);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1089
    __ stop("high 32-bits of int value are not 0");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1090
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1091
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1092
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1093
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1094
  //  Generate overlap test for array copy stubs
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1095
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1096
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1097
  //     c_rarg0 - from
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1098
  //     c_rarg1 - to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1099
  //     c_rarg2 - element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1100
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1101
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1102
  //     rax   - &from[element count - 1]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1103
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1104
  void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1105
    assert(no_overlap_target != NULL, "must be generated");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1106
    array_overlap_test(no_overlap_target, NULL, sf);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1107
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1108
  void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1109
    array_overlap_test(NULL, &L_no_overlap, sf);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1110
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1111
  void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1112
    const Register from     = c_rarg0;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1113
    const Register to       = c_rarg1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1114
    const Register count    = c_rarg2;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1115
    const Register end_from = rax;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1116
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1117
    __ cmpptr(to, from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1118
    __ lea(end_from, Address(from, count, sf, 0));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1119
    if (NOLp == NULL) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1120
      ExternalAddress no_overlap(no_overlap_target);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1121
      __ jump_cc(Assembler::belowEqual, no_overlap);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1122
      __ cmpptr(to, end_from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1123
      __ jump_cc(Assembler::aboveEqual, no_overlap);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1124
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1125
      __ jcc(Assembler::belowEqual, (*NOLp));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1126
      __ cmpptr(to, end_from);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1127
      __ jcc(Assembler::aboveEqual, (*NOLp));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1128
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1129
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1130
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1131
  // Shuffle first three arg regs on Windows into Linux/Solaris locations.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1132
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1133
  // Outputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1134
  //    rdi - rcx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1135
  //    rsi - rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1136
  //    rdx - r8
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1137
  //    rcx - r9
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1138
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1139
  // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1140
  // are non-volatile.  r9 and r10 should not be used by the caller.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1141
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1142
  void setup_arg_regs(int nargs = 3) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1143
    const Register saved_rdi = r9;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1144
    const Register saved_rsi = r10;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1145
    assert(nargs == 3 || nargs == 4, "else fix");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1146
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1147
    assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1148
           "unexpected argument registers");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1149
    if (nargs >= 4)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1150
      __ mov(rax, r9);  // r9 is also saved_rdi
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1151
    __ movptr(saved_rdi, rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1152
    __ movptr(saved_rsi, rsi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1153
    __ mov(rdi, rcx); // c_rarg0
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1154
    __ mov(rsi, rdx); // c_rarg1
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1155
    __ mov(rdx, r8);  // c_rarg2
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1156
    if (nargs >= 4)
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1157
      __ mov(rcx, rax); // c_rarg3 (via rax)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1158
#else
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1159
    assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1160
           "unexpected argument registers");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1161
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1162
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1163
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1164
  void restore_arg_regs() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1165
    const Register saved_rdi = r9;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1166
    const Register saved_rsi = r10;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1167
#ifdef _WIN64
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1168
    __ movptr(rdi, saved_rdi);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1169
    __ movptr(rsi, saved_rsi);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1170
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1171
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1172
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1173
  // Generate code for an array write pre barrier
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1174
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1175
  //     addr    -  starting address
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1176
  //     count   -  element count
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1177
  //     tmp     - scratch register
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1178
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1179
  //     Destroy no registers!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1180
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1181
  void  gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1182
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1183
    switch (bs->kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1184
      case BarrierSet::G1SATBCT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1185
      case BarrierSet::G1SATBCTLogging:
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1186
        // With G1, don't generate the call if we statically know that the target in uninitialized
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1187
        if (!dest_uninitialized) {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1188
           __ pusha();                      // push registers
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1189
           if (count == c_rarg0) {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1190
             if (addr == c_rarg1) {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1191
               // exactly backwards!!
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1192
               __ xchgptr(c_rarg1, c_rarg0);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1193
             } else {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1194
               __ movptr(c_rarg1, count);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1195
               __ movptr(c_rarg0, addr);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1196
             }
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1197
           } else {
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1198
             __ movptr(c_rarg0, addr);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1199
             __ movptr(c_rarg1, count);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1200
           }
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1201
           __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1202
           __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1203
        }
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1204
         break;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1205
      case BarrierSet::CardTableModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1206
      case BarrierSet::CardTableExtension:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1207
      case BarrierSet::ModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1208
        break;
1374
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1209
      default:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1210
        ShouldNotReachHere();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1211
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1212
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1213
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1214
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1215
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1216
  // Generate code for an array write post barrier
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1217
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1218
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1219
  //     start    - register containing starting address of destination array
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1220
  //     end      - register containing ending address of destination array
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1221
  //     scratch  - scratch register
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1222
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1223
  //  The input registers are overwritten.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1224
  //  The ending address is inclusive.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1225
  void  gen_write_ref_array_post_barrier(Register start, Register end, Register scratch) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1226
    assert_different_registers(start, end, scratch);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1227
    BarrierSet* bs = Universe::heap()->barrier_set();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1228
    switch (bs->kind()) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1229
      case BarrierSet::G1SATBCT:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1230
      case BarrierSet::G1SATBCTLogging:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1231
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1232
        {
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1233
          __ pusha();                      // push registers (overkill)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1234
          // must compute element count unless barrier set interface is changed (other platforms supply count)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1235
          assert_different_registers(start, end, scratch);
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  1236
          __ lea(scratch, Address(end, BytesPerHeapOop));
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  1237
          __ subptr(scratch, start);               // subtract start to get #bytes
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  1238
          __ shrptr(scratch, LogBytesPerHeapOop);  // convert to element count
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1239
          __ mov(c_rarg0, start);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1240
          __ mov(c_rarg1, scratch);
4740
d708800308b7 6918006: G1: spill space must be reserved on the stack for barrier calls on Windows x64
apetrusenko
parents: 4645
diff changeset
  1241
          __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1242
          __ popa();
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1243
        }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1244
        break;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1245
      case BarrierSet::CardTableModRef:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1246
      case BarrierSet::CardTableExtension:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1247
        {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1248
          CardTableModRefBS* ct = (CardTableModRefBS*)bs;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1249
          assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1250
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1251
          Label L_loop;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1252
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1253
           __ shrptr(start, CardTableModRefBS::card_shift);
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  1254
           __ addptr(end, BytesPerHeapOop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1255
           __ shrptr(end, CardTableModRefBS::card_shift);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1256
           __ subptr(end, start); // number of bytes to copy
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1257
957
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1258
          intptr_t disp = (intptr_t) ct->byte_map_base;
11190
d561d41f241a 7003454: order constants in constant table by number of references in code
twisti
parents: 10565
diff changeset
  1259
          if (Assembler::is_simm32(disp)) {
957
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1260
            Address cardtable(noreg, noreg, Address::no_scale, disp);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1261
            __ lea(scratch, cardtable);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1262
          } else {
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1263
            ExternalAddress cardtable((address)disp);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1264
            __ lea(scratch, cardtable);
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1265
          }
386f9fbd4cb3 6717457: Internal Error (src/share/vm/code/relocInfo.hpp:1089)
never
parents: 670
diff changeset
  1266
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1267
          const Register count = end; // 'end' register contains bytes count now
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1268
          __ addptr(start, scratch);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1269
        __ BIND(L_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1270
          __ movb(Address(start, count, Address::times_1), 0);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1271
          __ decrement(count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1272
          __ jcc(Assembler::greaterEqual, L_loop);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1273
        }
1374
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1274
        break;
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1275
      default:
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1276
        ShouldNotReachHere();
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1277
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1278
    }
4c24294029a9 6711316: Open source the Garbage-First garbage collector
ysr
parents: 371
diff changeset
  1279
  }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1280
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1281
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1282
  // Copy big chunks forward
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1283
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1284
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1285
  //   end_from     - source arrays end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1286
  //   end_to       - destination array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1287
  //   qword_count  - 64-bits element count, negative
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1288
  //   to           - scratch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1289
  //   L_copy_32_bytes - entry label
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1290
  //   L_copy_8_bytes  - exit  label
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1291
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1292
  void copy_32_bytes_forward(Register end_from, Register end_to,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1293
                             Register qword_count, Register to,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1294
                             Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1295
    DEBUG_ONLY(__ stop("enter at entry label, not here"));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1296
    Label L_loop;
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1297
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1298
  __ BIND(L_loop);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1299
    if(UseUnalignedLoadStores) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1300
      __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1301
      __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1302
      __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1303
      __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1304
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1305
    } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1306
      __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1307
      __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1308
      __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1309
      __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1310
      __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1311
      __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1312
      __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1313
      __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1314
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1315
  __ BIND(L_copy_32_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1316
    __ addptr(qword_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1317
    __ jcc(Assembler::lessEqual, L_loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1318
    __ subptr(qword_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1319
    __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1320
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1321
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1322
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1323
  // Copy big chunks backward
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1324
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1325
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1326
  //   from         - source arrays address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1327
  //   dest         - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1328
  //   qword_count  - 64-bits element count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1329
  //   to           - scratch
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1330
  //   L_copy_32_bytes - entry label
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1331
  //   L_copy_8_bytes  - exit  label
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1332
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1333
  void copy_32_bytes_backward(Register from, Register dest,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1334
                              Register qword_count, Register to,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1335
                              Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1336
    DEBUG_ONLY(__ stop("enter at entry label, not here"));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1337
    Label L_loop;
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  1338
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1339
  __ BIND(L_loop);
1437
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1340
    if(UseUnalignedLoadStores) {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1341
      __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1342
      __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1343
      __ movdqu(xmm1, Address(from, qword_count, Address::times_8,  0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1344
      __ movdqu(Address(dest, qword_count, Address::times_8,  0), xmm1);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1345
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1346
    } else {
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1347
      __ movq(to, Address(from, qword_count, Address::times_8, 24));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1348
      __ movq(Address(dest, qword_count, Address::times_8, 24), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1349
      __ movq(to, Address(from, qword_count, Address::times_8, 16));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1350
      __ movq(Address(dest, qword_count, Address::times_8, 16), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1351
      __ movq(to, Address(from, qword_count, Address::times_8,  8));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1352
      __ movq(Address(dest, qword_count, Address::times_8,  8), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1353
      __ movq(to, Address(from, qword_count, Address::times_8,  0));
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1354
      __ movq(Address(dest, qword_count, Address::times_8,  0), to);
d1846c1c04c4 6532536: Optimize arraycopy stubs for Intel cpus
kvn
parents: 1394
diff changeset
  1355
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1356
  __ BIND(L_copy_32_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1357
    __ subptr(qword_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1358
    __ jcc(Assembler::greaterEqual, L_loop);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1359
    __ addptr(qword_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1360
    __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1361
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1362
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1363
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1364
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1365
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1366
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1367
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1368
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1369
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1370
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1371
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1372
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1373
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1374
  // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1375
  // we let the hardware handle it.  The one to eight bytes within words,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1376
  // dwords or qwords that span cache line boundaries will still be loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1377
  // and stored atomically.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1378
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1379
  // Side Effects:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1380
  //   disjoint_byte_copy_entry is set to the no-overlap entry point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1381
  //   used by generate_conjoint_byte_copy().
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1382
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1383
  address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1384
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1385
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1386
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1387
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1388
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1389
    Label L_copy_byte, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1390
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1391
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1392
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1393
    const Register byte_count  = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1394
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1395
    const Register end_from    = from; // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1396
    const Register end_to      = to;   // destination array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1397
    // End pointers are inclusive, and if count is not zero they point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1398
    // to the last unit copied:  end_to[0] := end_from[0]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1399
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1400
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1401
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1402
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1403
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1404
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1405
       // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1406
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1407
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1408
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1409
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1410
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1411
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1412
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1413
    __ movptr(byte_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1414
    __ shrptr(count, 3); // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1415
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1416
    // Copy from low to high addresses.  Use 'to' as scratch.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1417
    __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1418
    __ lea(end_to,   Address(to,   qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1419
    __ negptr(qword_count); // make the count negative
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1420
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1421
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1422
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1423
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1424
    __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1425
    __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1426
    __ increment(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1427
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1428
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1429
    // Check for and copy trailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1430
  __ BIND(L_copy_4_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1431
    __ testl(byte_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1432
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1433
    __ movl(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1434
    __ movl(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1435
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1436
    __ addptr(end_from, 4);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1437
    __ addptr(end_to, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1438
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1439
    // Check for and copy trailing word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1440
  __ BIND(L_copy_2_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1441
    __ testl(byte_count, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1442
    __ jccb(Assembler::zero, L_copy_byte);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1443
    __ movw(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1444
    __ movw(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1445
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1446
    __ addptr(end_from, 2);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1447
    __ addptr(end_to, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1448
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1449
    // Check for and copy trailing byte
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1450
  __ BIND(L_copy_byte);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1451
    __ testl(byte_count, 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1452
    __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1453
    __ movb(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1454
    __ movb(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1455
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1456
  __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1457
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1458
    inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1459
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1460
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1461
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1462
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1463
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1464
    copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1465
    __ jmp(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1466
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1467
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1468
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1469
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1470
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1471
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1472
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1473
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1474
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1475
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1476
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1477
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1478
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1479
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1480
  // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1481
  // we let the hardware handle it.  The one to eight bytes within words,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1482
  // dwords or qwords that span cache line boundaries will still be loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1483
  // and stored atomically.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1484
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1485
  address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1486
                                      address* entry, const char *name) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1487
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1488
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1489
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1490
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1491
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1492
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1493
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1494
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1495
    const Register byte_count  = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1496
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1497
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1498
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1499
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1500
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1501
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1502
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1503
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1504
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1505
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1506
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1507
    array_overlap_test(nooverlap_target, Address::times_1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1508
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1509
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1510
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1511
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1512
    __ movptr(byte_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1513
    __ shrptr(count, 3);   // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1514
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1515
    // Copy from high to low addresses.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1516
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1517
    // Check for and copy trailing byte
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1518
    __ testl(byte_count, 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1519
    __ jcc(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1520
    __ movb(rax, Address(from, byte_count, Address::times_1, -1));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1521
    __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1522
    __ decrement(byte_count); // Adjust for possible trailing word
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1523
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1524
    // Check for and copy trailing word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1525
  __ BIND(L_copy_2_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1526
    __ testl(byte_count, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1527
    __ jcc(Assembler::zero, L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1528
    __ movw(rax, Address(from, byte_count, Address::times_1, -2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1529
    __ movw(Address(to, byte_count, Address::times_1, -2), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1530
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1531
    // Check for and copy trailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1532
  __ BIND(L_copy_4_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1533
    __ testl(byte_count, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1534
    __ jcc(Assembler::zero, L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1535
    __ movl(rax, Address(from, qword_count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1536
    __ movl(Address(to, qword_count, Address::times_8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1537
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1538
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1539
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1540
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1541
    __ movq(rax, Address(from, qword_count, Address::times_8, -8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1542
    __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1543
    __ decrement(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1544
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1545
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1546
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1547
    inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1548
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1549
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1550
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1551
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1552
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1553
    copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1554
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1555
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1556
    inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1557
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1558
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1559
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1560
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1561
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1562
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1563
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1564
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1565
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1566
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1567
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1568
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1569
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1570
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1571
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1572
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1573
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1574
  // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1575
  // let the hardware handle it.  The two or four words within dwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1576
  // or qwords that span cache line boundaries will still be loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1577
  // and stored atomically.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1578
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1579
  // Side Effects:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1580
  //   disjoint_short_copy_entry is set to the no-overlap entry point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1581
  //   used by generate_conjoint_short_copy().
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1582
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1583
  address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1584
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1585
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1586
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1587
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1588
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1589
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1590
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1591
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1592
    const Register word_count  = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1593
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1594
    const Register end_from    = from; // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1595
    const Register end_to      = to;   // destination array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1596
    // End pointers are inclusive, and if count is not zero they point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1597
    // to the last unit copied:  end_to[0] := end_from[0]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1598
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1599
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1600
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1601
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1602
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1603
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1604
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1605
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1606
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1607
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1608
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1609
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1610
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1611
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1612
    __ movptr(word_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1613
    __ shrptr(count, 2); // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1614
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1615
    // Copy from low to high addresses.  Use 'to' as scratch.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1616
    __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1617
    __ lea(end_to,   Address(to,   qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1618
    __ negptr(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1619
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1620
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1621
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1622
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1623
    __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1624
    __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1625
    __ increment(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1626
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1627
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1628
    // Original 'dest' is trashed, so we can't use it as a
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1629
    // base register for a possible trailing word copy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1630
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1631
    // Check for and copy trailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1632
  __ BIND(L_copy_4_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1633
    __ testl(word_count, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1634
    __ jccb(Assembler::zero, L_copy_2_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1635
    __ movl(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1636
    __ movl(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1637
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1638
    __ addptr(end_from, 4);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1639
    __ addptr(end_to, 4);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1640
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1641
    // Check for and copy trailing word
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1642
  __ BIND(L_copy_2_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1643
    __ testl(word_count, 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1644
    __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1645
    __ movw(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1646
    __ movw(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1647
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1648
  __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1649
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1650
    inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1651
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1652
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1653
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1654
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1655
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1656
    copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1657
    __ jmp(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1658
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1659
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1660
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1661
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1662
  address generate_fill(BasicType t, bool aligned, const char *name) {
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1663
    __ align(CodeEntryAlignment);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1664
    StubCodeMark mark(this, "StubRoutines", name);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1665
    address start = __ pc();
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1666
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1667
    BLOCK_COMMENT("Entry:");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1668
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1669
    const Register to       = c_rarg0;  // source array address
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1670
    const Register value    = c_rarg1;  // value
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1671
    const Register count    = c_rarg2;  // elements count
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1672
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1673
    __ enter(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1674
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1675
    __ generate_fill(t, aligned, to, value, count, rax, xmm0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1676
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1677
    __ leave(); // required for proper stackwalking of RuntimeStub frame
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1678
    __ ret(0);
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1679
    return start;
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1680
  }
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  1681
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1682
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1683
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1684
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1685
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1686
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1687
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1688
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1689
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1690
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1691
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1692
  // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1693
  // let the hardware handle it.  The two or four words within dwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1694
  // or qwords that span cache line boundaries will still be loaded
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1695
  // and stored atomically.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1696
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1697
  address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1698
                                       address *entry, const char *name) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1699
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1700
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1701
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1702
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1703
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1704
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1705
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1706
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1707
    const Register word_count  = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1708
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1709
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1710
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1711
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1712
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1713
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1714
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1715
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1716
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1717
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1718
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1719
    array_overlap_test(nooverlap_target, Address::times_2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1720
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1721
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1722
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1723
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1724
    __ movptr(word_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1725
    __ shrptr(count, 2); // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1726
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1727
    // Copy from high to low addresses.  Use 'to' as scratch.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1728
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1729
    // Check for and copy trailing word
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1730
    __ testl(word_count, 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1731
    __ jccb(Assembler::zero, L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1732
    __ movw(rax, Address(from, word_count, Address::times_2, -2));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1733
    __ movw(Address(to, word_count, Address::times_2, -2), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1735
    // Check for and copy trailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1736
  __ BIND(L_copy_4_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1737
    __ testl(word_count, 2);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1738
    __ jcc(Assembler::zero, L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1739
    __ movl(rax, Address(from, qword_count, Address::times_8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1740
    __ movl(Address(to, qword_count, Address::times_8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1741
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1742
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1743
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1744
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1745
    __ movq(rax, Address(from, qword_count, Address::times_8, -8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1746
    __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1747
    __ decrement(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1748
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1749
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1750
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1751
    inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1752
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1753
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1754
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1755
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1756
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1757
    copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1758
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1759
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1760
    inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1761
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1762
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1763
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1764
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1765
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1766
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1767
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1768
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1769
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1770
  //             ignored
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1771
  //   is_oop  - true => oop array, so generate store check code
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1772
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1773
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1774
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1775
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1776
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1777
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1778
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1779
  // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1780
  // the hardware handle it.  The two dwords within qwords that span
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1781
  // cache line boundaries will still be loaded and stored atomicly.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1782
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1783
  // Side Effects:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1784
  //   disjoint_int_copy_entry is set to the no-overlap entry point
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1785
  //   used by generate_conjoint_int_oop_copy().
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1786
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1787
  address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1788
                                         const char *name, bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1789
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1790
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1791
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1792
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1793
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1794
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1795
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1796
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1797
    const Register dword_count = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1798
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1799
    const Register end_from    = from; // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1800
    const Register end_to      = to;   // destination array end address
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1801
    const Register saved_to    = r11;  // saved destination array address
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1802
    // End pointers are inclusive, and if count is not zero they point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1803
    // to the last unit copied:  end_to[0] := end_from[0]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1804
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1805
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1806
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1807
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1808
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1809
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1810
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1811
      BLOCK_COMMENT("Entry:");
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1812
    }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1813
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1814
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1815
                      // r9 and r10 may be used to save non-volatile registers
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1816
    if (is_oop) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1817
      __ movq(saved_to, to);
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1818
      gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1819
    }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1820
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1821
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1822
    __ movptr(dword_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1823
    __ shrptr(count, 1); // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1824
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1825
    // Copy from low to high addresses.  Use 'to' as scratch.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1826
    __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1827
    __ lea(end_to,   Address(to,   qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1828
    __ negptr(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1829
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1830
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1831
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1832
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1833
    __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1834
    __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1835
    __ increment(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1836
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1837
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1838
    // Check for and copy trailing dword
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1839
  __ BIND(L_copy_4_bytes);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1840
    __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1841
    __ jccb(Assembler::zero, L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1842
    __ movl(rax, Address(end_from, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1843
    __ movl(Address(end_to, 8), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1844
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1845
  __ BIND(L_exit);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1846
    if (is_oop) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1847
      __ leaq(end_to, Address(saved_to, dword_count, Address::times_4, -4));
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1848
      gen_write_ref_array_post_barrier(saved_to, end_to, rax);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1849
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1850
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1851
    inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1852
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1853
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1854
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1855
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1856
    // Copy 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1857
    copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1858
    __ jmp(L_copy_4_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1859
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1860
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1861
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1862
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1863
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1864
  //   aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1865
  //             ignored
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1866
  //   is_oop  - true => oop array, so generate store check code
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1867
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1868
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1869
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1870
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1871
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1872
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1873
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1874
  // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1875
  // the hardware handle it.  The two dwords within qwords that span
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1876
  // cache line boundaries will still be loaded and stored atomicly.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1877
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1878
  address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1879
                                         address *entry, const char *name,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1880
                                         bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1881
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1882
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1883
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1884
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1885
    Label L_copy_32_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1886
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1887
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1888
    const Register count       = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1889
    const Register dword_count = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1890
    const Register qword_count = count;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1891
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1892
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1893
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1894
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1895
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1896
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1897
       // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1898
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1899
    }
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1900
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1901
    array_overlap_test(nooverlap_target, Address::times_4);
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1902
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1903
                      // r9 and r10 may be used to save non-volatile registers
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1904
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1905
    if (is_oop) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1906
      // no registers are destroyed by this call
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1907
      gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1908
    }
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1909
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1910
    assert_clean_int(count, rax); // Make sure 'count' is clean int.
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1911
    // 'from', 'to' and 'count' are now valid
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1912
    __ movptr(dword_count, count);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1913
    __ shrptr(count, 1); // count => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1914
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1915
    // Copy from high to low addresses.  Use 'to' as scratch.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1916
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1917
    // Check for and copy trailing dword
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1918
    __ testl(dword_count, 1);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1919
    __ jcc(Assembler::zero, L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1920
    __ movl(rax, Address(from, dword_count, Address::times_4, -4));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1921
    __ movl(Address(to, dword_count, Address::times_4, -4), rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1922
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1923
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1924
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1925
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1926
    __ movq(rax, Address(from, qword_count, Address::times_8, -8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1927
    __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1928
    __ decrement(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1929
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1930
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1931
    if (is_oop) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1932
      __ jmp(L_exit);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1933
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1934
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1935
    inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1936
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1937
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1938
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1939
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1940
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1941
    copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1942
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1943
   __ bind(L_exit);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1944
     if (is_oop) {
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1945
       Register end_to = rdx;
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1946
       __ leaq(end_to, Address(to, dword_count, Address::times_4, -4));
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1947
       gen_write_ref_array_post_barrier(to, end_to, rax);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1948
     }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1949
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  1950
    inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  1951
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1952
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1953
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1954
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1955
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1956
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1957
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1958
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1959
  //   aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1960
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1961
  //   is_oop  - true => oop array, so generate store check code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1962
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1963
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1964
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1965
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1966
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1967
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1968
  //
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  1969
 // Side Effects:
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1970
  //   disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1971
  //   no-overlap entry point used by generate_conjoint_long_oop_copy().
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1972
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1973
  address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  1974
                                          const char *name, bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1975
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1976
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1977
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1978
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1979
    Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1980
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1981
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1982
    const Register qword_count = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1983
    const Register end_from    = from; // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1984
    const Register end_to      = rcx;  // destination array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1985
    const Register saved_to    = to;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1986
    // End pointers are inclusive, and if count is not zero they point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1987
    // to the last unit copied:  end_to[0] := end_from[0]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1988
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1989
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1990
    // Save no-overlap entry point for generate_conjoint_long_oop_copy()
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1991
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1992
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1993
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1994
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1995
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  1996
      BLOCK_COMMENT("Entry:");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1997
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1998
489c9b5090e2 Initial load
duke
parents:
diff changeset
  1999
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2000
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2001
    // 'from', 'to' and 'qword_count' are now valid
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2002
    if (is_oop) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2003
      // no registers are destroyed by this call
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2004
      gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2005
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2006
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2007
    // Copy from low to high addresses.  Use 'to' as scratch.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2008
    __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2009
    __ lea(end_to,   Address(to,   qword_count, Address::times_8, -8));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2010
    __ negptr(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2011
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2012
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2013
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2014
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2015
    __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2016
    __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2017
    __ increment(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2018
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2019
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2020
    if (is_oop) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2021
      __ jmp(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2022
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2023
      restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2024
      inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2025
      __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2026
      __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2027
      __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2028
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2029
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2030
    // Copy 64-byte chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2031
    copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2032
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2033
    if (is_oop) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2034
    __ BIND(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2035
      gen_write_ref_array_post_barrier(saved_to, end_to, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2036
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2037
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2038
    if (is_oop) {
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2039
      inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2040
    } else {
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2041
      inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2042
    }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2043
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2044
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2045
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2046
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2047
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2048
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2049
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2050
  // Arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2051
  //   aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2052
  //             ignored
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2053
  //   is_oop  - true => oop array, so generate store check code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2054
  //   name    - stub name string
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2055
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2056
  // Inputs:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2057
  //   c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2058
  //   c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2059
  //   c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2060
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2061
  address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2062
                                          address nooverlap_target, address *entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2063
                                          const char *name, bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2064
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2065
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2066
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2067
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2068
    Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2069
    const Register from        = rdi;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2070
    const Register to          = rsi;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2071
    const Register qword_count = rdx;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2072
    const Register saved_count = rcx;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2073
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2074
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2075
    assert_clean_int(c_rarg2, rax);    // Make sure 'count' is clean int.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2076
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2077
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2078
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2079
      // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2080
      BLOCK_COMMENT("Entry:");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2081
    }
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2082
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2083
    array_overlap_test(nooverlap_target, Address::times_8);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2084
    setup_arg_regs(); // from => rdi, to => rsi, count => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2085
                      // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2086
    // 'from', 'to' and 'qword_count' are now valid
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2087
    if (is_oop) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2088
      // Save to and count for store barrier
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2089
      __ movptr(saved_count, qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2090
      // No registers are destroyed by this call
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2091
      gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2092
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2093
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2094
    __ jmp(L_copy_32_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2095
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2096
    // Copy trailing qwords
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2097
  __ BIND(L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2098
    __ movq(rax, Address(from, qword_count, Address::times_8, -8));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2099
    __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2100
    __ decrement(qword_count);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2101
    __ jcc(Assembler::notZero, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2102
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2103
    if (is_oop) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2104
      __ jmp(L_exit);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2105
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2106
      restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2107
      inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2108
      __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2109
      __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2110
      __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2111
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2112
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2113
    // Copy in 32-bytes chunks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2114
    copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2115
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2116
    if (is_oop) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2117
    __ BIND(L_exit);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2118
      __ lea(rcx, Address(to, saved_count, Address::times_8, -8));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2119
      gen_write_ref_array_post_barrier(to, rcx, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2120
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2121
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2122
    if (is_oop) {
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2123
      inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2124
    } else {
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2125
      inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2126
    }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2127
    __ xorptr(rax, rax); // return 0
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2128
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2129
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2130
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2131
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2132
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2133
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2134
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2135
  // Helper for generating a dynamic type check.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2136
  // Smashes no registers.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2137
  void generate_type_check(Register sub_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2138
                           Register super_check_offset,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2139
                           Register super_klass,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2140
                           Label& L_success) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2141
    assert_different_registers(sub_klass, super_check_offset, super_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2142
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2143
    BLOCK_COMMENT("type_check:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2144
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2145
    Label L_miss;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2146
2256
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1888
diff changeset
  2147
    __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg,        &L_success, &L_miss, NULL,
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1888
diff changeset
  2148
                                     super_check_offset);
82d4e10b7c6b 6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents: 1888
diff changeset
  2149
    __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2150
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2151
    // Fall through on failure!
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2152
    __ BIND(L_miss);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2153
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2154
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2155
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2156
  //  Generate checkcasting array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2157
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2158
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2159
  //    c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2160
  //    c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2161
  //    c_rarg2   - element count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2162
  //    c_rarg3   - size_t ckoff (super_check_offset)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2163
  // not Win64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2164
  //    c_rarg4   - oop ckval (super_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2165
  // Win64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2166
  //    rsp+40    - oop ckval (super_klass)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2167
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2168
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2169
  //    rax ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2170
  //    rax == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2171
  //
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2172
  address generate_checkcast_copy(const char *name, address *entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2173
                                  bool dest_uninitialized = false) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2174
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2175
    Label L_load_element, L_store_element, L_do_card_marks, L_done;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2176
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2177
    // Input registers (after setup_arg_regs)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2178
    const Register from        = rdi;   // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2179
    const Register to          = rsi;   // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2180
    const Register length      = rdx;   // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2181
    const Register ckoff       = rcx;   // super_check_offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2182
    const Register ckval       = r8;    // super_klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2183
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2184
    // Registers used as temps (r13, r14 are save-on-entry)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2185
    const Register end_from    = from;  // source array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2186
    const Register end_to      = r13;   // destination array end address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2187
    const Register count       = rdx;   // -(count_remaining)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2188
    const Register r14_length  = r14;   // saved copy of length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2189
    // End pointers are inclusive, and if length is not zero they point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2190
    // to the last unit copied:  end_to[0] := end_from[0]
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2191
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2192
    const Register rax_oop    = rax;    // actual oop copied
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2193
    const Register r11_klass  = r11;    // oop._klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2194
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2195
    //---------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2196
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2197
    // if the two arrays are subtypes of Object[] but the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2198
    // destination array type is not equal to or a supertype
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2199
    // of the source type.  Each element must be separately
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2200
    // checked.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2201
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2202
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2203
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2204
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2205
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2206
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2207
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2208
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2209
    // caller guarantees that the arrays really are different
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2210
    // otherwise, we would have to make conjoint checks
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2211
    { Label L;
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2212
      array_overlap_test(L, TIMES_OOP);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2213
      __ stop("checkcast_copy within a single array");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2214
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2215
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2216
#endif //ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2217
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2218
    setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2219
                       // ckoff => rcx, ckval => r8
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2220
                       // r9 and r10 may be used to save non-volatile registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2221
#ifdef _WIN64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2222
    // last argument (#4) is on stack on Win64
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2223
    __ movptr(ckval, Address(rsp, 6 * wordSize));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2224
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2225
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2226
    // Caller of this entry point must set up the argument registers.
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2227
    if (entry != NULL) {
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2228
      *entry = __ pc();
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2229
      BLOCK_COMMENT("Entry:");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2230
    }
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2231
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2232
    // allocate spill slots for r13, r14
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2233
    enum {
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2234
      saved_r13_offset,
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2235
      saved_r14_offset,
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2236
      saved_rbp_offset
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2237
    };
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2238
    __ subptr(rsp, saved_rbp_offset * wordSize);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2239
    __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2240
    __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2241
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2242
    // check that int operands are properly extended to size_t
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2243
    assert_clean_int(length, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2244
    assert_clean_int(ckoff, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2245
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2246
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2247
    BLOCK_COMMENT("assert consistent ckoff/ckval");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2248
    // The ckoff and ckval must be mutually consistent,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2249
    // even though caller generates both.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2250
    { Label L;
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 11194
diff changeset
  2251
      int sco_offset = in_bytes(Klass::super_check_offset_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2252
      __ cmpl(ckoff, Address(ckval, sco_offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2253
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2254
      __ stop("super_check_offset inconsistent");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2255
      __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2256
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2257
#endif //ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2258
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2259
    // Loop-invariant addresses.  They are exclusive end pointers.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2260
    Address end_from_addr(from, length, TIMES_OOP, 0);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2261
    Address   end_to_addr(to,   length, TIMES_OOP, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2262
    // Loop-variant addresses.  They assume post-incremented count < 0.
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2263
    Address from_element_addr(end_from, count, TIMES_OOP, 0);
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2264
    Address   to_element_addr(end_to,   count, TIMES_OOP, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2265
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2266
    gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2267
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2268
    // Copy from low to high addresses, indexed from the end of each array.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2269
    __ lea(end_from, end_from_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2270
    __ lea(end_to,   end_to_addr);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2271
    __ movptr(r14_length, length);        // save a copy of the length
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2272
    assert(length == count, "");          // else fix next line:
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2273
    __ negptr(count);                     // negate and test the length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2274
    __ jcc(Assembler::notZero, L_load_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2275
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2276
    // Empty array:  Nothing to do.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2277
    __ xorptr(rax, rax);                  // return 0 on (trivial) success
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2278
    __ jmp(L_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2279
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2280
    // ======== begin loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2281
    // (Loop is rotated; its entry is L_load_element.)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2282
    // Loop control:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2283
    //   for (count = -count; count != 0; count++)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2284
    // Base pointers src, dst are biased by 8*(count-1),to last element.
5249
5cac34e6fe54 6940701: Don't align loops in stubs for Niagara sparc
kvn
parents: 5050
diff changeset
  2285
    __ align(OptoLoopAlignment);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2286
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2287
    __ BIND(L_store_element);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2288
    __ store_heap_oop(to_element_addr, rax_oop);  // store the oop
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2289
    __ increment(count);               // increment the count toward zero
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2290
    __ jcc(Assembler::zero, L_do_card_marks);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2291
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2292
    // ======== loop entry is here ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2293
    __ BIND(L_load_element);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2294
    __ load_heap_oop(rax_oop, from_element_addr); // load the oop
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2295
    __ testptr(rax_oop, rax_oop);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2296
    __ jcc(Assembler::zero, L_store_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2297
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2298
    __ load_klass(r11_klass, rax_oop);// query the object klass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2299
    generate_type_check(r11_klass, ckoff, ckval, L_store_element);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2300
    // ======== end loop ========
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2301
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2302
    // It was a real error; we must depend on the caller to finish the job.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2303
    // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2304
    // Emit GC store barriers for the oops we have copied (r14 + rdx),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2305
    // and report their number to the caller.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2306
    assert_different_registers(rax, r14_length, count, to, end_to, rcx);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2307
    __ lea(end_to, to_element_addr);
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  2308
    __ addptr(end_to, -heapOopSize);      // make an inclusive end pointer
1394
apetrusenko
parents: 1066 1388
diff changeset
  2309
    gen_write_ref_array_post_barrier(to, end_to, rscratch1);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2310
    __ movptr(rax, r14_length);           // original oops
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2311
    __ addptr(rax, count);                // K = (original - remaining) oops
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2312
    __ notptr(rax);                       // report (-1^K) to caller
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2313
    __ jmp(L_done);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2314
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2315
    // Come here on success only.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2316
    __ BIND(L_do_card_marks);
3262
30d1c247fc25 6700789: G1: Enable use of compressed oops with G1 heaps
ysr
parents: 2338
diff changeset
  2317
    __ addptr(end_to, -heapOopSize);         // make an inclusive end pointer
1394
apetrusenko
parents: 1066 1388
diff changeset
  2318
    gen_write_ref_array_post_barrier(to, end_to, rscratch1);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2319
    __ xorptr(rax, rax);                  // return 0 on success
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2320
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2321
    // Common exit point (success or failure).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2322
    __ BIND(L_done);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2323
    __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2324
    __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2325
    restore_arg_regs();
11194
ee1235a09fc3 7110489: C1: 64-bit tiered with ForceUnreachable: assert(reachable(src)) failed: Address should be reachable
never
parents: 11190
diff changeset
  2326
    inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2327
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2328
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2329
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2330
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2331
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2332
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2333
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2334
  //  Generate 'unsafe' array copy stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2335
  //  Though just as safe as the other stubs, it takes an unscaled
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2336
  //  size_t argument instead of an element count.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2337
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2338
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2339
  //    c_rarg0   - source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2340
  //    c_rarg1   - destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2341
  //    c_rarg2   - byte count, treated as ssize_t, can be zero
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2342
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2343
  // Examines the alignment of the operands and dispatches
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2344
  // to a long, int, short, or byte copy loop.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2345
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2346
  address generate_unsafe_copy(const char *name,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2347
                               address byte_copy_entry, address short_copy_entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2348
                               address int_copy_entry, address long_copy_entry) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2349
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2350
    Label L_long_aligned, L_int_aligned, L_short_aligned;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2351
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2352
    // Input registers (before setup_arg_regs)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2353
    const Register from        = c_rarg0;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2354
    const Register to          = c_rarg1;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2355
    const Register size        = c_rarg2;  // byte count (size_t)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2356
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2357
    // Register used as a temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2358
    const Register bits        = rax;      // test copy of low bits
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2359
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2360
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2361
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2362
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2363
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2364
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2365
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2366
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2367
    inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2368
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2369
    __ mov(bits, from);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2370
    __ orptr(bits, to);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2371
    __ orptr(bits, size);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2372
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2373
    __ testb(bits, BytesPerLong-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2374
    __ jccb(Assembler::zero, L_long_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2375
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2376
    __ testb(bits, BytesPerInt-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2377
    __ jccb(Assembler::zero, L_int_aligned);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2378
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2379
    __ testb(bits, BytesPerShort-1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2380
    __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2381
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2382
    __ BIND(L_short_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2383
    __ shrptr(size, LogBytesPerShort); // size => short_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2384
    __ jump(RuntimeAddress(short_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2385
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2386
    __ BIND(L_int_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2387
    __ shrptr(size, LogBytesPerInt); // size => int_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2388
    __ jump(RuntimeAddress(int_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2389
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2390
    __ BIND(L_long_aligned);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2391
    __ shrptr(size, LogBytesPerLong); // size => qword_count
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2392
    __ jump(RuntimeAddress(long_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2393
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2394
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2395
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2396
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2397
  // Perform range checks on the proposed arraycopy.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2398
  // Kills temp, but nothing else.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2399
  // Also, clean the sign bits of src_pos and dst_pos.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2400
  void arraycopy_range_checks(Register src,     // source array oop (c_rarg0)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2401
                              Register src_pos, // source position (c_rarg1)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2402
                              Register dst,     // destination array oo (c_rarg2)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2403
                              Register dst_pos, // destination position (c_rarg3)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2404
                              Register length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2405
                              Register temp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2406
                              Label& L_failed) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2407
    BLOCK_COMMENT("arraycopy_range_checks:");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2408
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2409
    //  if (src_pos + length > arrayOop(src)->length())  FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2410
    __ movl(temp, length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2411
    __ addl(temp, src_pos);             // src_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2412
    __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2413
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2414
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2415
    //  if (dst_pos + length > arrayOop(dst)->length())  FAIL;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2416
    __ movl(temp, length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2417
    __ addl(temp, dst_pos);             // dst_pos + length
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2418
    __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2419
    __ jcc(Assembler::above, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2420
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2421
    // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2422
    // Move with sign extension can be used since they are positive.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2423
    __ movslq(src_pos, src_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2424
    __ movslq(dst_pos, dst_pos);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2425
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2426
    BLOCK_COMMENT("arraycopy_range_checks done");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2427
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2428
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2429
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2430
  //  Generate generic array copy stubs
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2431
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2432
  //  Input:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2433
  //    c_rarg0    -  src oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2434
  //    c_rarg1    -  src_pos (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2435
  //    c_rarg2    -  dst oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2436
  //    c_rarg3    -  dst_pos (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2437
  // not Win64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2438
  //    c_rarg4    -  element count (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2439
  // Win64
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2440
  //    rsp+40     -  element count (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2441
  //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2442
  //  Output:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2443
  //    rax ==  0  -  success
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2444
  //    rax == -1^K - failure, where K is partial transfer count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2445
  //
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2446
  address generate_generic_copy(const char *name,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2447
                                address byte_copy_entry, address short_copy_entry,
8876
f82367de21f5 7026307: DEBUG MESSAGE: broken null klass on amd64
iveresov
parents: 8874
diff changeset
  2448
                                address int_copy_entry, address oop_copy_entry,
f82367de21f5 7026307: DEBUG MESSAGE: broken null klass on amd64
iveresov
parents: 8874
diff changeset
  2449
                                address long_copy_entry, address checkcast_copy_entry) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2450
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2451
    Label L_failed, L_failed_0, L_objArray;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2452
    Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2453
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2454
    // Input registers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2455
    const Register src        = c_rarg0;  // source array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2456
    const Register src_pos    = c_rarg1;  // source position
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2457
    const Register dst        = c_rarg2;  // destination array oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2458
    const Register dst_pos    = c_rarg3;  // destination position
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2459
#ifndef _WIN64
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2460
    const Register length     = c_rarg4;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2461
#else
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2462
    const Address  length(rsp, 6 * wordSize);  // elements count is on stack on Win64
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2463
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2464
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2465
    { int modulus = CodeEntryAlignment;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2466
      int target  = modulus - 5; // 5 = sizeof jmp(L_failed)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2467
      int advance = target - (__ offset() % modulus);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2468
      if (advance < 0)  advance += modulus;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2469
      if (advance > 0)  __ nop(advance);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2470
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2471
    StubCodeMark mark(this, "StubRoutines", name);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2472
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2473
    // Short-hop target to L_failed.  Makes for denser prologue code.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2474
    __ BIND(L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2475
    __ jmp(L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2476
    assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2477
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2478
    __ align(CodeEntryAlignment);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2479
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2480
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2481
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2482
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2483
    // bump this on entry, not on exit:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2484
    inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2485
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2486
    //-----------------------------------------------------------------------
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2487
    // Assembler stub will be used for this call to arraycopy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2488
    // if the following conditions are met:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2489
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2490
    // (1) src and dst must not be null.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2491
    // (2) src_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2492
    // (3) dst_pos must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2493
    // (4) length  must not be negative.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2494
    // (5) src klass and dst klass should be the same and not NULL.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2495
    // (6) src and dst should be arrays.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2496
    // (7) src_pos + length must not exceed length of src.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2497
    // (8) dst_pos + length must not exceed length of dst.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2498
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2499
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2500
    //  if (src == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2501
    __ testptr(src, src);         // src oop
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2502
    size_t j1off = __ offset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2503
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2504
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2505
    //  if (src_pos < 0) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2506
    __ testl(src_pos, src_pos); // src_pos (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2507
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2508
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2509
    //  if (dst == NULL) return -1;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2510
    __ testptr(dst, dst);         // dst oop
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2511
    __ jccb(Assembler::zero, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2512
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2513
    //  if (dst_pos < 0) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2514
    __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2515
    size_t j4off = __ offset();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2516
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2517
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2518
    // The first four tests are very dense code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2519
    // but not quite dense enough to put four
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2520
    // jumps in a 16-byte instruction fetch buffer.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2521
    // That's good, because some branch predicters
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2522
    // do not like jumps so close together.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2523
    // Make sure of this.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2524
    guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2525
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2526
    // registers used as temp
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2527
    const Register r11_length    = r11; // elements count to copy
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2528
    const Register r10_src_klass = r10; // array klass
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2529
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2530
    //  if (length < 0) return -1;
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2531
    __ movl(r11_length, length);        // length (elements count, 32-bits value)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2532
    __ testl(r11_length, r11_length);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2533
    __ jccb(Assembler::negative, L_failed_0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2534
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2535
    __ load_klass(r10_src_klass, src);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2536
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2537
    //  assert(src->klass() != NULL);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2538
    {
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2539
      BLOCK_COMMENT("assert klasses not null {");
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2540
      Label L1, L2;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2541
      __ testptr(r10_src_klass, r10_src_klass);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2542
      __ jcc(Assembler::notZero, L2);   // it is broken if klass is NULL
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2543
      __ bind(L1);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2544
      __ stop("broken null klass");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2545
      __ bind(L2);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2546
      __ load_klass(rax, dst);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2547
      __ cmpq(rax, 0);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2548
      __ jcc(Assembler::equal, L1);     // this would be broken also
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2549
      BLOCK_COMMENT("} assert klasses not null done");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2550
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2551
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2552
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2553
    // Load layout helper (32-bits)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2554
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2555
    //  |array_tag|     | header_size | element_type |     |log2_element_size|
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2556
    // 32        30    24            16              8     2                 0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2557
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2558
    //   array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2559
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2560
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 11194
diff changeset
  2561
    const int lh_offset = in_bytes(Klass::layout_helper_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2562
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2563
    // Handle objArrays completely differently...
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2564
    const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2565
    __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2566
    __ jcc(Assembler::equal, L_objArray);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2567
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2568
    //  if (src->klass() != dst->klass()) return -1;
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2569
    __ load_klass(rax, dst);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2570
    __ cmpq(r10_src_klass, rax);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2571
    __ jcc(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2572
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2573
    const Register rax_lh = rax;  // layout helper
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2574
    __ movl(rax_lh, Address(r10_src_klass, lh_offset));
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2575
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2576
    //  if (!src->is_Array()) return -1;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2577
    __ cmpl(rax_lh, Klass::_lh_neutral_value);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2578
    __ jcc(Assembler::greaterEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2579
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2580
    // At this point, it is known to be a typeArray (array_tag 0x3).
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2581
#ifdef ASSERT
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2582
    {
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2583
      BLOCK_COMMENT("assert primitive array {");
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2584
      Label L;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2585
      __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2586
      __ jcc(Assembler::greaterEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2587
      __ stop("must be a primitive array");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2588
      __ bind(L);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2589
      BLOCK_COMMENT("} assert primitive array done");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2590
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2591
#endif
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2592
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2593
    arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2594
                           r10, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2595
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  2596
    // TypeArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2597
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2598
    // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2599
    // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2600
    //
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2601
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2602
    const Register r10_offset = r10;    // array offset
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2603
    const Register rax_elsize = rax_lh; // element size
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2604
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2605
    __ movl(r10_offset, rax_lh);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2606
    __ shrl(r10_offset, Klass::_lh_header_size_shift);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2607
    __ andptr(r10_offset, Klass::_lh_header_size_mask);   // array_offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2608
    __ addptr(src, r10_offset);           // src array offset
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2609
    __ addptr(dst, r10_offset);           // dst array offset
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2610
    BLOCK_COMMENT("choose copy loop based on element size");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2611
    __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2612
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2613
    // next registers should be set before the jump to corresponding stub
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2614
    const Register from     = c_rarg0;  // source array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2615
    const Register to       = c_rarg1;  // destination array address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2616
    const Register count    = c_rarg2;  // elements count
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2617
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2618
    // 'from', 'to', 'count' registers should be set in such order
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2619
    // since they are the same as 'src', 'src_pos', 'dst'.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2620
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2621
  __ BIND(L_copy_bytes);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2622
    __ cmpl(rax_elsize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2623
    __ jccb(Assembler::notEqual, L_copy_shorts);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2624
    __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2625
    __ lea(to,   Address(dst, dst_pos, Address::times_1, 0));// dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2626
    __ movl2ptr(count, r11_length); // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2627
    __ jump(RuntimeAddress(byte_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2628
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2629
  __ BIND(L_copy_shorts);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2630
    __ cmpl(rax_elsize, LogBytesPerShort);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2631
    __ jccb(Assembler::notEqual, L_copy_ints);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2632
    __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2633
    __ lea(to,   Address(dst, dst_pos, Address::times_2, 0));// dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2634
    __ movl2ptr(count, r11_length); // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2635
    __ jump(RuntimeAddress(short_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2636
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2637
  __ BIND(L_copy_ints);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2638
    __ cmpl(rax_elsize, LogBytesPerInt);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2639
    __ jccb(Assembler::notEqual, L_copy_longs);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2640
    __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2641
    __ lea(to,   Address(dst, dst_pos, Address::times_4, 0));// dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2642
    __ movl2ptr(count, r11_length); // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2643
    __ jump(RuntimeAddress(int_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2644
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2645
  __ BIND(L_copy_longs);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2646
#ifdef ASSERT
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2647
    {
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2648
      BLOCK_COMMENT("assert long copy {");
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2649
      Label L;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2650
      __ cmpl(rax_elsize, LogBytesPerLong);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2651
      __ jcc(Assembler::equal, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2652
      __ stop("must be long copy, but elsize is wrong");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2653
      __ bind(L);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2654
      BLOCK_COMMENT("} assert long copy done");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2655
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2656
#endif
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2657
    __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2658
    __ lea(to,   Address(dst, dst_pos, Address::times_8, 0));// dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2659
    __ movl2ptr(count, r11_length); // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2660
    __ jump(RuntimeAddress(long_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2661
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  2662
    // ObjArrayKlass
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2663
  __ BIND(L_objArray);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2664
    // live at this point:  r10_src_klass, r11_length, src[_pos], dst[_pos]
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2665
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2666
    Label L_plain_copy, L_checkcast_copy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2667
    //  test array classes for subtyping
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2668
    __ load_klass(rax, dst);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2669
    __ cmpq(r10_src_klass, rax); // usual case is exact equality
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2670
    __ jcc(Assembler::notEqual, L_checkcast_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2671
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2672
    // Identically typed arrays can be copied without element-wise checks.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2673
    arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2674
                           r10, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2675
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2676
    __ lea(from, Address(src, src_pos, TIMES_OOP,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2677
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2678
    __ lea(to,   Address(dst, dst_pos, TIMES_OOP,
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2679
                 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2680
    __ movl2ptr(count, r11_length); // length
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2681
  __ BIND(L_plain_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2682
    __ jump(RuntimeAddress(oop_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2683
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2684
  __ BIND(L_checkcast_copy);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2685
    // live at this point:  r10_src_klass, r11_length, rax (dst_klass)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2686
    {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2687
      // Before looking at dst.length, make sure dst is also an objArray.
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2688
      __ cmpl(Address(rax, lh_offset), objArray_lh);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2689
      __ jcc(Assembler::notEqual, L_failed);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2690
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2691
      // It is safe to examine both src.length and dst.length.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2692
      arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2693
                             rax, L_failed);
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2694
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2695
      const Register r11_dst_klass = r11;
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2696
      __ load_klass(r11_dst_klass, dst); // reload
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2697
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2698
      // Marshal the base address arguments now, freeing registers.
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2699
      __ lea(from, Address(src, src_pos, TIMES_OOP,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2700
                   arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2701
      __ lea(to,   Address(dst, dst_pos, TIMES_OOP,
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2702
                   arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2703
      __ movl(count, length);           // length (reloaded)
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2704
      Register sco_temp = c_rarg3;      // this register is free now
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2705
      assert_different_registers(from, to, count, sco_temp,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2706
                                 r11_dst_klass, r10_src_klass);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2707
      assert_clean_int(count, sco_temp);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2708
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2709
      // Generate the type check.
11430
718fc06da49a 7118863: Move sizeof(klassOopDesc) into the *Klass::*_offset_in_bytes() functions
stefank
parents: 11194
diff changeset
  2710
      const int sco_offset = in_bytes(Klass::super_check_offset_offset());
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2711
      __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2712
      assert_clean_int(sco_temp, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2713
      generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2714
13952
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  2715
      // Fetch destination element klass from the ObjArrayKlass header.
e3cf184080bc 8000213: NPG: Should have renamed arrayKlass and typeArrayKlass
coleenp
parents: 13728
diff changeset
  2716
      int ek_offset = in_bytes(ObjArrayKlass::element_klass_offset());
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2717
      __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2718
      __ movl(  sco_temp,      Address(r11_dst_klass, sco_offset));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2719
      assert_clean_int(sco_temp, rax);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2720
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2721
      // the checkcast_copy loop needs two extra arguments:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2722
      assert(c_rarg3 == sco_temp, "#3 already in place");
7431
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2723
      // Set up arguments for checkcast_copy_entry.
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2724
      setup_arg_regs(4);
e9f07f8aef47 6998985: faulty generic arraycopy on windows x86_64: 4th arg overwritten with oop
twisti
parents: 7397
diff changeset
  2725
      __ movptr(r8, r11_dst_klass);  // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2726
      __ jump(RuntimeAddress(checkcast_copy_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2727
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2728
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2729
  __ BIND(L_failed);
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2730
    __ xorptr(rax, rax);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  2731
    __ notptr(rax); // return -1
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2732
    __ leave();   // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2733
    __ ret(0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2734
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2735
    return start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2736
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2737
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2738
  void generate_arraycopy_stubs() {
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2739
    address entry;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2740
    address entry_jbyte_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2741
    address entry_jshort_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2742
    address entry_jint_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2743
    address entry_oop_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2744
    address entry_jlong_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2745
    address entry_checkcast_arraycopy;
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2746
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2747
    StubRoutines::_jbyte_disjoint_arraycopy  = generate_disjoint_byte_copy(false, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2748
                                                                           "jbyte_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2749
    StubRoutines::_jbyte_arraycopy           = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2750
                                                                           "jbyte_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2751
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2752
    StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2753
                                                                            "jshort_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2754
    StubRoutines::_jshort_arraycopy          = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2755
                                                                            "jshort_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2756
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2757
    StubRoutines::_jint_disjoint_arraycopy   = generate_disjoint_int_oop_copy(false, false, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2758
                                                                              "jint_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2759
    StubRoutines::_jint_arraycopy            = generate_conjoint_int_oop_copy(false, false, entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2760
                                                                              &entry_jint_arraycopy, "jint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2761
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2762
    StubRoutines::_jlong_disjoint_arraycopy  = generate_disjoint_long_oop_copy(false, false, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2763
                                                                               "jlong_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2764
    StubRoutines::_jlong_arraycopy           = generate_conjoint_long_oop_copy(false, false, entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2765
                                                                               &entry_jlong_arraycopy, "jlong_arraycopy");
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2766
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2767
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2768
    if (UseCompressedOops) {
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2769
      StubRoutines::_oop_disjoint_arraycopy  = generate_disjoint_int_oop_copy(false, true, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2770
                                                                              "oop_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2771
      StubRoutines::_oop_arraycopy           = generate_conjoint_int_oop_copy(false, true, entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2772
                                                                              &entry_oop_arraycopy, "oop_arraycopy");
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2773
      StubRoutines::_oop_disjoint_arraycopy_uninit  = generate_disjoint_int_oop_copy(false, true, &entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2774
                                                                                     "oop_disjoint_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2775
                                                                                     /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2776
      StubRoutines::_oop_arraycopy_uninit           = generate_conjoint_int_oop_copy(false, true, entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2777
                                                                                     NULL, "oop_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2778
                                                                                     /*dest_uninitialized*/true);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2779
    } else {
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2780
      StubRoutines::_oop_disjoint_arraycopy  = generate_disjoint_long_oop_copy(false, true, &entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2781
                                                                               "oop_disjoint_arraycopy");
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2782
      StubRoutines::_oop_arraycopy           = generate_conjoint_long_oop_copy(false, true, entry,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2783
                                                                               &entry_oop_arraycopy, "oop_arraycopy");
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2784
      StubRoutines::_oop_disjoint_arraycopy_uninit  = generate_disjoint_long_oop_copy(false, true, &entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2785
                                                                                      "oop_disjoint_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2786
                                                                                      /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2787
      StubRoutines::_oop_arraycopy_uninit           = generate_conjoint_long_oop_copy(false, true, entry,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2788
                                                                                      NULL, "oop_arraycopy_uninit",
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2789
                                                                                      /*dest_uninitialized*/true);
360
21d113ecbf6a 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 189
diff changeset
  2790
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2791
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2792
    StubRoutines::_checkcast_arraycopy        = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2793
    StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2794
                                                                        /*dest_uninitialized*/true);
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2795
8487
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2796
    StubRoutines::_unsafe_arraycopy    = generate_unsafe_copy("unsafe_arraycopy",
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2797
                                                              entry_jbyte_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2798
                                                              entry_jshort_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2799
                                                              entry_jint_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2800
                                                              entry_jlong_arraycopy);
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2801
    StubRoutines::_generic_arraycopy   = generate_generic_copy("generic_arraycopy",
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2802
                                                               entry_jbyte_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2803
                                                               entry_jshort_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2804
                                                               entry_jint_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2805
                                                               entry_oop_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2806
                                                               entry_jlong_arraycopy,
bf96596f06d2 7020521: arraycopy stubs place prebarriers incorrectly
iveresov
parents: 7431
diff changeset
  2807
                                                               entry_checkcast_arraycopy);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2808
6433
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2809
    StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2810
    StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2811
    StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2812
    StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2813
    StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2814
    StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
b0e4fafdc38b 4809552: Optimize Arrays.fill(...)
never
parents: 5706
diff changeset
  2815
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2816
    // We don't generate specialized code for HeapWord-aligned source
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2817
    // arrays, so just use the code we've already generated
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2818
    StubRoutines::_arrayof_jbyte_disjoint_arraycopy  = StubRoutines::_jbyte_disjoint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2819
    StubRoutines::_arrayof_jbyte_arraycopy           = StubRoutines::_jbyte_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2820
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2821
    StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2822
    StubRoutines::_arrayof_jshort_arraycopy          = StubRoutines::_jshort_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2823
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2824
    StubRoutines::_arrayof_jint_disjoint_arraycopy   = StubRoutines::_jint_disjoint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2825
    StubRoutines::_arrayof_jint_arraycopy            = StubRoutines::_jint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2826
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2827
    StubRoutines::_arrayof_jlong_disjoint_arraycopy  = StubRoutines::_jlong_disjoint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2828
    StubRoutines::_arrayof_jlong_arraycopy           = StubRoutines::_jlong_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2829
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2830
    StubRoutines::_arrayof_oop_disjoint_arraycopy    = StubRoutines::_oop_disjoint_arraycopy;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2831
    StubRoutines::_arrayof_oop_arraycopy             = StubRoutines::_oop_arraycopy;
8498
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2832
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2833
    StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit    = StubRoutines::_oop_disjoint_arraycopy_uninit;
6398004126b9 6627983: G1: Bad oop deference during marking
iveresov
parents: 8487
diff changeset
  2834
    StubRoutines::_arrayof_oop_arraycopy_uninit             = StubRoutines::_oop_arraycopy_uninit;
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2835
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  2836
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2837
  void generate_math_stubs() {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2838
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2839
      StubCodeMark mark(this, "StubRoutines", "log");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2840
      StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2841
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2842
      __ subq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2843
      __ movdbl(Address(rsp, 0), xmm0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2844
      __ fld_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2845
      __ flog();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2846
      __ fstp_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2847
      __ movdbl(xmm0, Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2848
      __ addq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2849
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2850
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2851
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2852
      StubCodeMark mark(this, "StubRoutines", "log10");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2853
      StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2854
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2855
      __ subq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2856
      __ movdbl(Address(rsp, 0), xmm0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2857
      __ fld_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2858
      __ flog10();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2859
      __ fstp_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2860
      __ movdbl(xmm0, Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2861
      __ addq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2862
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2863
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2864
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2865
      StubCodeMark mark(this, "StubRoutines", "sin");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2866
      StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2867
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2868
      __ subq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2869
      __ movdbl(Address(rsp, 0), xmm0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2870
      __ fld_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2871
      __ trigfunc('s');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2872
      __ fstp_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2873
      __ movdbl(xmm0, Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2874
      __ addq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2875
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2876
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2877
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2878
      StubCodeMark mark(this, "StubRoutines", "cos");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2879
      StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2880
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2881
      __ subq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2882
      __ movdbl(Address(rsp, 0), xmm0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2883
      __ fld_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2884
      __ trigfunc('c');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2885
      __ fstp_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2886
      __ movdbl(xmm0, Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2887
      __ addq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2888
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2889
    }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2890
    {
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2891
      StubCodeMark mark(this, "StubRoutines", "tan");
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2892
      StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2893
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2894
      __ subq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2895
      __ movdbl(Address(rsp, 0), xmm0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2896
      __ fld_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2897
      __ trigfunc('t');
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2898
      __ fstp_d(Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2899
      __ movdbl(xmm0, Address(rsp, 0));
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2900
      __ addq(rsp, 8);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2901
      __ ret(0);
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2902
    }
12739
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2903
    {
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2904
      StubCodeMark mark(this, "StubRoutines", "exp");
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2905
      StubRoutines::_intrinsic_exp = (double (*)(double)) __ pc();
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2906
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2907
      __ subq(rsp, 8);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2908
      __ movdbl(Address(rsp, 0), xmm0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2909
      __ fld_d(Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2910
      __ exp_with_fallback(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2911
      __ fstp_d(Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2912
      __ movdbl(xmm0, Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2913
      __ addq(rsp, 8);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2914
      __ ret(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2915
    }
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2916
    {
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2917
      StubCodeMark mark(this, "StubRoutines", "pow");
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2918
      StubRoutines::_intrinsic_pow = (double (*)(double,double)) __ pc();
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2919
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2920
      __ subq(rsp, 8);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2921
      __ movdbl(Address(rsp, 0), xmm1);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2922
      __ fld_d(Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2923
      __ movdbl(Address(rsp, 0), xmm0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2924
      __ fld_d(Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2925
      __ pow_with_fallback(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2926
      __ fstp_d(Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2927
      __ movdbl(xmm0, Address(rsp, 0));
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2928
      __ addq(rsp, 8);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2929
      __ ret(0);
09f26b73ae66 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 11961
diff changeset
  2930
    }
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2931
  }
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  2932
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2933
  // AES intrinsic stubs
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2934
  enum {AESBlockSize = 16};
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2935
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2936
  address generate_key_shuffle_mask() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2937
    __ align(16);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2938
    StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2939
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2940
    __ emit_data64( 0x0405060700010203, relocInfo::none );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2941
    __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2942
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2943
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2944
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2945
  // Utility routine for loading a 128-bit key word in little endian format
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2946
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2947
  void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2948
    __ movdqu(xmmdst, Address(key, offset));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2949
    if (xmm_shuf_mask != NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2950
      __ pshufb(xmmdst, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2951
    } else {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2952
      __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2953
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2954
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2955
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2956
  // aesenc using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2957
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2958
  void aes_enc_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2959
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2960
    __ aesenc(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2961
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2962
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2963
  // aesdec using specified key+offset
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2964
  // can optionally specify that the shuffle mask is already in an xmmregister
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2965
  void aes_dec_key(XMMRegister xmmdst, XMMRegister xmmtmp, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2966
    load_key(xmmtmp, key, offset, xmm_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2967
    __ aesdec(xmmdst, xmmtmp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2968
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2969
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2970
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2971
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2972
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2973
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2974
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2975
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2976
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2977
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2978
  address generate_aescrypt_encryptBlock() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2979
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2980
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2981
    StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2982
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2983
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2984
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2985
    const Register from        = c_rarg0;  // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2986
    const Register to          = c_rarg1;  // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2987
    const Register key         = c_rarg2;  // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2988
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2989
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2990
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2991
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2992
    const XMMRegister xmm_key_shuf_mask = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2993
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2994
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2995
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2996
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2997
    // keylen = # of 32-bit words, convert to 128-bit words
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2998
    __ shrl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  2999
    __ subl(keylen, 11);   // every key has at least 11 128-bit words, some have more
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3000
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3001
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3002
    __ movdqu(xmm_result, Address(from, 0));  // get 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3003
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3004
    // For encryption, the java expanded key ordering is just what we need
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3005
    // we don't know if the key is aligned, hence not using load-execute form
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3006
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3007
    load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3008
    __ pxor(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3009
    for (int offset = 0x10; offset <= 0x90; offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3010
      aes_enc_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3011
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3012
    load_key  (xmm_temp, key, 0xa0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3013
    __ cmpl(keylen, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3014
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3015
    __ aesenc(xmm_result, xmm_temp);                   // only in 192 and 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3016
    aes_enc_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3017
    load_key(xmm_temp, key, 0xc0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3018
    __ subl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3019
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3020
    __ aesenc(xmm_result, xmm_temp);                   // only in 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3021
    aes_enc_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3022
    load_key(xmm_temp, key, 0xe0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3023
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3024
    __ BIND(L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3025
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3026
    __ movdqu(Address(to, 0), xmm_result);        // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3027
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3028
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3029
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3030
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3031
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3032
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3033
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3034
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3035
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3036
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3037
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3038
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3039
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3040
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3041
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3042
  address generate_aescrypt_decryptBlock() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3043
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3044
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3045
    StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3046
    Label L_doLast;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3047
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3048
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3049
    const Register from        = c_rarg0;  // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3050
    const Register to          = c_rarg1;  // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3051
    const Register key         = c_rarg2;  // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3052
    const Register keylen      = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3053
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3054
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3055
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3056
    const XMMRegister xmm_key_shuf_mask = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3057
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3058
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3059
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3060
    __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3061
    // keylen = # of 32-bit words, convert to 128-bit words
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3062
    __ shrl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3063
    __ subl(keylen, 11);   // every key has at least 11 128-bit words, some have more
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3064
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3065
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3066
    __ movdqu(xmm_result, Address(from, 0));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3067
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3068
    // for decryption java expanded key ordering is rotated one position from what we want
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3069
    // so we start from 0x10 here and hit 0x00 last
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3070
    // we don't know if the key is aligned, hence not using load-execute form
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3071
    load_key(xmm_temp, key, 0x10, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3072
    __ pxor  (xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3073
    for (int offset = 0x20; offset <= 0xa0; offset += 0x10) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3074
      aes_dec_key(xmm_result, xmm_temp, key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3075
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3076
    __ cmpl(keylen, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3077
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3078
    // only in 192 and 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3079
    aes_dec_key(xmm_result, xmm_temp, key, 0xb0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3080
    aes_dec_key(xmm_result, xmm_temp, key, 0xc0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3081
    __ subl(keylen, 2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3082
    __ jcc(Assembler::equal, L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3083
    // only in 256 bit keys
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3084
    aes_dec_key(xmm_result, xmm_temp, key, 0xd0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3085
    aes_dec_key(xmm_result, xmm_temp, key, 0xe0, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3086
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3087
    __ BIND(L_doLast);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3088
    // for decryption the aesdeclast operation is always on key+0x00
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3089
    load_key(xmm_temp, key, 0x00, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3090
    __ aesdeclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3091
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3092
    __ movdqu(Address(to, 0), xmm_result);  // store the result
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3093
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3094
    __ xorptr(rax, rax); // return 0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3095
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3096
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3097
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3098
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3099
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3100
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3101
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3102
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3103
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3104
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3105
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3106
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3107
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3108
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3109
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3110
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3111
  address generate_cipherBlockChaining_encryptAESCrypt() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3112
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3113
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3114
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3115
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3116
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3117
    Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3118
    const Register from        = c_rarg0;  // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3119
    const Register to          = c_rarg1;  // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3120
    const Register key         = c_rarg2;  // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3121
    const Register rvec        = c_rarg3;  // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3122
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3123
#ifndef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3124
    const Register len_reg     = c_rarg4;  // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3125
#else
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3126
    const Address  len_mem(rsp, 6 * wordSize);  // length is on stack on Win64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3127
    const Register len_reg     = r10;      // pick the first volatile windows register
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3128
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3129
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3130
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3131
    // xmm register assignments for the loops below
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3132
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3133
    const XMMRegister xmm_temp   = xmm1;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3134
    // keys 0-10 preloaded into xmm2-xmm12
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3135
    const int XMM_REG_NUM_KEY_FIRST = 2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3136
    const int XMM_REG_NUM_KEY_LAST  = 12;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3137
    const XMMRegister xmm_key0   = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3138
    const XMMRegister xmm_key10  = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3139
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3140
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3141
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3142
#ifdef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3143
    // on win64, fill len_reg from stack position
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3144
    __ movl(len_reg, len_mem);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3145
    // save the xmm registers which must be preserved 6-12
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3146
    __ subptr(rsp, -rsp_after_call_off * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3147
    for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3148
      __ movdqu(xmm_save(i), as_XMMRegister(i));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3149
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3150
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3151
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3152
    const XMMRegister xmm_key_shuf_mask = xmm_temp;  // used temporarily to swap key bytes up front
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3153
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3154
    // load up xmm regs 2 thru 12 with key 0x00 - 0xa0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3155
    for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3156
      load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3157
      offset += 0x10;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3158
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3159
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3160
    __ movdqu(xmm_result, Address(rvec, 0x00));   // initialize xmm_result with r vec
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3161
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3162
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3163
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3164
    __ cmpl(rax, 44);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3165
    __ jcc(Assembler::notEqual, L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3166
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3167
    // 128 bit code follows here
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3168
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3169
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3170
    __ BIND(L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3171
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3172
    __ pxor  (xmm_result, xmm_temp);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3173
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3174
    __ pxor  (xmm_result, xmm_key0);               // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3175
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3176
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3177
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3178
    __ aesenclast(xmm_result, xmm_key10);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3179
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3180
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3181
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3182
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3183
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3184
    __ jcc(Assembler::notEqual, L_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3185
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3186
    __ BIND(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3187
    __ movdqu(Address(rvec, 0), xmm_result);     // final value of r stored in rvec of CipherBlockChaining object
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3188
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3189
#ifdef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3190
    // restore xmm regs belonging to calling function
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3191
    for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3192
      __ movdqu(as_XMMRegister(i), xmm_save(i));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3193
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3194
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3195
    __ movl(rax, 0); // return 0 (why?)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3196
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3197
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3198
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3199
    __ BIND(L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3200
    // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3201
    __ cmpl(rax, 52);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3202
    __ jcc(Assembler::notEqual, L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3203
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3204
    // 192-bit code follows here (could be changed to use more xmm registers)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3205
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3206
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3207
    __ BIND(L_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3208
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3209
    __ pxor  (xmm_result, xmm_temp);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3210
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3211
    __ pxor  (xmm_result, xmm_key0);               // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3212
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3213
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3214
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3215
    aes_enc_key(xmm_result, xmm_temp, key, 0xb0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3216
    load_key(xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3217
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3218
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3219
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3220
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3221
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3222
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3223
    __ jcc(Assembler::notEqual, L_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3224
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3225
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3226
    __ BIND(L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3227
    // 256-bit code follows here (could be changed to use more xmm registers)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3228
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3229
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3230
    __ BIND(L_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3231
    __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3232
    __ pxor  (xmm_result, xmm_temp);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3233
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3234
    __ pxor  (xmm_result, xmm_key0);               // do the aes rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3235
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3236
      __ aesenc(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3237
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3238
    aes_enc_key(xmm_result, xmm_temp, key, 0xb0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3239
    aes_enc_key(xmm_result, xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3240
    aes_enc_key(xmm_result, xmm_temp, key, 0xd0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3241
    load_key(xmm_temp, key, 0xe0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3242
    __ aesenclast(xmm_result, xmm_temp);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3243
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3244
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3245
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3246
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3247
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3248
    __ jcc(Assembler::notEqual, L_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3249
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3250
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3251
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3252
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3253
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3254
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3255
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3256
  // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3257
  // to hide instruction latency
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3258
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3259
  // Arguments:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3260
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3261
  // Inputs:
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3262
  //   c_rarg0   - source byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3263
  //   c_rarg1   - destination byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3264
  //   c_rarg2   - K (key) in little endian int array
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3265
  //   c_rarg3   - r vector byte array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3266
  //   c_rarg4   - input length
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3267
  //
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3268
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3269
  address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3270
    assert(UseAES && (UseAVX > 0), "need AES instructions and misaligned SSE support");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3271
    __ align(CodeEntryAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3272
    StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3273
    address start = __ pc();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3274
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3275
    Label L_exit, L_key_192_256, L_key_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3276
    Label L_singleBlock_loopTop_128, L_multiBlock_loopTop_128;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3277
    Label L_singleBlock_loopTop_192, L_singleBlock_loopTop_256;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3278
    const Register from        = c_rarg0;  // source array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3279
    const Register to          = c_rarg1;  // destination array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3280
    const Register key         = c_rarg2;  // key array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3281
    const Register rvec        = c_rarg3;  // r byte array initialized from initvector array address
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3282
                                           // and left with the results of the last encryption block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3283
#ifndef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3284
    const Register len_reg     = c_rarg4;  // src len (must be multiple of blocksize 16)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3285
#else
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3286
    const Address  len_mem(rsp, 6 * wordSize);  // length is on stack on Win64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3287
    const Register len_reg     = r10;      // pick the first volatile windows register
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3288
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3289
    const Register pos         = rax;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3290
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3291
    // xmm register assignments for the loops below
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3292
    const XMMRegister xmm_result = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3293
    // keys 0-10 preloaded into xmm2-xmm12
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3294
    const int XMM_REG_NUM_KEY_FIRST = 5;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3295
    const int XMM_REG_NUM_KEY_LAST  = 15;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3296
    const XMMRegister xmm_key_first   = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3297
    const XMMRegister xmm_key_last  = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3298
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3299
    __ enter(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3300
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3301
#ifdef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3302
    // on win64, fill len_reg from stack position
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3303
    __ movl(len_reg, len_mem);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3304
    // save the xmm registers which must be preserved 6-15
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3305
    __ subptr(rsp, -rsp_after_call_off * wordSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3306
    for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3307
      __ movdqu(xmm_save(i), as_XMMRegister(i));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3308
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3309
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3310
    // the java expanded key ordering is rotated one position from what we want
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3311
    // so we start from 0x10 here and hit 0x00 last
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3312
    const XMMRegister xmm_key_shuf_mask = xmm1;  // used temporarily to swap key bytes up front
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3313
    __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3314
    // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3315
    for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum <= XMM_REG_NUM_KEY_LAST; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3316
      if (rnum == XMM_REG_NUM_KEY_LAST) offset = 0x00;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3317
      load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3318
      offset += 0x10;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3319
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3320
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3321
    const XMMRegister xmm_prev_block_cipher = xmm1;  // holds cipher of previous block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3322
    // registers holding the four results in the parallelized loop
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3323
    const XMMRegister xmm_result0 = xmm0;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3324
    const XMMRegister xmm_result1 = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3325
    const XMMRegister xmm_result2 = xmm3;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3326
    const XMMRegister xmm_result3 = xmm4;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3327
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3328
    __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00));   // initialize with initial rvec
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3329
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3330
    // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3331
    __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3332
    __ cmpl(rax, 44);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3333
    __ jcc(Assembler::notEqual, L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3334
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3335
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3336
    // 128-bit code follows here, parallelized
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3337
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3338
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3339
    __ BIND(L_multiBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3340
    __ cmpptr(len_reg, 4*AESBlockSize);           // see if at least 4 blocks left
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3341
    __ jcc(Assembler::less, L_singleBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3342
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3343
    __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0*AESBlockSize));   // get next 4 blocks into xmmresult registers
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3344
    __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3345
    __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3346
    __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3347
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3348
#define DoFour(opc, src_reg)                    \
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3349
    __ opc(xmm_result0, src_reg);               \
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3350
    __ opc(xmm_result1, src_reg);               \
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3351
    __ opc(xmm_result2, src_reg);               \
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3352
    __ opc(xmm_result3, src_reg);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3353
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3354
    DoFour(pxor, xmm_key_first);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3355
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3356
      DoFour(aesdec, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3357
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3358
    DoFour(aesdeclast, xmm_key_last);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3359
    // for each result, xor with the r vector of previous cipher block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3360
    __ pxor(xmm_result0, xmm_prev_block_cipher);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3361
    __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3362
    __ pxor(xmm_result1, xmm_prev_block_cipher);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3363
    __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3364
    __ pxor(xmm_result2, xmm_prev_block_cipher);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3365
    __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2*AESBlockSize));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3366
    __ pxor(xmm_result3, xmm_prev_block_cipher);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3367
    __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3*AESBlockSize));   // this will carry over to next set of blocks
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3368
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3369
    __ movdqu(Address(to, pos, Address::times_1, 0*AESBlockSize), xmm_result0);     // store 4 results into the next 64 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3370
    __ movdqu(Address(to, pos, Address::times_1, 1*AESBlockSize), xmm_result1);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3371
    __ movdqu(Address(to, pos, Address::times_1, 2*AESBlockSize), xmm_result2);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3372
    __ movdqu(Address(to, pos, Address::times_1, 3*AESBlockSize), xmm_result3);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3373
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3374
    __ addptr(pos, 4*AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3375
    __ subptr(len_reg, 4*AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3376
    __ jmp(L_multiBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3377
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3378
    // registers used in the non-parallelized loops
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3379
    const XMMRegister xmm_prev_block_cipher_save = xmm2;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3380
    const XMMRegister xmm_temp   = xmm3;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3381
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3382
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3383
    __ BIND(L_singleBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3384
    __ cmpptr(len_reg, 0);           // any blocks left??
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3385
    __ jcc(Assembler::equal, L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3386
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3387
    __ movdqa(xmm_prev_block_cipher_save, xmm_result);              // save for next r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3388
    __ pxor  (xmm_result, xmm_key_first);               // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3389
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum  <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3390
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3391
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3392
    __ aesdeclast(xmm_result, xmm_key_last);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3393
    __ pxor  (xmm_result, xmm_prev_block_cipher);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3394
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3395
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3396
    __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save);              // set up next r vector with cipher input from this block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3397
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3398
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3399
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3400
    __ jmp(L_singleBlock_loopTop_128);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3401
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3402
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3403
    __ BIND(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3404
    __ movdqu(Address(rvec, 0), xmm_prev_block_cipher);     // final value of r stored in rvec of CipherBlockChaining object
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3405
#ifdef _WIN64
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3406
    // restore regs belonging to calling function
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3407
    for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3408
      __ movdqu(as_XMMRegister(i), xmm_save(i));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3409
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3410
#endif
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3411
    __ movl(rax, 0); // return 0 (why?)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3412
    __ leave(); // required for proper stackwalking of RuntimeStub frame
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3413
    __ ret(0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3414
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3415
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3416
    __ BIND(L_key_192_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3417
    // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3418
    __ cmpl(rax, 52);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3419
    __ jcc(Assembler::notEqual, L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3420
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3421
    // 192-bit code follows here (could be optimized to use parallelism)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3422
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3423
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3424
    __ BIND(L_singleBlock_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3425
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3426
    __ movdqa(xmm_prev_block_cipher_save, xmm_result);              // save for next r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3427
    __ pxor  (xmm_result, xmm_key_first);               // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3428
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3429
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3430
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3431
    aes_dec_key(xmm_result, xmm_temp, key, 0xb0);     // 192-bit key goes up to c0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3432
    aes_dec_key(xmm_result, xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3433
    __ aesdeclast(xmm_result, xmm_key_last);                    // xmm15 always came from key+0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3434
    __ pxor  (xmm_result, xmm_prev_block_cipher);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3435
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3436
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3437
    __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save);              // set up next r vector with cipher input from this block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3438
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3439
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3440
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3441
    __ jcc(Assembler::notEqual,L_singleBlock_loopTop_192);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3442
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3443
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3444
    __ BIND(L_key_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3445
    // 256-bit code follows here (could be optimized to use parallelism)
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3446
    __ movptr(pos, 0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3447
    __ align(OptoLoopAlignment);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3448
    __ BIND(L_singleBlock_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3449
    __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0));   // get next 16 bytes of cipher input
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3450
    __ movdqa(xmm_prev_block_cipher_save, xmm_result);              // save for next r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3451
    __ pxor  (xmm_result, xmm_key_first);               // do the aes dec rounds
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3452
    for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3453
      __ aesdec(xmm_result, as_XMMRegister(rnum));
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3454
    }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3455
    aes_dec_key(xmm_result, xmm_temp, key, 0xb0);     // 256-bit key goes up to e0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3456
    aes_dec_key(xmm_result, xmm_temp, key, 0xc0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3457
    aes_dec_key(xmm_result, xmm_temp, key, 0xd0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3458
    aes_dec_key(xmm_result, xmm_temp, key, 0xe0);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3459
    __ aesdeclast(xmm_result, xmm_key_last);             // xmm15 came from key+0
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3460
    __ pxor  (xmm_result, xmm_prev_block_cipher);               // xor with the current r vector
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3461
    __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result);     // store into the next 16 bytes of output
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3462
    // no need to store r to memory until we exit
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3463
    __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save);              // set up next r vector with cipher input from this block
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3464
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3465
    __ addptr(pos, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3466
    __ subptr(len_reg, AESBlockSize);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3467
    __ jcc(Assembler::notEqual,L_singleBlock_loopTop_256);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3468
    __ jmp(L_exit);
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3469
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3470
    return start;
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3471
  }
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3472
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3473
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3474
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3475
#undef __
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3476
#define __ masm->
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3477
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3478
  // Continuation point for throwing of implicit exceptions that are
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3479
  // not handled in the current activation. Fabricates an exception
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3480
  // oop and initiates normal exception dispatching in this
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3481
  // frame. Since we need to preserve callee-saved values (currently
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3482
  // only for C2, but done for C1 as well) we need a callee-saved oop
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3483
  // map and therefore have to make these stubs into RuntimeStubs
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3484
  // rather than BufferBlobs.  If the compiler needs all registers to
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3485
  // be preserved between the fault point and the exception handler
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3486
  // then it must assume responsibility for that in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3487
  // AbstractCompiler::continuation_for_implicit_null_exception or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3488
  // continuation_for_implicit_division_by_zero_exception. All other
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3489
  // implicit exceptions (e.g., NullPointerException or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3490
  // AbstractMethodError on entry) are either at call sites or
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3491
  // otherwise assume that stack unwinding will be initiated, so
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3492
  // caller saved registers were assumed volatile in the compiler.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3493
  address generate_throw_exception(const char* name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3494
                                   address runtime_entry,
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3495
                                   Register arg1 = noreg,
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3496
                                   Register arg2 = noreg) {
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3497
    // Information about frame layout at time of blocking runtime call.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3498
    // Note that we only have to preserve callee-saved registers since
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3499
    // the compilers are responsible for supplying a continuation point
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3500
    // if they expect all registers to be preserved.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3501
    enum layout {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3502
      rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3503
      rbp_off2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3504
      return_off,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3505
      return_off2,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3506
      framesize // inclusive of return address
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3507
    };
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3508
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3509
    int insts_size = 512;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3510
    int locs_size  = 64;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3511
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3512
    CodeBuffer code(name, insts_size, locs_size);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3513
    OopMapSet* oop_maps  = new OopMapSet();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3514
    MacroAssembler* masm = new MacroAssembler(&code);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3515
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3516
    address start = __ pc();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3517
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3518
    // This is an inlined and slightly modified version of call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3519
    // which has the ability to fetch the return PC out of
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3520
    // thread-local storage and also sets up last_Java_sp slightly
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3521
    // differently than the real call_VM
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3522
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3523
    __ enter(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3524
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3525
    assert(is_even(framesize/2), "sp not 16-byte aligned");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3526
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3527
    // return address and rbp are already in place
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3528
    __ subptr(rsp, (framesize-4) << LogBytesPerInt); // prolog
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3529
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3530
    int frame_complete = __ pc() - start;
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3531
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3532
    // Set up last_Java_sp and last_Java_fp
11725
49d1e1f1421f 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 11439
diff changeset
  3533
    address the_pc = __ pc();
49d1e1f1421f 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 11439
diff changeset
  3534
    __ set_last_Java_frame(rsp, rbp, the_pc);
49d1e1f1421f 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 11439
diff changeset
  3535
    __ andptr(rsp, -(StackAlignmentInBytes));    // Align stack
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3536
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3537
    // Call runtime
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3538
    if (arg1 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3539
      assert(arg2 != c_rarg1, "clobbered");
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3540
      __ movptr(c_rarg1, arg1);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3541
    }
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3542
    if (arg2 != noreg) {
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3543
      __ movptr(c_rarg2, arg2);
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3544
    }
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3545
    __ movptr(c_rarg0, r15_thread);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3546
    BLOCK_COMMENT("call runtime_entry");
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3547
    __ call(RuntimeAddress(runtime_entry));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3548
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3549
    // Generate oop map
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3550
    OopMap* map = new OopMap(framesize, 0);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3551
11785
10f778832544 7144405: JumbleGC002 assert(m->offset() == pc_offset) failed: oopmap not found
roland
parents: 11725
diff changeset
  3552
    oop_maps->add_gc_map(the_pc - start, map);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3553
11725
49d1e1f1421f 7119286: JSR292: SIGSEGV in JNIHandleBlock::release_block(JNIHandleBlock*, Thread*)+0x3c
roland
parents: 11439
diff changeset
  3554
    __ reset_last_Java_frame(true, true);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3555
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3556
    __ leave(); // required for proper stackwalking of RuntimeStub frame
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3557
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3558
    // check for pending exceptions
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3559
#ifdef ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3560
    Label L;
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3561
    __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()),
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3562
            (int32_t) NULL_WORD);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3563
    __ jcc(Assembler::notEqual, L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3564
    __ should_not_reach_here();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3565
    __ bind(L);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3566
#endif // ASSERT
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3567
    __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3568
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3569
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3570
    // codeBlob framesize is in words (not VMRegImpl::slot_size)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3571
    RuntimeStub* stub =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3572
      RuntimeStub::new_runtime_stub(name,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3573
                                    &code,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3574
                                    frame_complete,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3575
                                    (framesize >> (LogBytesPerWord - LogBytesPerInt)),
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3576
                                    oop_maps, false);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3577
    return stub->entry_point();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3578
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3579
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3580
  // Initialization
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3581
  void generate_initial() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3582
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3583
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3584
    // This platform-specific stub is needed by generate_call_stub()
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3585
    StubRoutines::x86::_mxcsr_std        = generate_fp_mask("mxcsr_std",        0x0000000000001F80);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3586
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3587
    // entry points that exist in all platforms Note: This is code
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3588
    // that could be shared among different platforms - however the
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3589
    // benefit seems to be smaller than the disadvantage of having a
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3590
    // much more complicated generator structure. See also comment in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3591
    // stubRoutines.hpp.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3592
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3593
    StubRoutines::_forward_exception_entry = generate_forward_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3594
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3595
    StubRoutines::_call_stub_entry =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3596
      generate_call_stub(StubRoutines::_call_stub_return_address);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3597
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3598
    // is referenced by megamorphic call
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3599
    StubRoutines::_catch_exception_entry = generate_catch_exception();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3600
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3601
    // atomic calls
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3602
    StubRoutines::_atomic_xchg_entry         = generate_atomic_xchg();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3603
    StubRoutines::_atomic_xchg_ptr_entry     = generate_atomic_xchg_ptr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3604
    StubRoutines::_atomic_cmpxchg_entry      = generate_atomic_cmpxchg();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3605
    StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3606
    StubRoutines::_atomic_add_entry          = generate_atomic_add();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3607
    StubRoutines::_atomic_add_ptr_entry      = generate_atomic_add_ptr();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3608
    StubRoutines::_fence_entry               = generate_orderaccess_fence();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3609
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3610
    StubRoutines::_handler_for_unsafe_access_entry =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3611
      generate_handler_for_unsafe_access();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3612
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3613
    // platform dependent
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3614
    StubRoutines::x86::_get_previous_fp_entry = generate_get_previous_fp();
11961
0abd4cd26e5a 7147740: add assertions to check stack alignment on VM entry from generated code (x64)
roland
parents: 11785
diff changeset
  3615
    StubRoutines::x86::_get_previous_sp_entry = generate_get_previous_sp();
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3616
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3617
    StubRoutines::x86::_verify_mxcsr_entry    = generate_verify_mxcsr();
10004
190e88f7edd1 7055355: JSR 292: crash while throwing WrongMethodTypeException
never
parents: 8876
diff changeset
  3618
11411
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3619
    // Build this early so it's available for the interpreter.
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3620
    StubRoutines::_throw_StackOverflowError_entry =
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3621
      generate_throw_exception("StackOverflowError throw_exception",
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3622
                               CAST_FROM_FN_PTR(address,
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3623
                                                SharedRuntime::
16b151e1e088 7116216: StackOverflow GC crash
bdelsart
parents: 11194
diff changeset
  3624
                                                throw_StackOverflowError));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3625
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3626
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3627
  void generate_all() {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3628
    // Generates all stubs and initializes the entry points
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3629
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3630
    // These entry points require SharedInfo::stack0 to be set up in
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3631
    // non-core builds and need to be relocatable, so they each
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3632
    // fabricate a RuntimeStub internally.
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3633
    StubRoutines::_throw_AbstractMethodError_entry =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3634
      generate_throw_exception("AbstractMethodError throw_exception",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3635
                               CAST_FROM_FN_PTR(address,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3636
                                                SharedRuntime::
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3637
                                                throw_AbstractMethodError));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3638
189
4248c8e21063 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 1
diff changeset
  3639
    StubRoutines::_throw_IncompatibleClassChangeError_entry =
4248c8e21063 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 1
diff changeset
  3640
      generate_throw_exception("IncompatibleClassChangeError throw_exception",
4248c8e21063 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 1
diff changeset
  3641
                               CAST_FROM_FN_PTR(address,
4248c8e21063 6664627: Merge changes made only in hotspot 11 forward to jdk 7
dcubed
parents: 1
diff changeset
  3642
                                                SharedRuntime::
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3643
                                                throw_IncompatibleClassChangeError));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3644
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3645
    StubRoutines::_throw_NullPointerException_at_call_entry =
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3646
      generate_throw_exception("NullPointerException at call throw_exception",
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3647
                               CAST_FROM_FN_PTR(address,
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3648
                                                SharedRuntime::
10545
fec876499aae 7088020: SEGV in JNIHandleBlock::release_block
never
parents: 10004
diff changeset
  3649
                                                throw_NullPointerException_at_call));
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3650
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3651
    // entry points that are platform specific
1066
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3652
    StubRoutines::x86::_f2i_fixup = generate_f2i_fixup();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3653
    StubRoutines::x86::_f2l_fixup = generate_f2l_fixup();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3654
    StubRoutines::x86::_d2i_fixup = generate_d2i_fixup();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3655
    StubRoutines::x86::_d2l_fixup = generate_d2l_fixup();
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3656
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3657
    StubRoutines::x86::_float_sign_mask  = generate_fp_mask("float_sign_mask",  0x7FFFFFFF7FFFFFFF);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3658
    StubRoutines::x86::_float_sign_flip  = generate_fp_mask("float_sign_flip",  0x8000000080000000);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3659
    StubRoutines::x86::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
717c3345024f 5108146: Merge i486 and amd64 cpu directories
never
parents: 957
diff changeset
  3660
    StubRoutines::x86::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3661
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3662
    // support for verify_oop (must happen after universe_init)
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3663
    StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3664
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3665
    // arraycopy stubs used by compilers
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3666
    generate_arraycopy_stubs();
4478
c3a8af0fc6b0 6829192: JSR 292 needs to support 64-bit x86
twisti
parents: 3262
diff changeset
  3667
4645
0c5f5b94e93a 6849984: Value methods for platform dependent math functions constant fold incorrectly
never
parents: 4478
diff changeset
  3668
    generate_math_stubs();
14132
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3669
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3670
    // don't bother generating these AES intrinsic stubs unless global flag is set
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3671
    if (UseAESIntrinsics) {
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3672
      StubRoutines::x86::_key_shuffle_mask_addr = generate_key_shuffle_mask();  // needed by the others
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3673
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3674
      StubRoutines::_aescrypt_encryptBlock = generate_aescrypt_encryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3675
      StubRoutines::_aescrypt_decryptBlock = generate_aescrypt_decryptBlock();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3676
      StubRoutines::_cipherBlockChaining_encryptAESCrypt = generate_cipherBlockChaining_encryptAESCrypt();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3677
      StubRoutines::_cipherBlockChaining_decryptAESCrypt = generate_cipherBlockChaining_decryptAESCrypt_Parallel();
3c1437abcefd 7184394: add intrinsics to use AES instructions
kvn
parents: 13952
diff changeset
  3678
    }
1
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3679
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3680
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3681
 public:
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3682
  StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3683
    if (all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3684
      generate_all();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3685
    } else {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3686
      generate_initial();
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3687
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3688
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3689
}; // end class declaration
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3690
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3691
void StubGenerator_generate(CodeBuffer* code, bool all) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3692
  StubGenerator g(code, all);
489c9b5090e2 Initial load
duke
parents:
diff changeset
  3693
}