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/*
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* Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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// Portions of code courtesy of Clifford Click
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#include "incls/_precompiled.incl"
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#include "incls/_mulnode.cpp.incl"
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//=============================================================================
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//------------------------------hash-------------------------------------------
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// Hash function over MulNodes. Needs to be commutative; i.e., I swap
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// (commute) inputs to MulNodes willy-nilly so the hash function must return
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// the same value in the presence of edge swapping.
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uint MulNode::hash() const {
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return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
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}
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//------------------------------Identity---------------------------------------
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// Multiplying a one preserves the other argument
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Node *MulNode::Identity( PhaseTransform *phase ) {
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register const Type *one = mul_id(); // The multiplicative identity
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if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
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if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
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return this;
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}
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//------------------------------Ideal------------------------------------------
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// We also canonicalize the Node, moving constants to the right input,
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// and flatten expressions (so that 1+x+2 becomes x+3).
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Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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const Type *t1 = phase->type( in(1) );
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const Type *t2 = phase->type( in(2) );
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Node *progress = NULL; // Progress flag
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// We are OK if right is a constant, or right is a load and
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// left is a non-constant.
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if( !(t2->singleton() ||
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(in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
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if( t1->singleton() || // Left input is a constant?
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// Otherwise, sort inputs (commutativity) to help value numbering.
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(in(1)->_idx > in(2)->_idx) ) {
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swap_edges(1, 2);
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const Type *t = t1;
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t1 = t2;
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t2 = t;
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progress = this; // Made progress
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}
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}
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// If the right input is a constant, and the left input is a product of a
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// constant, flatten the expression tree.
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uint op = Opcode();
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if( t2->singleton() && // Right input is a constant?
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op != Op_MulF && // Float & double cannot reassociate
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op != Op_MulD ) {
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if( t2 == Type::TOP ) return NULL;
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Node *mul1 = in(1);
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#ifdef ASSERT
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// Check for dead loop
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int op1 = mul1->Opcode();
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if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
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( op1 == mul_opcode() || op1 == add_opcode() ) &&
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( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
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phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
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assert(false, "dead loop in MulNode::Ideal");
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#endif
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if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
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// Mul of a constant?
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const Type *t12 = phase->type( mul1->in(2) );
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if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
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// Compute new constant; check for overflow
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const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12);
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if( tcon01->singleton() ) {
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// The Mul of the flattened expression
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set_req(1, mul1->in(1));
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set_req(2, phase->makecon( tcon01 ));
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t2 = tcon01;
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progress = this; // Made progress
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}
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}
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}
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// If the right input is a constant, and the left input is an add of a
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// constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
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const Node *add1 = in(1);
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if( add1->Opcode() == add_opcode() ) { // Left input is an add?
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// Add of a constant?
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const Type *t12 = phase->type( add1->in(2) );
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if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
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assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
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// Compute new constant; check for overflow
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const Type *tcon01 = mul_ring(t2,t12);
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if( tcon01->singleton() ) {
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// Convert (X+con1)*con0 into X*con0
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Node *mul = clone(); // mul = ()*con0
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mul->set_req(1,add1->in(1)); // mul = X*con0
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mul = phase->transform(mul);
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Node *add2 = add1->clone();
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add2->set_req(1, mul); // X*con0 + con0*con1
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add2->set_req(2, phase->makecon(tcon01) );
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progress = add2;
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}
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}
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} // End of is left input an add
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} // End of is right input a Mul
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return progress;
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}
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//------------------------------Value-----------------------------------------
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const Type *MulNode::Value( PhaseTransform *phase ) const {
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const Type *t1 = phase->type( in(1) );
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const Type *t2 = phase->type( in(2) );
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// Either input is TOP ==> the result is TOP
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if( t1 == Type::TOP ) return Type::TOP;
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if( t2 == Type::TOP ) return Type::TOP;
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// Either input is ZERO ==> the result is ZERO.
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// Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
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int op = Opcode();
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if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
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const Type *zero = add_id(); // The multiplicative zero
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if( t1->higher_equal( zero ) ) return zero;
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if( t2->higher_equal( zero ) ) return zero;
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}
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// Either input is BOTTOM ==> the result is the local BOTTOM
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if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
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return bottom_type();
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return mul_ring(t1,t2); // Local flavor of type multiplication
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}
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//=============================================================================
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//------------------------------Ideal------------------------------------------
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// Check for power-of-2 multiply, then try the regular MulNode::Ideal
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Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// Swap constant to right
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jint con;
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if ((con = in(1)->find_int_con(0)) != 0) {
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swap_edges(1, 2);
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// Finish rest of method to use info in 'con'
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} else if ((con = in(2)->find_int_con(0)) == 0) {
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return MulNode::Ideal(phase, can_reshape);
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}
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// Now we have a constant Node on the right and the constant in con
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if( con == 0 ) return NULL; // By zero is handled by Value call
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if( con == 1 ) return NULL; // By one is handled by Identity call
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// Check for negative constant; if so negate the final result
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bool sign_flip = false;
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if( con < 0 ) {
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con = -con;
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sign_flip = true;
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}
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// Get low bit; check for being the only bit
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Node *res = NULL;
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jint bit1 = con & -con; // Extract low bit
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if( bit1 == con ) { // Found a power of 2?
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res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
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} else {
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// Check for constant with 2 bits set
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jint bit2 = con-bit1;
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bit2 = bit2 & -bit2; // Extract 2nd bit
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if( bit2 + bit1 == con ) { // Found all bits in con?
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Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
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res = new (phase->C, 3) AddINode( n2, n1 );
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} else if (is_power_of_2(con+1)) {
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// Sleezy: power-of-2 -1. Next time be generic.
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jint temp = (jint) (con + 1);
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Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
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res = new (phase->C, 3) SubINode( n1, in(1) );
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} else {
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return MulNode::Ideal(phase, can_reshape);
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}
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}
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if( sign_flip ) { // Need to negate result?
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res = phase->transform(res);// Transform, before making the zero con
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res = new (phase->C, 3) SubINode(phase->intcon(0),res);
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}
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return res; // Return final result
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}
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//------------------------------mul_ring---------------------------------------
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// Compute the product type of two integer ranges into this node.
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const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
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const TypeInt *r0 = t0->is_int(); // Handy access
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const TypeInt *r1 = t1->is_int();
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// Fetch endpoints of all ranges
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int32 lo0 = r0->_lo;
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double a = (double)lo0;
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int32 hi0 = r0->_hi;
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double b = (double)hi0;
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int32 lo1 = r1->_lo;
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double c = (double)lo1;
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int32 hi1 = r1->_hi;
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double d = (double)hi1;
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// Compute all endpoints & check for overflow
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int32 A = lo0*lo1;
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if( (double)A != a*c ) return TypeInt::INT; // Overflow?
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int32 B = lo0*hi1;
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if( (double)B != a*d ) return TypeInt::INT; // Overflow?
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int32 C = hi0*lo1;
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if( (double)C != b*c ) return TypeInt::INT; // Overflow?
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int32 D = hi0*hi1;
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if( (double)D != b*d ) return TypeInt::INT; // Overflow?
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if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
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else { lo0 = B; hi0 = A; }
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if( C < D ) {
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if( C < lo0 ) lo0 = C;
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if( D > hi0 ) hi0 = D;
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} else {
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if( D < lo0 ) lo0 = D;
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if( C > hi0 ) hi0 = C;
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}
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return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
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}
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//=============================================================================
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//------------------------------Ideal------------------------------------------
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// Check for power-of-2 multiply, then try the regular MulNode::Ideal
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Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// Swap constant to right
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jlong con;
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if ((con = in(1)->find_long_con(0)) != 0) {
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swap_edges(1, 2);
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// Finish rest of method to use info in 'con'
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} else if ((con = in(2)->find_long_con(0)) == 0) {
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return MulNode::Ideal(phase, can_reshape);
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}
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// Now we have a constant Node on the right and the constant in con
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if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
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if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
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// Check for negative constant; if so negate the final result
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bool sign_flip = false;
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if( con < 0 ) {
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con = -con;
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sign_flip = true;
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}
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// Get low bit; check for being the only bit
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Node *res = NULL;
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jlong bit1 = con & -con; // Extract low bit
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if( bit1 == con ) { // Found a power of 2?
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res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
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} else {
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// Check for constant with 2 bits set
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jlong bit2 = con-bit1;
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bit2 = bit2 & -bit2; // Extract 2nd bit
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if( bit2 + bit1 == con ) { // Found all bits in con?
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Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
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res = new (phase->C, 3) AddLNode( n2, n1 );
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} else if (is_power_of_2_long(con+1)) {
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// Sleezy: power-of-2 -1. Next time be generic.
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jlong temp = (jlong) (con + 1);
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Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
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res = new (phase->C, 3) SubLNode( n1, in(1) );
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} else {
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return MulNode::Ideal(phase, can_reshape);
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}
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}
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if( sign_flip ) { // Need to negate result?
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res = phase->transform(res);// Transform, before making the zero con
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res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
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}
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return res; // Return final result
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}
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//------------------------------mul_ring---------------------------------------
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// Compute the product type of two integer ranges into this node.
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const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
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const TypeLong *r0 = t0->is_long(); // Handy access
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const TypeLong *r1 = t1->is_long();
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// Fetch endpoints of all ranges
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jlong lo0 = r0->_lo;
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double a = (double)lo0;
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jlong hi0 = r0->_hi;
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double b = (double)hi0;
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jlong lo1 = r1->_lo;
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double c = (double)lo1;
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jlong hi1 = r1->_hi;
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double d = (double)hi1;
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// Compute all endpoints & check for overflow
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jlong A = lo0*lo1;
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if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
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jlong B = lo0*hi1;
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if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
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jlong C = hi0*lo1;
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if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
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jlong D = hi0*hi1;
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if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
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if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
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else { lo0 = B; hi0 = A; }
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if( C < D ) {
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if( C < lo0 ) lo0 = C;
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if( D > hi0 ) hi0 = D;
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} else {
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if( D < lo0 ) lo0 = D;
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if( C > hi0 ) hi0 = C;
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}
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return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
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}
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//=============================================================================
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//------------------------------mul_ring---------------------------------------
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// Compute the product type of two double ranges into this node.
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const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
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if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
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return TypeF::make( t0->getf() * t1->getf() );
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}
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//=============================================================================
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//------------------------------mul_ring---------------------------------------
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|
360 |
// Compute the product type of two double ranges into this node.
|
|
361 |
const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
|
|
362 |
if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
|
|
363 |
// We must be adding 2 double constants.
|
|
364 |
return TypeD::make( t0->getd() * t1->getd() );
|
|
365 |
}
|
|
366 |
|
|
367 |
//=============================================================================
|
392
|
368 |
//------------------------------Value------------------------------------------
|
|
369 |
const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
|
|
370 |
// Either input is TOP ==> the result is TOP
|
|
371 |
const Type *t1 = phase->type( in(1) );
|
|
372 |
const Type *t2 = phase->type( in(2) );
|
|
373 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
374 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
375 |
|
|
376 |
// Either input is BOTTOM ==> the result is the local BOTTOM
|
|
377 |
const Type *bot = bottom_type();
|
|
378 |
if( (t1 == bot) || (t2 == bot) ||
|
|
379 |
(t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
|
|
380 |
return bot;
|
|
381 |
|
|
382 |
// It is not worth trying to constant fold this stuff!
|
|
383 |
return TypeLong::LONG;
|
|
384 |
}
|
|
385 |
|
|
386 |
//=============================================================================
|
1
|
387 |
//------------------------------mul_ring---------------------------------------
|
|
388 |
// Supplied function returns the product of the inputs IN THE CURRENT RING.
|
|
389 |
// For the logical operations the ring's MUL is really a logical AND function.
|
|
390 |
// This also type-checks the inputs for sanity. Guaranteed never to
|
|
391 |
// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
|
|
392 |
const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
|
|
393 |
const TypeInt *r0 = t0->is_int(); // Handy access
|
|
394 |
const TypeInt *r1 = t1->is_int();
|
|
395 |
int widen = MAX2(r0->_widen,r1->_widen);
|
|
396 |
|
|
397 |
// If either input is a constant, might be able to trim cases
|
|
398 |
if( !r0->is_con() && !r1->is_con() )
|
|
399 |
return TypeInt::INT; // No constants to be had
|
|
400 |
|
|
401 |
// Both constants? Return bits
|
|
402 |
if( r0->is_con() && r1->is_con() )
|
|
403 |
return TypeInt::make( r0->get_con() & r1->get_con() );
|
|
404 |
|
|
405 |
if( r0->is_con() && r0->get_con() > 0 )
|
|
406 |
return TypeInt::make(0, r0->get_con(), widen);
|
|
407 |
|
|
408 |
if( r1->is_con() && r1->get_con() > 0 )
|
|
409 |
return TypeInt::make(0, r1->get_con(), widen);
|
|
410 |
|
|
411 |
if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
|
|
412 |
return TypeInt::BOOL;
|
|
413 |
}
|
|
414 |
|
|
415 |
return TypeInt::INT; // No constants to be had
|
|
416 |
}
|
|
417 |
|
|
418 |
//------------------------------Identity---------------------------------------
|
|
419 |
// Masking off the high bits of an unsigned load is not required
|
|
420 |
Node *AndINode::Identity( PhaseTransform *phase ) {
|
|
421 |
|
|
422 |
// x & x => x
|
|
423 |
if (phase->eqv(in(1), in(2))) return in(1);
|
|
424 |
|
|
425 |
Node *load = in(1);
|
|
426 |
const TypeInt *t2 = phase->type( in(2) )->isa_int();
|
|
427 |
if( t2 && t2->is_con() ) {
|
|
428 |
int con = t2->get_con();
|
|
429 |
// Masking off high bits which are always zero is useless.
|
|
430 |
const TypeInt* t1 = phase->type( in(1) )->isa_int();
|
|
431 |
if (t1 != NULL && t1->_lo >= 0) {
|
|
432 |
jint t1_support = ((jint)1 << (1 + log2_intptr(t1->_hi))) - 1;
|
|
433 |
if ((t1_support & con) == t1_support)
|
|
434 |
return load;
|
|
435 |
}
|
|
436 |
uint lop = load->Opcode();
|
|
437 |
if( lop == Op_LoadC &&
|
|
438 |
con == 0x0000FFFF ) // Already zero-extended
|
|
439 |
return load;
|
|
440 |
// Masking off the high bits of a unsigned-shift-right is not
|
|
441 |
// needed either.
|
|
442 |
if( lop == Op_URShiftI ) {
|
|
443 |
const TypeInt *t12 = phase->type( load->in(2) )->isa_int();
|
|
444 |
if( t12 && t12->is_con() ) {
|
|
445 |
int shift_con = t12->get_con();
|
|
446 |
int mask = max_juint >> shift_con;
|
|
447 |
if( (mask&con) == mask ) // If AND is useless, skip it
|
|
448 |
return load;
|
|
449 |
}
|
|
450 |
}
|
|
451 |
}
|
|
452 |
return MulNode::Identity(phase);
|
|
453 |
}
|
|
454 |
|
|
455 |
//------------------------------Ideal------------------------------------------
|
|
456 |
Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
457 |
// Special case constant AND mask
|
|
458 |
const TypeInt *t2 = phase->type( in(2) )->isa_int();
|
|
459 |
if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
|
|
460 |
const int mask = t2->get_con();
|
|
461 |
Node *load = in(1);
|
|
462 |
uint lop = load->Opcode();
|
|
463 |
|
|
464 |
// Masking bits off of a Character? Hi bits are already zero.
|
|
465 |
if( lop == Op_LoadC &&
|
|
466 |
(mask & 0xFFFF0000) ) // Can we make a smaller mask?
|
|
467 |
return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
|
|
468 |
|
|
469 |
// Masking bits off of a Short? Loading a Character does some masking
|
|
470 |
if( lop == Op_LoadS &&
|
|
471 |
(mask & 0xFFFF0000) == 0 ) {
|
|
472 |
Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control),
|
|
473 |
load->in(MemNode::Memory),
|
|
474 |
load->in(MemNode::Address),
|
|
475 |
load->adr_type());
|
|
476 |
ldc = phase->transform(ldc);
|
|
477 |
return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF));
|
|
478 |
}
|
|
479 |
|
|
480 |
// Masking sign bits off of a Byte? Let the matcher use an unsigned load
|
|
481 |
if( lop == Op_LoadB &&
|
|
482 |
(!in(0) && load->in(0)) &&
|
|
483 |
(mask == 0x000000FF) ) {
|
|
484 |
// Associate this node with the LoadB, so the matcher can see them together.
|
|
485 |
// If we don't do this, it is common for the LoadB to have one control
|
|
486 |
// edge, and the store or call containing this AndI to have a different
|
|
487 |
// control edge. This will cause Label_Root to group the AndI with
|
|
488 |
// the encoding store or call, so the matcher has no chance to match
|
|
489 |
// this AndI together with the LoadB. Setting the control edge here
|
|
490 |
// prevents Label_Root from grouping the AndI with the store or call,
|
|
491 |
// if it has a control edge that is inconsistent with the LoadB.
|
|
492 |
set_req(0, load->in(0));
|
|
493 |
return this;
|
|
494 |
}
|
|
495 |
|
|
496 |
// Masking off sign bits? Dont make them!
|
|
497 |
if( lop == Op_RShiftI ) {
|
|
498 |
const TypeInt *t12 = phase->type(load->in(2))->isa_int();
|
|
499 |
if( t12 && t12->is_con() ) { // Shift is by a constant
|
|
500 |
int shift = t12->get_con();
|
|
501 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
502 |
const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
|
|
503 |
// If the AND'ing of the 2 masks has no bits, then only original shifted
|
|
504 |
// bits survive. NO sign-extension bits survive the maskings.
|
|
505 |
if( (sign_bits_mask & mask) == 0 ) {
|
|
506 |
// Use zero-fill shift instead
|
|
507 |
Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
|
|
508 |
return new (phase->C, 3) AndINode( zshift, in(2) );
|
|
509 |
}
|
|
510 |
}
|
|
511 |
}
|
|
512 |
|
|
513 |
// Check for 'negate/and-1', a pattern emitted when someone asks for
|
|
514 |
// 'mod 2'. Negate leaves the low order bit unchanged (think: complement
|
|
515 |
// plus 1) and the mask is of the low order bit. Skip the negate.
|
|
516 |
if( lop == Op_SubI && mask == 1 && load->in(1) &&
|
|
517 |
phase->type(load->in(1)) == TypeInt::ZERO )
|
|
518 |
return new (phase->C, 3) AndINode( load->in(2), in(2) );
|
|
519 |
|
|
520 |
return MulNode::Ideal(phase, can_reshape);
|
|
521 |
}
|
|
522 |
|
|
523 |
//=============================================================================
|
|
524 |
//------------------------------mul_ring---------------------------------------
|
|
525 |
// Supplied function returns the product of the inputs IN THE CURRENT RING.
|
|
526 |
// For the logical operations the ring's MUL is really a logical AND function.
|
|
527 |
// This also type-checks the inputs for sanity. Guaranteed never to
|
|
528 |
// be passed a TOP or BOTTOM type, these are filtered out by pre-check.
|
|
529 |
const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
|
|
530 |
const TypeLong *r0 = t0->is_long(); // Handy access
|
|
531 |
const TypeLong *r1 = t1->is_long();
|
|
532 |
int widen = MAX2(r0->_widen,r1->_widen);
|
|
533 |
|
|
534 |
// If either input is a constant, might be able to trim cases
|
|
535 |
if( !r0->is_con() && !r1->is_con() )
|
|
536 |
return TypeLong::LONG; // No constants to be had
|
|
537 |
|
|
538 |
// Both constants? Return bits
|
|
539 |
if( r0->is_con() && r1->is_con() )
|
|
540 |
return TypeLong::make( r0->get_con() & r1->get_con() );
|
|
541 |
|
|
542 |
if( r0->is_con() && r0->get_con() > 0 )
|
|
543 |
return TypeLong::make(CONST64(0), r0->get_con(), widen);
|
|
544 |
|
|
545 |
if( r1->is_con() && r1->get_con() > 0 )
|
|
546 |
return TypeLong::make(CONST64(0), r1->get_con(), widen);
|
|
547 |
|
|
548 |
return TypeLong::LONG; // No constants to be had
|
|
549 |
}
|
|
550 |
|
|
551 |
//------------------------------Identity---------------------------------------
|
|
552 |
// Masking off the high bits of an unsigned load is not required
|
|
553 |
Node *AndLNode::Identity( PhaseTransform *phase ) {
|
|
554 |
|
|
555 |
// x & x => x
|
|
556 |
if (phase->eqv(in(1), in(2))) return in(1);
|
|
557 |
|
|
558 |
Node *usr = in(1);
|
|
559 |
const TypeLong *t2 = phase->type( in(2) )->isa_long();
|
|
560 |
if( t2 && t2->is_con() ) {
|
|
561 |
jlong con = t2->get_con();
|
|
562 |
// Masking off high bits which are always zero is useless.
|
|
563 |
const TypeLong* t1 = phase->type( in(1) )->isa_long();
|
|
564 |
if (t1 != NULL && t1->_lo >= 0) {
|
|
565 |
jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
|
|
566 |
if ((t1_support & con) == t1_support)
|
|
567 |
return usr;
|
|
568 |
}
|
|
569 |
uint lop = usr->Opcode();
|
|
570 |
// Masking off the high bits of a unsigned-shift-right is not
|
|
571 |
// needed either.
|
|
572 |
if( lop == Op_URShiftL ) {
|
|
573 |
const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
|
|
574 |
if( t12 && t12->is_con() ) {
|
|
575 |
int shift_con = t12->get_con();
|
|
576 |
jlong mask = max_julong >> shift_con;
|
|
577 |
if( (mask&con) == mask ) // If AND is useless, skip it
|
|
578 |
return usr;
|
|
579 |
}
|
|
580 |
}
|
|
581 |
}
|
|
582 |
return MulNode::Identity(phase);
|
|
583 |
}
|
|
584 |
|
|
585 |
//------------------------------Ideal------------------------------------------
|
|
586 |
Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
587 |
// Special case constant AND mask
|
|
588 |
const TypeLong *t2 = phase->type( in(2) )->isa_long();
|
|
589 |
if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
|
|
590 |
const jlong mask = t2->get_con();
|
|
591 |
|
|
592 |
Node *rsh = in(1);
|
|
593 |
uint rop = rsh->Opcode();
|
|
594 |
|
|
595 |
// Masking off sign bits? Dont make them!
|
|
596 |
if( rop == Op_RShiftL ) {
|
|
597 |
const TypeInt *t12 = phase->type(rsh->in(2))->isa_int();
|
|
598 |
if( t12 && t12->is_con() ) { // Shift is by a constant
|
|
599 |
int shift = t12->get_con();
|
|
600 |
shift &= (BitsPerJavaInteger*2)-1; // semantics of Java shifts
|
|
601 |
const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - shift)) -1);
|
|
602 |
// If the AND'ing of the 2 masks has no bits, then only original shifted
|
|
603 |
// bits survive. NO sign-extension bits survive the maskings.
|
|
604 |
if( (sign_bits_mask & mask) == 0 ) {
|
|
605 |
// Use zero-fill shift instead
|
|
606 |
Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(rsh->in(1),rsh->in(2)));
|
|
607 |
return new (phase->C, 3) AndLNode( zshift, in(2) );
|
|
608 |
}
|
|
609 |
}
|
|
610 |
}
|
|
611 |
|
|
612 |
return MulNode::Ideal(phase, can_reshape);
|
|
613 |
}
|
|
614 |
|
|
615 |
//=============================================================================
|
|
616 |
//------------------------------Identity---------------------------------------
|
|
617 |
Node *LShiftINode::Identity( PhaseTransform *phase ) {
|
|
618 |
const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
|
|
619 |
return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
|
|
620 |
}
|
|
621 |
|
|
622 |
//------------------------------Ideal------------------------------------------
|
|
623 |
// If the right input is a constant, and the left input is an add of a
|
|
624 |
// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
|
|
625 |
Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
626 |
const Type *t = phase->type( in(2) );
|
|
627 |
if( t == Type::TOP ) return NULL; // Right input is dead
|
|
628 |
const TypeInt *t2 = t->isa_int();
|
|
629 |
if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
|
|
630 |
const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
|
|
631 |
|
|
632 |
if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
|
|
633 |
|
|
634 |
// Left input is an add of a constant?
|
|
635 |
Node *add1 = in(1);
|
|
636 |
int add1_op = add1->Opcode();
|
|
637 |
if( add1_op == Op_AddI ) { // Left input is an add?
|
|
638 |
assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
|
|
639 |
const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
|
|
640 |
if( t12 && t12->is_con() ){ // Left input is an add of a con?
|
|
641 |
// Transform is legal, but check for profit. Avoid breaking 'i2s'
|
|
642 |
// and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
|
|
643 |
if( con < 16 ) {
|
|
644 |
// Compute X << con0
|
|
645 |
Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
|
|
646 |
// Compute X<<con0 + (con1<<con0)
|
|
647 |
return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
|
|
648 |
}
|
|
649 |
}
|
|
650 |
}
|
|
651 |
|
|
652 |
// Check for "(x>>c0)<<c0" which just masks off low bits
|
|
653 |
if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
|
|
654 |
add1->in(2) == in(2) )
|
|
655 |
// Convert to "(x & -(1<<c0))"
|
|
656 |
return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
|
|
657 |
|
|
658 |
// Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
|
|
659 |
if( add1_op == Op_AndI ) {
|
|
660 |
Node *add2 = add1->in(1);
|
|
661 |
int add2_op = add2->Opcode();
|
|
662 |
if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
|
|
663 |
add2->in(2) == in(2) ) {
|
|
664 |
// Convert to "(x & (Y<<c0))"
|
|
665 |
Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
|
|
666 |
return new (phase->C, 3) AndINode( add2->in(1), y_sh );
|
|
667 |
}
|
|
668 |
}
|
|
669 |
|
|
670 |
// Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
|
|
671 |
// before shifting them away.
|
|
672 |
const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
|
|
673 |
if( add1_op == Op_AndI &&
|
|
674 |
phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
|
|
675 |
return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
|
|
676 |
|
|
677 |
return NULL;
|
|
678 |
}
|
|
679 |
|
|
680 |
//------------------------------Value------------------------------------------
|
|
681 |
// A LShiftINode shifts its input2 left by input1 amount.
|
|
682 |
const Type *LShiftINode::Value( PhaseTransform *phase ) const {
|
|
683 |
const Type *t1 = phase->type( in(1) );
|
|
684 |
const Type *t2 = phase->type( in(2) );
|
|
685 |
// Either input is TOP ==> the result is TOP
|
|
686 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
687 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
688 |
|
|
689 |
// Left input is ZERO ==> the result is ZERO.
|
|
690 |
if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
|
|
691 |
// Shift by zero does nothing
|
|
692 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
693 |
|
|
694 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
695 |
if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
|
|
696 |
(t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
|
|
697 |
return TypeInt::INT;
|
|
698 |
|
|
699 |
const TypeInt *r1 = t1->is_int(); // Handy access
|
|
700 |
const TypeInt *r2 = t2->is_int(); // Handy access
|
|
701 |
|
|
702 |
if (!r2->is_con())
|
|
703 |
return TypeInt::INT;
|
|
704 |
|
|
705 |
uint shift = r2->get_con();
|
|
706 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
707 |
// Shift by a multiple of 32 does nothing:
|
|
708 |
if (shift == 0) return t1;
|
|
709 |
|
|
710 |
// If the shift is a constant, shift the bounds of the type,
|
|
711 |
// unless this could lead to an overflow.
|
|
712 |
if (!r1->is_con()) {
|
|
713 |
jint lo = r1->_lo, hi = r1->_hi;
|
|
714 |
if (((lo << shift) >> shift) == lo &&
|
|
715 |
((hi << shift) >> shift) == hi) {
|
|
716 |
// No overflow. The range shifts up cleanly.
|
|
717 |
return TypeInt::make((jint)lo << (jint)shift,
|
|
718 |
(jint)hi << (jint)shift,
|
|
719 |
MAX2(r1->_widen,r2->_widen));
|
|
720 |
}
|
|
721 |
return TypeInt::INT;
|
|
722 |
}
|
|
723 |
|
|
724 |
return TypeInt::make( (jint)r1->get_con() << (jint)shift );
|
|
725 |
}
|
|
726 |
|
|
727 |
//=============================================================================
|
|
728 |
//------------------------------Identity---------------------------------------
|
|
729 |
Node *LShiftLNode::Identity( PhaseTransform *phase ) {
|
|
730 |
const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
|
|
731 |
return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
|
|
732 |
}
|
|
733 |
|
|
734 |
//------------------------------Ideal------------------------------------------
|
|
735 |
// If the right input is a constant, and the left input is an add of a
|
|
736 |
// constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
|
|
737 |
Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
738 |
const Type *t = phase->type( in(2) );
|
|
739 |
if( t == Type::TOP ) return NULL; // Right input is dead
|
|
740 |
const TypeInt *t2 = t->isa_int();
|
|
741 |
if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
|
|
742 |
const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
|
|
743 |
|
|
744 |
if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
|
|
745 |
|
|
746 |
// Left input is an add of a constant?
|
|
747 |
Node *add1 = in(1);
|
|
748 |
int add1_op = add1->Opcode();
|
|
749 |
if( add1_op == Op_AddL ) { // Left input is an add?
|
|
750 |
// Avoid dead data cycles from dead loops
|
|
751 |
assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
|
|
752 |
const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
|
|
753 |
if( t12 && t12->is_con() ){ // Left input is an add of a con?
|
|
754 |
// Compute X << con0
|
|
755 |
Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
|
|
756 |
// Compute X<<con0 + (con1<<con0)
|
|
757 |
return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
|
|
758 |
}
|
|
759 |
}
|
|
760 |
|
|
761 |
// Check for "(x>>c0)<<c0" which just masks off low bits
|
|
762 |
if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
|
|
763 |
add1->in(2) == in(2) )
|
|
764 |
// Convert to "(x & -(1<<c0))"
|
|
765 |
return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
|
|
766 |
|
|
767 |
// Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
|
|
768 |
if( add1_op == Op_AndL ) {
|
|
769 |
Node *add2 = add1->in(1);
|
|
770 |
int add2_op = add2->Opcode();
|
|
771 |
if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
|
|
772 |
add2->in(2) == in(2) ) {
|
|
773 |
// Convert to "(x & (Y<<c0))"
|
|
774 |
Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
|
|
775 |
return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
|
|
776 |
}
|
|
777 |
}
|
|
778 |
|
|
779 |
// Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
|
|
780 |
// before shifting them away.
|
|
781 |
const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - con)) - CONST64(1);
|
|
782 |
if( add1_op == Op_AndL &&
|
|
783 |
phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
|
|
784 |
return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
|
|
785 |
|
|
786 |
return NULL;
|
|
787 |
}
|
|
788 |
|
|
789 |
//------------------------------Value------------------------------------------
|
|
790 |
// A LShiftLNode shifts its input2 left by input1 amount.
|
|
791 |
const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
|
|
792 |
const Type *t1 = phase->type( in(1) );
|
|
793 |
const Type *t2 = phase->type( in(2) );
|
|
794 |
// Either input is TOP ==> the result is TOP
|
|
795 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
796 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
797 |
|
|
798 |
// Left input is ZERO ==> the result is ZERO.
|
|
799 |
if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
|
|
800 |
// Shift by zero does nothing
|
|
801 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
802 |
|
|
803 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
804 |
if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
|
|
805 |
(t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
|
|
806 |
return TypeLong::LONG;
|
|
807 |
|
|
808 |
const TypeLong *r1 = t1->is_long(); // Handy access
|
|
809 |
const TypeInt *r2 = t2->is_int(); // Handy access
|
|
810 |
|
|
811 |
if (!r2->is_con())
|
|
812 |
return TypeLong::LONG;
|
|
813 |
|
|
814 |
uint shift = r2->get_con();
|
|
815 |
shift &= (BitsPerJavaInteger*2)-1; // semantics of Java shifts
|
|
816 |
// Shift by a multiple of 64 does nothing:
|
|
817 |
if (shift == 0) return t1;
|
|
818 |
|
|
819 |
// If the shift is a constant, shift the bounds of the type,
|
|
820 |
// unless this could lead to an overflow.
|
|
821 |
if (!r1->is_con()) {
|
|
822 |
jlong lo = r1->_lo, hi = r1->_hi;
|
|
823 |
if (((lo << shift) >> shift) == lo &&
|
|
824 |
((hi << shift) >> shift) == hi) {
|
|
825 |
// No overflow. The range shifts up cleanly.
|
|
826 |
return TypeLong::make((jlong)lo << (jint)shift,
|
|
827 |
(jlong)hi << (jint)shift,
|
|
828 |
MAX2(r1->_widen,r2->_widen));
|
|
829 |
}
|
|
830 |
return TypeLong::LONG;
|
|
831 |
}
|
|
832 |
|
|
833 |
return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
|
|
834 |
}
|
|
835 |
|
|
836 |
//=============================================================================
|
|
837 |
//------------------------------Identity---------------------------------------
|
|
838 |
Node *RShiftINode::Identity( PhaseTransform *phase ) {
|
|
839 |
const TypeInt *t2 = phase->type(in(2))->isa_int();
|
|
840 |
if( !t2 ) return this;
|
|
841 |
if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
|
|
842 |
return in(1);
|
|
843 |
|
|
844 |
// Check for useless sign-masking
|
|
845 |
if( in(1)->Opcode() == Op_LShiftI &&
|
|
846 |
in(1)->req() == 3 &&
|
|
847 |
in(1)->in(2) == in(2) &&
|
|
848 |
t2->is_con() ) {
|
|
849 |
uint shift = t2->get_con();
|
|
850 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
851 |
// Compute masks for which this shifting doesn't change
|
|
852 |
int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
|
|
853 |
int hi = ~lo; // 00007FFF
|
|
854 |
const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
|
|
855 |
if( !t11 ) return this;
|
|
856 |
// Does actual value fit inside of mask?
|
|
857 |
if( lo <= t11->_lo && t11->_hi <= hi )
|
|
858 |
return in(1)->in(1); // Then shifting is a nop
|
|
859 |
}
|
|
860 |
|
|
861 |
return this;
|
|
862 |
}
|
|
863 |
|
|
864 |
//------------------------------Ideal------------------------------------------
|
|
865 |
Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
866 |
// Inputs may be TOP if they are dead.
|
|
867 |
const TypeInt *t1 = phase->type( in(1) )->isa_int();
|
|
868 |
if( !t1 ) return NULL; // Left input is an integer
|
|
869 |
const TypeInt *t2 = phase->type( in(2) )->isa_int();
|
|
870 |
if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
|
|
871 |
const TypeInt *t3; // type of in(1).in(2)
|
|
872 |
int shift = t2->get_con();
|
|
873 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
874 |
|
|
875 |
if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
|
|
876 |
|
|
877 |
// Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
|
|
878 |
// Such expressions arise normally from shift chains like (byte)(x >> 24).
|
|
879 |
const Node *mask = in(1);
|
|
880 |
if( mask->Opcode() == Op_AndI &&
|
|
881 |
(t3 = phase->type(mask->in(2))->isa_int()) &&
|
|
882 |
t3->is_con() ) {
|
|
883 |
Node *x = mask->in(1);
|
|
884 |
jint maskbits = t3->get_con();
|
|
885 |
// Convert to "(x >> shift) & (mask >> shift)"
|
|
886 |
Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
|
|
887 |
return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
|
|
888 |
}
|
|
889 |
|
|
890 |
// Check for "(short[i] <<16)>>16" which simply sign-extends
|
|
891 |
const Node *shl = in(1);
|
|
892 |
if( shl->Opcode() != Op_LShiftI ) return NULL;
|
|
893 |
|
|
894 |
if( shift == 16 &&
|
|
895 |
(t3 = phase->type(shl->in(2))->isa_int()) &&
|
|
896 |
t3->is_con(16) ) {
|
|
897 |
Node *ld = shl->in(1);
|
|
898 |
if( ld->Opcode() == Op_LoadS ) {
|
|
899 |
// Sign extension is just useless here. Return a RShiftI of zero instead
|
|
900 |
// returning 'ld' directly. We cannot return an old Node directly as
|
|
901 |
// that is the job of 'Identity' calls and Identity calls only work on
|
|
902 |
// direct inputs ('ld' is an extra Node removed from 'this'). The
|
|
903 |
// combined optimization requires Identity only return direct inputs.
|
|
904 |
set_req(1, ld);
|
|
905 |
set_req(2, phase->intcon(0));
|
|
906 |
return this;
|
|
907 |
}
|
|
908 |
else if( ld->Opcode() == Op_LoadC )
|
|
909 |
// Replace zero-extension-load with sign-extension-load
|
|
910 |
return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
|
|
911 |
ld->in(MemNode::Memory),
|
|
912 |
ld->in(MemNode::Address),
|
|
913 |
ld->adr_type());
|
|
914 |
}
|
|
915 |
|
|
916 |
// Check for "(byte[i] <<24)>>24" which simply sign-extends
|
|
917 |
if( shift == 24 &&
|
|
918 |
(t3 = phase->type(shl->in(2))->isa_int()) &&
|
|
919 |
t3->is_con(24) ) {
|
|
920 |
Node *ld = shl->in(1);
|
|
921 |
if( ld->Opcode() == Op_LoadB ) {
|
|
922 |
// Sign extension is just useless here
|
|
923 |
set_req(1, ld);
|
|
924 |
set_req(2, phase->intcon(0));
|
|
925 |
return this;
|
|
926 |
}
|
|
927 |
}
|
|
928 |
|
|
929 |
return NULL;
|
|
930 |
}
|
|
931 |
|
|
932 |
//------------------------------Value------------------------------------------
|
|
933 |
// A RShiftINode shifts its input2 right by input1 amount.
|
|
934 |
const Type *RShiftINode::Value( PhaseTransform *phase ) const {
|
|
935 |
const Type *t1 = phase->type( in(1) );
|
|
936 |
const Type *t2 = phase->type( in(2) );
|
|
937 |
// Either input is TOP ==> the result is TOP
|
|
938 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
939 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
940 |
|
|
941 |
// Left input is ZERO ==> the result is ZERO.
|
|
942 |
if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
|
|
943 |
// Shift by zero does nothing
|
|
944 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
945 |
|
|
946 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
947 |
if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
|
|
948 |
return TypeInt::INT;
|
|
949 |
|
|
950 |
if (t2 == TypeInt::INT)
|
|
951 |
return TypeInt::INT;
|
|
952 |
|
|
953 |
const TypeInt *r1 = t1->is_int(); // Handy access
|
|
954 |
const TypeInt *r2 = t2->is_int(); // Handy access
|
|
955 |
|
|
956 |
// If the shift is a constant, just shift the bounds of the type.
|
|
957 |
// For example, if the shift is 31, we just propagate sign bits.
|
|
958 |
if (r2->is_con()) {
|
|
959 |
uint shift = r2->get_con();
|
|
960 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
961 |
// Shift by a multiple of 32 does nothing:
|
|
962 |
if (shift == 0) return t1;
|
|
963 |
// Calculate reasonably aggressive bounds for the result.
|
|
964 |
// This is necessary if we are to correctly type things
|
|
965 |
// like (x<<24>>24) == ((byte)x).
|
|
966 |
jint lo = (jint)r1->_lo >> (jint)shift;
|
|
967 |
jint hi = (jint)r1->_hi >> (jint)shift;
|
|
968 |
assert(lo <= hi, "must have valid bounds");
|
|
969 |
const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
|
|
970 |
#ifdef ASSERT
|
|
971 |
// Make sure we get the sign-capture idiom correct.
|
|
972 |
if (shift == BitsPerJavaInteger-1) {
|
|
973 |
if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
|
|
974 |
if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
|
|
975 |
}
|
|
976 |
#endif
|
|
977 |
return ti;
|
|
978 |
}
|
|
979 |
|
|
980 |
if( !r1->is_con() || !r2->is_con() )
|
|
981 |
return TypeInt::INT;
|
|
982 |
|
|
983 |
// Signed shift right
|
|
984 |
return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
|
|
985 |
}
|
|
986 |
|
|
987 |
//=============================================================================
|
|
988 |
//------------------------------Identity---------------------------------------
|
|
989 |
Node *RShiftLNode::Identity( PhaseTransform *phase ) {
|
|
990 |
const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
|
|
991 |
return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
|
|
992 |
}
|
|
993 |
|
|
994 |
//------------------------------Value------------------------------------------
|
|
995 |
// A RShiftLNode shifts its input2 right by input1 amount.
|
|
996 |
const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
|
|
997 |
const Type *t1 = phase->type( in(1) );
|
|
998 |
const Type *t2 = phase->type( in(2) );
|
|
999 |
// Either input is TOP ==> the result is TOP
|
|
1000 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
1001 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
1002 |
|
|
1003 |
// Left input is ZERO ==> the result is ZERO.
|
|
1004 |
if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
|
|
1005 |
// Shift by zero does nothing
|
|
1006 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
1007 |
|
|
1008 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
1009 |
if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
|
|
1010 |
return TypeLong::LONG;
|
|
1011 |
|
|
1012 |
if (t2 == TypeInt::INT)
|
|
1013 |
return TypeLong::LONG;
|
|
1014 |
|
|
1015 |
const TypeLong *r1 = t1->is_long(); // Handy access
|
|
1016 |
const TypeInt *r2 = t2->is_int (); // Handy access
|
|
1017 |
|
|
1018 |
// If the shift is a constant, just shift the bounds of the type.
|
|
1019 |
// For example, if the shift is 63, we just propagate sign bits.
|
|
1020 |
if (r2->is_con()) {
|
|
1021 |
uint shift = r2->get_con();
|
|
1022 |
shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
|
|
1023 |
// Shift by a multiple of 64 does nothing:
|
|
1024 |
if (shift == 0) return t1;
|
|
1025 |
// Calculate reasonably aggressive bounds for the result.
|
|
1026 |
// This is necessary if we are to correctly type things
|
|
1027 |
// like (x<<24>>24) == ((byte)x).
|
|
1028 |
jlong lo = (jlong)r1->_lo >> (jlong)shift;
|
|
1029 |
jlong hi = (jlong)r1->_hi >> (jlong)shift;
|
|
1030 |
assert(lo <= hi, "must have valid bounds");
|
|
1031 |
const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
|
|
1032 |
#ifdef ASSERT
|
|
1033 |
// Make sure we get the sign-capture idiom correct.
|
|
1034 |
if (shift == (2*BitsPerJavaInteger)-1) {
|
|
1035 |
if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
|
|
1036 |
if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
|
|
1037 |
}
|
|
1038 |
#endif
|
|
1039 |
return tl;
|
|
1040 |
}
|
|
1041 |
|
|
1042 |
return TypeLong::LONG; // Give up
|
|
1043 |
}
|
|
1044 |
|
|
1045 |
//=============================================================================
|
|
1046 |
//------------------------------Identity---------------------------------------
|
|
1047 |
Node *URShiftINode::Identity( PhaseTransform *phase ) {
|
|
1048 |
const TypeInt *ti = phase->type( in(2) )->isa_int();
|
|
1049 |
if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
|
|
1050 |
|
|
1051 |
// Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
|
|
1052 |
// Happens during new-array length computation.
|
|
1053 |
// Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
|
|
1054 |
Node *add = in(1);
|
|
1055 |
if( add->Opcode() == Op_AddI ) {
|
|
1056 |
const TypeInt *t2 = phase->type(add->in(2))->isa_int();
|
|
1057 |
if( t2 && t2->is_con(wordSize - 1) &&
|
|
1058 |
add->in(1)->Opcode() == Op_LShiftI ) {
|
|
1059 |
// Check that shift_counts are LogBytesPerWord
|
|
1060 |
Node *lshift_count = add->in(1)->in(2);
|
|
1061 |
const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
|
|
1062 |
if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
|
|
1063 |
t_lshift_count == phase->type(in(2)) ) {
|
|
1064 |
Node *x = add->in(1)->in(1);
|
|
1065 |
const TypeInt *t_x = phase->type(x)->isa_int();
|
|
1066 |
if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
|
|
1067 |
return x;
|
|
1068 |
}
|
|
1069 |
}
|
|
1070 |
}
|
|
1071 |
}
|
|
1072 |
|
|
1073 |
return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
|
|
1074 |
}
|
|
1075 |
|
|
1076 |
//------------------------------Ideal------------------------------------------
|
|
1077 |
Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
1078 |
const TypeInt *t2 = phase->type( in(2) )->isa_int();
|
|
1079 |
if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
|
|
1080 |
const int con = t2->get_con() & 31; // Shift count is always masked
|
|
1081 |
if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
|
|
1082 |
// We'll be wanting the right-shift amount as a mask of that many bits
|
|
1083 |
const int mask = right_n_bits(BitsPerJavaInteger - con);
|
|
1084 |
|
|
1085 |
int in1_op = in(1)->Opcode();
|
|
1086 |
|
|
1087 |
// Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
|
|
1088 |
if( in1_op == Op_URShiftI ) {
|
|
1089 |
const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
|
|
1090 |
if( t12 && t12->is_con() ) { // Right input is a constant
|
|
1091 |
assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
|
|
1092 |
const int con2 = t12->get_con() & 31; // Shift count is always masked
|
|
1093 |
const int con3 = con+con2;
|
|
1094 |
if( con3 < 32 ) // Only merge shifts if total is < 32
|
|
1095 |
return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
|
|
1096 |
}
|
|
1097 |
}
|
|
1098 |
|
|
1099 |
// Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
|
|
1100 |
// The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
|
|
1101 |
// If Q is "X << z" the rounding is useless. Look for patterns like
|
|
1102 |
// ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
|
|
1103 |
Node *add = in(1);
|
|
1104 |
if( in1_op == Op_AddI ) {
|
|
1105 |
Node *lshl = add->in(1);
|
|
1106 |
if( lshl->Opcode() == Op_LShiftI &&
|
|
1107 |
phase->type(lshl->in(2)) == t2 ) {
|
|
1108 |
Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
|
|
1109 |
Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
|
|
1110 |
return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
|
|
1111 |
}
|
|
1112 |
}
|
|
1113 |
|
|
1114 |
// Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
|
|
1115 |
// This shortens the mask. Also, if we are extracting a high byte and
|
|
1116 |
// storing it to a buffer, the mask will be removed completely.
|
|
1117 |
Node *andi = in(1);
|
|
1118 |
if( in1_op == Op_AndI ) {
|
|
1119 |
const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
|
|
1120 |
if( t3 && t3->is_con() ) { // Right input is a constant
|
|
1121 |
jint mask2 = t3->get_con();
|
|
1122 |
mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
|
|
1123 |
Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
|
|
1124 |
return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
|
|
1125 |
// The negative values are easier to materialize than positive ones.
|
|
1126 |
// A typical case from address arithmetic is ((x & ~15) >> 4).
|
|
1127 |
// It's better to change that to ((x >> 4) & ~0) versus
|
|
1128 |
// ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
|
|
1129 |
}
|
|
1130 |
}
|
|
1131 |
|
|
1132 |
// Check for "(X << z ) >>> z" which simply zero-extends
|
|
1133 |
Node *shl = in(1);
|
|
1134 |
if( in1_op == Op_LShiftI &&
|
|
1135 |
phase->type(shl->in(2)) == t2 )
|
|
1136 |
return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
|
|
1137 |
|
|
1138 |
return NULL;
|
|
1139 |
}
|
|
1140 |
|
|
1141 |
//------------------------------Value------------------------------------------
|
|
1142 |
// A URShiftINode shifts its input2 right by input1 amount.
|
|
1143 |
const Type *URShiftINode::Value( PhaseTransform *phase ) const {
|
|
1144 |
// (This is a near clone of RShiftINode::Value.)
|
|
1145 |
const Type *t1 = phase->type( in(1) );
|
|
1146 |
const Type *t2 = phase->type( in(2) );
|
|
1147 |
// Either input is TOP ==> the result is TOP
|
|
1148 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
1149 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
1150 |
|
|
1151 |
// Left input is ZERO ==> the result is ZERO.
|
|
1152 |
if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
|
|
1153 |
// Shift by zero does nothing
|
|
1154 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
1155 |
|
|
1156 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
1157 |
if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
|
|
1158 |
return TypeInt::INT;
|
|
1159 |
|
|
1160 |
if (t2 == TypeInt::INT)
|
|
1161 |
return TypeInt::INT;
|
|
1162 |
|
|
1163 |
const TypeInt *r1 = t1->is_int(); // Handy access
|
|
1164 |
const TypeInt *r2 = t2->is_int(); // Handy access
|
|
1165 |
|
|
1166 |
if (r2->is_con()) {
|
|
1167 |
uint shift = r2->get_con();
|
|
1168 |
shift &= BitsPerJavaInteger-1; // semantics of Java shifts
|
|
1169 |
// Shift by a multiple of 32 does nothing:
|
|
1170 |
if (shift == 0) return t1;
|
|
1171 |
// Calculate reasonably aggressive bounds for the result.
|
|
1172 |
jint lo = (juint)r1->_lo >> (juint)shift;
|
|
1173 |
jint hi = (juint)r1->_hi >> (juint)shift;
|
|
1174 |
if (r1->_hi >= 0 && r1->_lo < 0) {
|
|
1175 |
// If the type has both negative and positive values,
|
|
1176 |
// there are two separate sub-domains to worry about:
|
|
1177 |
// The positive half and the negative half.
|
|
1178 |
jint neg_lo = lo;
|
|
1179 |
jint neg_hi = (juint)-1 >> (juint)shift;
|
|
1180 |
jint pos_lo = (juint) 0 >> (juint)shift;
|
|
1181 |
jint pos_hi = hi;
|
|
1182 |
lo = MIN2(neg_lo, pos_lo); // == 0
|
|
1183 |
hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
|
|
1184 |
}
|
|
1185 |
assert(lo <= hi, "must have valid bounds");
|
|
1186 |
const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
|
|
1187 |
#ifdef ASSERT
|
|
1188 |
// Make sure we get the sign-capture idiom correct.
|
|
1189 |
if (shift == BitsPerJavaInteger-1) {
|
|
1190 |
if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
|
|
1191 |
if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
|
|
1192 |
}
|
|
1193 |
#endif
|
|
1194 |
return ti;
|
|
1195 |
}
|
|
1196 |
|
|
1197 |
//
|
|
1198 |
// Do not support shifted oops in info for GC
|
|
1199 |
//
|
|
1200 |
// else if( t1->base() == Type::InstPtr ) {
|
|
1201 |
//
|
|
1202 |
// const TypeInstPtr *o = t1->is_instptr();
|
|
1203 |
// if( t1->singleton() )
|
|
1204 |
// return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
|
|
1205 |
// }
|
|
1206 |
// else if( t1->base() == Type::KlassPtr ) {
|
|
1207 |
// const TypeKlassPtr *o = t1->is_klassptr();
|
|
1208 |
// if( t1->singleton() )
|
|
1209 |
// return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
|
|
1210 |
// }
|
|
1211 |
|
|
1212 |
return TypeInt::INT;
|
|
1213 |
}
|
|
1214 |
|
|
1215 |
//=============================================================================
|
|
1216 |
//------------------------------Identity---------------------------------------
|
|
1217 |
Node *URShiftLNode::Identity( PhaseTransform *phase ) {
|
|
1218 |
const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
|
|
1219 |
return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
|
|
1220 |
}
|
|
1221 |
|
|
1222 |
//------------------------------Ideal------------------------------------------
|
|
1223 |
Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|
1224 |
const TypeInt *t2 = phase->type( in(2) )->isa_int();
|
|
1225 |
if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
|
|
1226 |
const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
|
|
1227 |
if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
|
|
1228 |
// note: mask computation below does not work for 0 shift count
|
|
1229 |
// We'll be wanting the right-shift amount as a mask of that many bits
|
|
1230 |
const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - con)) -1);
|
|
1231 |
|
|
1232 |
// Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
|
|
1233 |
// The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
|
|
1234 |
// If Q is "X << z" the rounding is useless. Look for patterns like
|
|
1235 |
// ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
|
|
1236 |
Node *add = in(1);
|
|
1237 |
if( add->Opcode() == Op_AddL ) {
|
|
1238 |
Node *lshl = add->in(1);
|
|
1239 |
if( lshl->Opcode() == Op_LShiftL &&
|
|
1240 |
phase->type(lshl->in(2)) == t2 ) {
|
|
1241 |
Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
|
|
1242 |
Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
|
|
1243 |
return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
|
|
1244 |
}
|
|
1245 |
}
|
|
1246 |
|
|
1247 |
// Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
|
|
1248 |
// This shortens the mask. Also, if we are extracting a high byte and
|
|
1249 |
// storing it to a buffer, the mask will be removed completely.
|
|
1250 |
Node *andi = in(1);
|
|
1251 |
if( andi->Opcode() == Op_AndL ) {
|
|
1252 |
const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
|
|
1253 |
if( t3 && t3->is_con() ) { // Right input is a constant
|
|
1254 |
jlong mask2 = t3->get_con();
|
|
1255 |
mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
|
|
1256 |
Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
|
|
1257 |
return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
|
|
1258 |
}
|
|
1259 |
}
|
|
1260 |
|
|
1261 |
// Check for "(X << z ) >>> z" which simply zero-extends
|
|
1262 |
Node *shl = in(1);
|
|
1263 |
if( shl->Opcode() == Op_LShiftL &&
|
|
1264 |
phase->type(shl->in(2)) == t2 )
|
|
1265 |
return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
|
|
1266 |
|
|
1267 |
return NULL;
|
|
1268 |
}
|
|
1269 |
|
|
1270 |
//------------------------------Value------------------------------------------
|
|
1271 |
// A URShiftINode shifts its input2 right by input1 amount.
|
|
1272 |
const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
|
|
1273 |
// (This is a near clone of RShiftLNode::Value.)
|
|
1274 |
const Type *t1 = phase->type( in(1) );
|
|
1275 |
const Type *t2 = phase->type( in(2) );
|
|
1276 |
// Either input is TOP ==> the result is TOP
|
|
1277 |
if( t1 == Type::TOP ) return Type::TOP;
|
|
1278 |
if( t2 == Type::TOP ) return Type::TOP;
|
|
1279 |
|
|
1280 |
// Left input is ZERO ==> the result is ZERO.
|
|
1281 |
if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
|
|
1282 |
// Shift by zero does nothing
|
|
1283 |
if( t2 == TypeInt::ZERO ) return t1;
|
|
1284 |
|
|
1285 |
// Either input is BOTTOM ==> the result is BOTTOM
|
|
1286 |
if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
|
|
1287 |
return TypeLong::LONG;
|
|
1288 |
|
|
1289 |
if (t2 == TypeInt::INT)
|
|
1290 |
return TypeLong::LONG;
|
|
1291 |
|
|
1292 |
const TypeLong *r1 = t1->is_long(); // Handy access
|
|
1293 |
const TypeInt *r2 = t2->is_int (); // Handy access
|
|
1294 |
|
|
1295 |
if (r2->is_con()) {
|
|
1296 |
uint shift = r2->get_con();
|
|
1297 |
shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
|
|
1298 |
// Shift by a multiple of 64 does nothing:
|
|
1299 |
if (shift == 0) return t1;
|
|
1300 |
// Calculate reasonably aggressive bounds for the result.
|
|
1301 |
jlong lo = (julong)r1->_lo >> (juint)shift;
|
|
1302 |
jlong hi = (julong)r1->_hi >> (juint)shift;
|
|
1303 |
if (r1->_hi >= 0 && r1->_lo < 0) {
|
|
1304 |
// If the type has both negative and positive values,
|
|
1305 |
// there are two separate sub-domains to worry about:
|
|
1306 |
// The positive half and the negative half.
|
|
1307 |
jlong neg_lo = lo;
|
|
1308 |
jlong neg_hi = (julong)-1 >> (juint)shift;
|
|
1309 |
jlong pos_lo = (julong) 0 >> (juint)shift;
|
|
1310 |
jlong pos_hi = hi;
|
|
1311 |
//lo = MIN2(neg_lo, pos_lo); // == 0
|
|
1312 |
lo = neg_lo < pos_lo ? neg_lo : pos_lo;
|
|
1313 |
//hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
|
|
1314 |
hi = neg_hi > pos_hi ? neg_hi : pos_hi;
|
|
1315 |
}
|
|
1316 |
assert(lo <= hi, "must have valid bounds");
|
|
1317 |
const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
|
|
1318 |
#ifdef ASSERT
|
|
1319 |
// Make sure we get the sign-capture idiom correct.
|
|
1320 |
if (shift == (2*BitsPerJavaInteger)-1) {
|
|
1321 |
if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
|
|
1322 |
if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
|
|
1323 |
}
|
|
1324 |
#endif
|
|
1325 |
return tl;
|
|
1326 |
}
|
|
1327 |
|
|
1328 |
return TypeLong::LONG; // Give up
|
|
1329 |
}
|