author | goetz |
Wed, 18 Sep 2013 14:34:56 -0700 | |
changeset 22834 | 3e2df6a4a28c |
parent 16611 | 6807a703dd6b |
child 19710 | 2f8ca425504e |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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||
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#include "precompiled.hpp" |
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#include "c1/c1_CodeStubs.hpp" |
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#include "c1/c1_FrameMap.hpp" |
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#include "c1/c1_LIRAssembler.hpp" |
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#include "c1/c1_MacroAssembler.hpp" |
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#include "c1/c1_Runtime1.hpp" |
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#include "nativeInst_x86.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "utilities/macros.hpp" |
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#include "vmreg_x86.inline.hpp" |
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#if INCLUDE_ALL_GCS |
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#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" |
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#endif // INCLUDE_ALL_GCS |
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#define __ ce->masm()-> |
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||
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float ConversionStub::float_zero = 0.0; |
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double ConversionStub::double_zero = 0.0; |
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||
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void ConversionStub::emit_code(LIR_Assembler* ce) { |
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__ bind(_entry); |
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assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub"); |
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||
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||
50 |
if (input()->is_single_xmm()) { |
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__ comiss(input()->as_xmm_float_reg(), |
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ExternalAddress((address)&float_zero)); |
|
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} else if (input()->is_double_xmm()) { |
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__ comisd(input()->as_xmm_double_reg(), |
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ExternalAddress((address)&double_zero)); |
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} else { |
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LP64_ONLY(ShouldNotReachHere()); |
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__ push(rax); |
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__ ftst(); |
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__ fnstsw_ax(); |
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__ sahf(); |
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__ pop(rax); |
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} |
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||
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Label NaN, do_return; |
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__ jccb(Assembler::parity, NaN); |
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__ jccb(Assembler::below, do_return); |
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// input is > 0 -> return maxInt |
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// result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff |
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__ decrement(result()->as_register()); |
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__ jmpb(do_return); |
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||
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// input is NaN -> return 0 |
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__ bind(NaN); |
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__ xorptr(result()->as_register(), result()->as_register()); |
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__ bind(do_return); |
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__ jmp(_continuation); |
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} |
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void CounterOverflowStub::emit_code(LIR_Assembler* ce) { |
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__ bind(_entry); |
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ce->store_parameter(_method->as_register(), 1); |
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ce->store_parameter(_bci, 0); |
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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__ jmp(_continuation); |
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} |
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RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index, |
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bool throw_index_out_of_bounds_exception) |
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: _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception) |
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, _index(index) |
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{ |
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assert(info != NULL, "must have info"); |
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_info = new CodeEmitInfo(info); |
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} |
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void RangeCheckStub::emit_code(LIR_Assembler* ce) { |
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__ bind(_entry); |
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if (_info->deoptimize_on_exception()) { |
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address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
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__ call(RuntimeAddress(a)); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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debug_only(__ should_not_reach_here()); |
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return; |
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} |
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// pass the array index on stack because all registers must be preserved |
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if (_index->is_cpu_register()) { |
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ce->store_parameter(_index->as_register(), 0); |
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} else { |
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ce->store_parameter(_index->as_jint(), 0); |
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} |
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Runtime1::StubID stub_id; |
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if (_throw_index_out_of_bounds_exception) { |
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stub_id = Runtime1::throw_index_exception_id; |
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} else { |
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stub_id = Runtime1::throw_range_check_failed_id; |
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} |
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__ call(RuntimeAddress(Runtime1::entry_for(stub_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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debug_only(__ should_not_reach_here()); |
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} |
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PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) { |
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_info = new CodeEmitInfo(info); |
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} |
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void PredicateFailedStub::emit_code(LIR_Assembler* ce) { |
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__ bind(_entry); |
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address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
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__ call(RuntimeAddress(a)); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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debug_only(__ should_not_reach_here()); |
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} |
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void DivByZeroStub::emit_code(LIR_Assembler* ce) { |
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if (_offset != -1) { |
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ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); |
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} |
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__ bind(_entry); |
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id))); |
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ce->add_call_info_here(_info); |
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debug_only(__ should_not_reach_here()); |
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} |
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// Implementation of NewInstanceStub |
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NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) { |
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_result = result; |
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_klass = klass; |
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_klass_reg = klass_reg; |
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_info = new CodeEmitInfo(info); |
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assert(stub_id == Runtime1::new_instance_id || |
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stub_id == Runtime1::fast_new_instance_id || |
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stub_id == Runtime1::fast_new_instance_init_check_id, |
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"need new_instance id"); |
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_stub_id = stub_id; |
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} |
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void NewInstanceStub::emit_code(LIR_Assembler* ce) { |
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assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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__ bind(_entry); |
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__ movptr(rdx, _klass_reg->as_register()); |
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__ call(RuntimeAddress(Runtime1::entry_for(_stub_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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assert(_result->as_register() == rax, "result must in rax,"); |
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__ jmp(_continuation); |
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} |
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// Implementation of NewTypeArrayStub |
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NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { |
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_klass_reg = klass_reg; |
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_length = length; |
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_result = result; |
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_info = new CodeEmitInfo(info); |
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} |
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void NewTypeArrayStub::emit_code(LIR_Assembler* ce) { |
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assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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__ bind(_entry); |
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assert(_length->as_register() == rbx, "length must in rbx,"); |
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assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); |
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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assert(_result->as_register() == rax, "result must in rax,"); |
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__ jmp(_continuation); |
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} |
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// Implementation of NewObjectArrayStub |
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NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { |
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_klass_reg = klass_reg; |
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_result = result; |
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_length = length; |
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_info = new CodeEmitInfo(info); |
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} |
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void NewObjectArrayStub::emit_code(LIR_Assembler* ce) { |
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assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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__ bind(_entry); |
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assert(_length->as_register() == rbx, "length must in rbx,"); |
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assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); |
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__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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assert(_result->as_register() == rax, "result must in rax,"); |
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__ jmp(_continuation); |
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} |
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// Implementation of MonitorAccessStubs |
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MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info) |
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: MonitorAccessStub(obj_reg, lock_reg) |
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{ |
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_info = new CodeEmitInfo(info); |
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} |
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void MonitorEnterStub::emit_code(LIR_Assembler* ce) { |
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assert(__ rsp_offset() == 0, "frame size should be fixed"); |
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__ bind(_entry); |
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ce->store_parameter(_obj_reg->as_register(), 1); |
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ce->store_parameter(_lock_reg->as_register(), 0); |
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Runtime1::StubID enter_id; |
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if (ce->compilation()->has_fpu_code()) { |
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enter_id = Runtime1::monitorenter_id; |
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} else { |
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enter_id = Runtime1::monitorenter_nofpu_id; |
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} |
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__ call(RuntimeAddress(Runtime1::entry_for(enter_id))); |
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ce->add_call_info_here(_info); |
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ce->verify_oop_map(_info); |
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__ jmp(_continuation); |
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} |
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void MonitorExitStub::emit_code(LIR_Assembler* ce) { |
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__ bind(_entry); |
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if (_compute_lock) { |
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// lock_reg was destroyed by fast unlocking attempt => recompute it |
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ce->monitor_address(_monitor_ix, _lock_reg); |
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} |
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ce->store_parameter(_lock_reg->as_register(), 0); |
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// note: non-blocking leaf routine => no call info needed |
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Runtime1::StubID exit_id; |
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if (ce->compilation()->has_fpu_code()) { |
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exit_id = Runtime1::monitorexit_id; |
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} else { |
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exit_id = Runtime1::monitorexit_nofpu_id; |
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} |
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__ call(RuntimeAddress(Runtime1::entry_for(exit_id))); |
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__ jmp(_continuation); |
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} |
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// Implementation of patching: |
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// - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes) |
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// - Replace original code with a call to the stub |
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// At Runtime: |
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// - call to stub, jump to runtime |
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// - in runtime: preserve all registers (rspecially objects, i.e., source and destination object) |
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// - in runtime: after initializing class, restore original code, reexecute instruction |
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int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size; |
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void PatchingStub::align_patch_site(MacroAssembler* masm) { |
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// We're patching a 5-7 byte instruction on intel and we need to |
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// make sure that we don't see a piece of the instruction. It |
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// appears mostly impossible on Intel to simply invalidate other |
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// processors caches and since they may do aggressive prefetch it's |
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// very hard to make a guess about what code might be in the icache. |
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// Force the instruction to be double word aligned so that it |
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// doesn't span a cache line. |
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masm->align(round_to(NativeGeneralJump::instruction_size, wordSize)); |
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} |
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295 |
void PatchingStub::emit_code(LIR_Assembler* ce) { |
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assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call"); |
|
297 |
||
298 |
Label call_patch; |
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299 |
||
300 |
// static field accesses have special semantics while the class |
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// initializer is being run so we emit a test which can be used to |
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// check that this code is being executed by the initializing |
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// thread. |
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address being_initialized_entry = __ pc(); |
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if (CommentedAssembly) { |
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__ block_comment(" patch template"); |
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} |
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if (_id == load_klass_id) { |
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// produce a copy of the load klass instruction for use by the being initialized case |
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#ifdef ASSERT |
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address start = __ pc(); |
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#endif |
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Metadata* o = NULL; |
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__ mov_metadata(_obj, o); |
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#ifdef ASSERT |
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for (int i = 0; i < _bytes_to_copy; i++) { |
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address ptr = (address)(_pc_start + i); |
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int a_byte = (*ptr) & 0xFF; |
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assert(a_byte == *start++, "should be the same code"); |
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} |
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#endif |
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} else if (_id == load_mirror_id) { |
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// produce a copy of the load mirror instruction for use by the being |
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// initialized case |
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#ifdef ASSERT |
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address start = __ pc(); |
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#endif |
1 | 328 |
jobject o = NULL; |
329 |
__ movoop(_obj, o); |
|
330 |
#ifdef ASSERT |
|
331 |
for (int i = 0; i < _bytes_to_copy; i++) { |
|
332 |
address ptr = (address)(_pc_start + i); |
|
333 |
int a_byte = (*ptr) & 0xFF; |
|
334 |
assert(a_byte == *start++, "should be the same code"); |
|
335 |
} |
|
336 |
#endif |
|
337 |
} else { |
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338 |
// make a copy the code which is going to be patched. |
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for (int i = 0; i < _bytes_to_copy; i++) { |
1 | 340 |
address ptr = (address)(_pc_start + i); |
341 |
int a_byte = (*ptr) & 0xFF; |
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__ emit_int8(a_byte); |
1 | 343 |
*ptr = 0x90; // make the site look like a nop |
344 |
} |
|
345 |
} |
|
346 |
||
347 |
address end_of_patch = __ pc(); |
|
348 |
int bytes_to_skip = 0; |
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if (_id == load_mirror_id) { |
1 | 350 |
int offset = __ offset(); |
351 |
if (CommentedAssembly) { |
|
352 |
__ block_comment(" being_initialized check"); |
|
353 |
} |
|
354 |
assert(_obj != noreg, "must be a valid register"); |
|
355 |
Register tmp = rax; |
|
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356 |
Register tmp2 = rbx; |
1066 | 357 |
__ push(tmp); |
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|
358 |
__ push(tmp2); |
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359 |
// Load without verification to keep code size small. We need it because |
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360 |
// begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null. |
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361 |
__ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes())); |
1 | 362 |
__ get_thread(tmp); |
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|
363 |
__ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset())); |
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|
364 |
__ pop(tmp2); |
1066 | 365 |
__ pop(tmp); |
1 | 366 |
__ jcc(Assembler::notEqual, call_patch); |
367 |
||
368 |
// access_field patches may execute the patched code before it's |
|
369 |
// copied back into place so we need to jump back into the main |
|
370 |
// code of the nmethod to continue execution. |
|
371 |
__ jmp(_patch_site_continuation); |
|
372 |
||
373 |
// make sure this extra code gets skipped |
|
374 |
bytes_to_skip += __ offset() - offset; |
|
375 |
} |
|
376 |
if (CommentedAssembly) { |
|
377 |
__ block_comment("patch data encoded as movl"); |
|
378 |
} |
|
379 |
// Now emit the patch record telling the runtime how to find the |
|
380 |
// pieces of the patch. We only need 3 bytes but for readability of |
|
381 |
// the disassembly we make the data look like a movl reg, imm32, |
|
382 |
// which requires 5 bytes |
|
383 |
int sizeof_patch_record = 5; |
|
384 |
bytes_to_skip += sizeof_patch_record; |
|
385 |
||
386 |
// emit the offsets needed to find the code to patch |
|
387 |
int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record; |
|
388 |
||
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|
389 |
__ emit_int8((unsigned char)0xB8); |
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|
390 |
__ emit_int8(0); |
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|
391 |
__ emit_int8(being_initialized_entry_offset); |
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|
392 |
__ emit_int8(bytes_to_skip); |
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|
393 |
__ emit_int8(_bytes_to_copy); |
1 | 394 |
address patch_info_pc = __ pc(); |
395 |
assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info"); |
|
396 |
||
397 |
address entry = __ pc(); |
|
398 |
NativeGeneralJump::insert_unconditional((address)_pc_start, entry); |
|
399 |
address target = NULL; |
|
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|
400 |
relocInfo::relocType reloc_type = relocInfo::none; |
1 | 401 |
switch (_id) { |
402 |
case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break; |
|
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|
403 |
case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break; |
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|
404 |
case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break; |
1 | 405 |
default: ShouldNotReachHere(); |
406 |
} |
|
407 |
__ bind(call_patch); |
|
408 |
||
409 |
if (CommentedAssembly) { |
|
410 |
__ block_comment("patch entry point"); |
|
411 |
} |
|
412 |
__ call(RuntimeAddress(target)); |
|
413 |
assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change"); |
|
414 |
ce->add_call_info_here(_info); |
|
415 |
int jmp_off = __ offset(); |
|
416 |
__ jmp(_patch_site_entry); |
|
417 |
// Add enough nops so deoptimization can overwrite the jmp above with a call |
|
418 |
// and not destroy the world. |
|
419 |
for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) { |
|
420 |
__ nop(); |
|
421 |
} |
|
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|
422 |
if (_id == load_klass_id || _id == load_mirror_id) { |
1 | 423 |
CodeSection* cs = __ code_section(); |
424 |
RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1)); |
|
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changeset
|
425 |
relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none); |
1 | 426 |
} |
427 |
} |
|
428 |
||
429 |
||
5046 | 430 |
void DeoptimizeStub::emit_code(LIR_Assembler* ce) { |
431 |
__ bind(_entry); |
|
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|
432 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id))); |
5046 | 433 |
ce->add_call_info_here(_info); |
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|
434 |
DEBUG_ONLY(__ should_not_reach_here()); |
5046 | 435 |
} |
436 |
||
437 |
||
1 | 438 |
void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) { |
16611 | 439 |
address a; |
440 |
if (_info->deoptimize_on_exception()) { |
|
441 |
// Deoptimize, do not throw the exception, because it is probably wrong to do it here. |
|
442 |
a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); |
|
443 |
} else { |
|
444 |
a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id); |
|
445 |
} |
|
446 |
||
1 | 447 |
ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); |
448 |
__ bind(_entry); |
|
16611 | 449 |
__ call(RuntimeAddress(a)); |
1 | 450 |
ce->add_call_info_here(_info); |
16611 | 451 |
ce->verify_oop_map(_info); |
1 | 452 |
debug_only(__ should_not_reach_here()); |
453 |
} |
|
454 |
||
455 |
||
456 |
void SimpleExceptionStub::emit_code(LIR_Assembler* ce) { |
|
457 |
assert(__ rsp_offset() == 0, "frame size should be fixed"); |
|
458 |
||
459 |
__ bind(_entry); |
|
460 |
// pass the object on stack because all registers must be preserved |
|
461 |
if (_obj->is_cpu_register()) { |
|
462 |
ce->store_parameter(_obj->as_register(), 0); |
|
463 |
} |
|
464 |
__ call(RuntimeAddress(Runtime1::entry_for(_stub))); |
|
465 |
ce->add_call_info_here(_info); |
|
466 |
debug_only(__ should_not_reach_here()); |
|
467 |
} |
|
468 |
||
469 |
||
470 |
void ArrayCopyStub::emit_code(LIR_Assembler* ce) { |
|
471 |
//---------------slow case: call to native----------------- |
|
472 |
__ bind(_entry); |
|
473 |
// Figure out where the args should go |
|
13728
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diff
changeset
|
474 |
// This should really convert the IntrinsicID to the Method* and signature |
1 | 475 |
// but I don't know how to do that. |
476 |
// |
|
477 |
VMRegPair args[5]; |
|
478 |
BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT}; |
|
479 |
SharedRuntime::java_calling_convention(signature, args, 5, true); |
|
480 |
||
481 |
// push parameters |
|
482 |
// (src, src_pos, dest, destPos, length) |
|
483 |
Register r[5]; |
|
484 |
r[0] = src()->as_register(); |
|
485 |
r[1] = src_pos()->as_register(); |
|
486 |
r[2] = dst()->as_register(); |
|
487 |
r[3] = dst_pos()->as_register(); |
|
488 |
r[4] = length()->as_register(); |
|
489 |
||
490 |
// next registers will get stored on the stack |
|
491 |
for (int i = 0; i < 5 ; i++ ) { |
|
492 |
VMReg r_1 = args[i].first(); |
|
493 |
if (r_1->is_stack()) { |
|
494 |
int st_off = r_1->reg2stack() * wordSize; |
|
1066 | 495 |
__ movptr (Address(rsp, st_off), r[i]); |
1 | 496 |
} else { |
497 |
assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg "); |
|
498 |
} |
|
499 |
} |
|
500 |
||
501 |
ce->align_call(lir_static_call); |
|
502 |
||
503 |
ce->emit_static_call_stub(); |
|
504 |
AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(), |
|
505 |
relocInfo::static_call_type); |
|
506 |
__ call(resolve); |
|
507 |
ce->add_call_info_here(info()); |
|
508 |
||
509 |
#ifndef PRODUCT |
|
1066 | 510 |
__ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt)); |
1 | 511 |
#endif |
512 |
||
513 |
__ jmp(_continuation); |
|
514 |
} |
|
515 |
||
1374 | 516 |
///////////////////////////////////////////////////////////////////////////// |
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jprovino
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diff
changeset
|
517 |
#if INCLUDE_ALL_GCS |
1374 | 518 |
|
519 |
void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { |
|
9176
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7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
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parents:
8729
diff
changeset
|
520 |
// At this point we know that marking is in progress. |
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
521 |
// If do_load() is true then we have to emit the |
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
522 |
// load of the previous value; otherwise it has already |
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
523 |
// been loaded into _pre_val. |
1374 | 524 |
|
525 |
__ bind(_entry); |
|
526 |
assert(pre_val()->is_register(), "Precondition."); |
|
527 |
||
528 |
Register pre_val_reg = pre_val()->as_register(); |
|
529 |
||
9176
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
530 |
if (do_load()) { |
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
531 |
ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); |
42d9d1010f38
7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error
johnc
parents:
8729
diff
changeset
|
532 |
} |
1374 | 533 |
|
1394 | 534 |
__ cmpptr(pre_val_reg, (int32_t) NULL_WORD); |
1374 | 535 |
__ jcc(Assembler::equal, _continuation); |
536 |
ce->store_parameter(pre_val()->as_register(), 0); |
|
537 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); |
|
538 |
__ jmp(_continuation); |
|
539 |
||
540 |
} |
|
541 |
||
542 |
jbyte* G1PostBarrierStub::_byte_map_base = NULL; |
|
543 |
||
544 |
jbyte* G1PostBarrierStub::byte_map_base_slow() { |
|
545 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
|
546 |
assert(bs->is_a(BarrierSet::G1SATBCTLogging), |
|
547 |
"Must be if we're using this."); |
|
548 |
return ((G1SATBCardTableModRefBS*)bs)->byte_map_base; |
|
549 |
} |
|
550 |
||
551 |
void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { |
|
552 |
__ bind(_entry); |
|
553 |
assert(addr()->is_register(), "Precondition."); |
|
554 |
assert(new_val()->is_register(), "Precondition."); |
|
555 |
Register new_val_reg = new_val()->as_register(); |
|
1394 | 556 |
__ cmpptr(new_val_reg, (int32_t) NULL_WORD); |
1374 | 557 |
__ jcc(Assembler::equal, _continuation); |
6970 | 558 |
ce->store_parameter(addr()->as_pointer_register(), 0); |
1374 | 559 |
__ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); |
560 |
__ jmp(_continuation); |
|
561 |
} |
|
562 |
||
15482
470d0b0c09f1
8005915: Unify SERIALGC and INCLUDE_ALTERNATE_GCS
jprovino
parents:
14837
diff
changeset
|
563 |
#endif // INCLUDE_ALL_GCS |
1374 | 564 |
///////////////////////////////////////////////////////////////////////////// |
1 | 565 |
|
566 |
#undef __ |