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/*
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* Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "c1/c1_Runtime1.hpp"
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#include "classfile/systemDictionary.hpp"
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#include "gc/shared/collectedHeap.hpp"
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#include "interpreter/interpreter.hpp"
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#include "oops/arrayOop.hpp"
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#include "oops/markOop.hpp"
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#include "runtime/basicLock.hpp"
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#include "runtime/biasedLocking.hpp"
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#include "runtime/os.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubRoutines.hpp"
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// Note: Rtemp usage is this file should not impact C2 and should be
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// correct as long as it is not implicitly used in lower layers (the
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// arm [macro]assembler) and used with care in the other C1 specific
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// files.
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void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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Label verified;
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load_klass(Rtemp, receiver);
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cmp(Rtemp, iCache);
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b(verified, eq); // jump over alignment no-ops
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#ifdef AARCH64
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jump(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type, Rtemp);
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#else
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jump(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
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#endif
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align(CodeEntryAlignment);
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bind(verified);
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}
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void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes) {
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assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
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assert((frame_size_in_bytes % StackAlignmentInBytes) == 0, "frame size should be aligned");
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#ifdef AARCH64
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// Extra nop for MT-safe patching in NativeJump::patch_verified_entry
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nop();
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#endif // AARCH64
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arm_stack_overflow_check(bang_size_in_bytes, Rtemp);
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// FP can no longer be used to memorize SP. It may be modified
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// if this method contains a methodHandle call site
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raw_push(FP, LR);
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sub_slow(SP, SP, frame_size_in_bytes);
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}
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void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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add_slow(SP, SP, frame_size_in_bytes);
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raw_pop(FP, LR);
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}
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void C1_MacroAssembler::verified_entry() {
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if (C1Breakpoint) {
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breakpoint();
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}
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}
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// Puts address of allocated object into register `obj` and end of allocated object into register `obj_end`.
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void C1_MacroAssembler::try_allocate(Register obj, Register obj_end, Register tmp1, Register tmp2,
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RegisterOrConstant size_expression, Label& slow_case) {
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if (UseTLAB) {
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tlab_allocate(obj, obj_end, tmp1, size_expression, slow_case);
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} else {
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eden_allocate(obj, obj_end, tmp1, tmp2, size_expression, slow_case);
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incr_allocated_bytes(size_expression, tmp1);
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}
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}
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void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp) {
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assert_different_registers(obj, klass, len, tmp);
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if(UseBiasedLocking && !len->is_valid()) {
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ldr(tmp, Address(klass, Klass::prototype_header_offset()));
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} else {
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mov(tmp, (intptr_t)markOopDesc::prototype());
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}
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#ifdef AARCH64
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if (UseCompressedClassPointers) {
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str(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
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encode_klass_not_null(tmp, klass); // Take care not to kill klass
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str_w(tmp, Address(obj, oopDesc::klass_offset_in_bytes()));
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} else {
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assert(oopDesc::mark_offset_in_bytes() + wordSize == oopDesc::klass_offset_in_bytes(), "adjust this code");
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stp(tmp, klass, Address(obj, oopDesc::mark_offset_in_bytes()));
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}
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#else
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str(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
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str(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
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#endif // AARCH64
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if (len->is_valid()) {
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str_32(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
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}
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#ifdef AARCH64
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else if (UseCompressedClassPointers) {
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store_klass_gap(obj);
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}
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#endif // AARCH64
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}
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// Cleans object body [base..obj_end]. Clobbers `base` and `tmp` registers.
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void C1_MacroAssembler::initialize_body(Register base, Register obj_end, Register tmp) {
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zero_memory(base, obj_end, tmp);
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}
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void C1_MacroAssembler::initialize_object(Register obj, Register obj_end, Register klass,
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Register len, Register tmp1, Register tmp2,
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RegisterOrConstant header_size, int obj_size_in_bytes,
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bool is_tlab_allocated)
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{
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assert_different_registers(obj, obj_end, klass, len, tmp1, tmp2);
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initialize_header(obj, klass, len, tmp1);
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const Register ptr = tmp2;
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if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
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#ifdef AARCH64
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if (obj_size_in_bytes < 0) {
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add_rc(ptr, obj, header_size);
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initialize_body(ptr, obj_end, tmp1);
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} else {
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int base = instanceOopDesc::header_size() * HeapWordSize;
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assert(obj_size_in_bytes >= base, "should be");
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const int zero_bytes = obj_size_in_bytes - base;
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assert((zero_bytes % wordSize) == 0, "should be");
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if ((zero_bytes % (2*wordSize)) != 0) {
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str(ZR, Address(obj, base));
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base += wordSize;
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}
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const int stp_count = zero_bytes / (2*wordSize);
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if (zero_bytes > 8 * wordSize) {
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Label loop;
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add(ptr, obj, base);
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mov(tmp1, stp_count);
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bind(loop);
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subs(tmp1, tmp1, 1);
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stp(ZR, ZR, Address(ptr, 2*wordSize, post_indexed));
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b(loop, gt);
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} else {
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for (int i = 0; i < stp_count; i++) {
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stp(ZR, ZR, Address(obj, base + i * 2 * wordSize));
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}
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}
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}
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#else
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if (obj_size_in_bytes >= 0 && obj_size_in_bytes <= 8 * BytesPerWord) {
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mov(tmp1, 0);
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const int base = instanceOopDesc::header_size() * HeapWordSize;
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for (int i = base; i < obj_size_in_bytes; i += wordSize) {
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str(tmp1, Address(obj, i));
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}
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} else {
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assert(header_size.is_constant() || header_size.as_register() == ptr, "code assumption");
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add(ptr, obj, header_size);
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initialize_body(ptr, obj_end, tmp1);
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}
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#endif // AARCH64
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}
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// StoreStore barrier required after complete initialization
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// (headers + content zeroing), before the object may escape.
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membar(MacroAssembler::StoreStore, tmp1);
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}
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void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, Register tmp3,
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int header_size, int object_size,
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Register klass, Label& slow_case) {
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assert_different_registers(obj, tmp1, tmp2, tmp3, klass, Rtemp);
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assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
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const int object_size_in_bytes = object_size * BytesPerWord;
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const Register obj_end = tmp1;
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const Register len = noreg;
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if (Assembler::is_arith_imm_in_range(object_size_in_bytes)) {
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try_allocate(obj, obj_end, tmp2, tmp3, object_size_in_bytes, slow_case);
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} else {
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// Rtemp should be free at c1 LIR level
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mov_slow(Rtemp, object_size_in_bytes);
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try_allocate(obj, obj_end, tmp2, tmp3, Rtemp, slow_case);
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}
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initialize_object(obj, obj_end, klass, len, tmp2, tmp3, instanceOopDesc::header_size() * HeapWordSize, object_size_in_bytes, /* is_tlab_allocated */ UseTLAB);
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}
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void C1_MacroAssembler::allocate_array(Register obj, Register len,
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Register tmp1, Register tmp2, Register tmp3,
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int header_size, int element_size,
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Register klass, Label& slow_case) {
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assert_different_registers(obj, len, tmp1, tmp2, tmp3, klass, Rtemp);
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const int header_size_in_bytes = header_size * BytesPerWord;
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const int scale_shift = exact_log2(element_size);
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const Register obj_size = Rtemp; // Rtemp should be free at c1 LIR level
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#ifdef AARCH64
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mov_slow(Rtemp, max_array_allocation_length);
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cmp_32(len, Rtemp);
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#else
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cmp_32(len, max_array_allocation_length);
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#endif // AARCH64
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b(slow_case, hs);
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bool align_header = ((header_size_in_bytes | element_size) & MinObjAlignmentInBytesMask) != 0;
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assert(align_header || ((header_size_in_bytes & MinObjAlignmentInBytesMask) == 0), "must be");
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assert(align_header || ((element_size & MinObjAlignmentInBytesMask) == 0), "must be");
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mov(obj_size, header_size_in_bytes + (align_header ? (MinObjAlignmentInBytes - 1) : 0));
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add_ptr_scaled_int32(obj_size, obj_size, len, scale_shift);
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if (align_header) {
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align_reg(obj_size, obj_size, MinObjAlignmentInBytes);
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}
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try_allocate(obj, tmp1, tmp2, tmp3, obj_size, slow_case);
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initialize_object(obj, tmp1, klass, len, tmp2, tmp3, header_size_in_bytes, -1, /* is_tlab_allocated */ UseTLAB);
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}
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int C1_MacroAssembler::lock_object(Register hdr, Register obj,
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Register disp_hdr, Register tmp1,
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Label& slow_case) {
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Label done, fast_lock, fast_lock_done;
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int null_check_offset = 0;
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const Register tmp2 = Rtemp; // Rtemp should be free at c1 LIR level
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assert_different_registers(hdr, obj, disp_hdr, tmp1, tmp2);
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assert(BasicObjectLock::lock_offset_in_bytes() == 0, "ajust this code");
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const int obj_offset = BasicObjectLock::obj_offset_in_bytes();
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const int mark_offset = BasicLock::displaced_header_offset_in_bytes();
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if (UseBiasedLocking) {
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// load object
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str(obj, Address(disp_hdr, obj_offset));
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null_check_offset = biased_locking_enter(obj, hdr/*scratched*/, tmp1, false, tmp2, done, slow_case);
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}
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assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
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#ifdef AARCH64
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str(obj, Address(disp_hdr, obj_offset));
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if (!UseBiasedLocking) {
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null_check_offset = offset();
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}
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ldr(hdr, obj);
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// Test if object is already locked
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assert(markOopDesc::unlocked_value == 1, "adjust this code");
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tbnz(hdr, exact_log2(markOopDesc::unlocked_value), fast_lock);
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// Check for recursive locking
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// See comments in InterpreterMacroAssembler::lock_object for
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// explanations on the fast recursive locking check.
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intptr_t mask = ((intptr_t)3) - ((intptr_t)os::vm_page_size());
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Assembler::LogicalImmediate imm(mask, false);
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mov(tmp2, SP);
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sub(tmp2, hdr, tmp2);
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ands(tmp2, tmp2, imm);
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b(slow_case, ne);
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// Recursive locking: store 0 into a lock record
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str(ZR, Address(disp_hdr, mark_offset));
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b(fast_lock_done);
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#else // AARCH64
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if (!UseBiasedLocking) {
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null_check_offset = offset();
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}
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// On MP platforms the next load could return a 'stale' value if the memory location has been modified by another thread.
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// That would be acceptable as ether CAS or slow case path is taken in that case.
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// Must be the first instruction here, because implicit null check relies on it
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ldr(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
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str(obj, Address(disp_hdr, obj_offset));
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tst(hdr, markOopDesc::unlocked_value);
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b(fast_lock, ne);
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// Check for recursive locking
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// See comments in InterpreterMacroAssembler::lock_object for
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// explanations on the fast recursive locking check.
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// -1- test low 2 bits
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movs(tmp2, AsmOperand(hdr, lsl, 30));
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// -2- test (hdr - SP) if the low two bits are 0
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sub(tmp2, hdr, SP, eq);
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movs(tmp2, AsmOperand(tmp2, lsr, exact_log2(os::vm_page_size())), eq);
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// If 'eq' then OK for recursive fast locking: store 0 into a lock record.
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str(tmp2, Address(disp_hdr, mark_offset), eq);
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b(fast_lock_done, eq);
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// else need slow case
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b(slow_case);
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#endif // AARCH64
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bind(fast_lock);
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// Save previous object header in BasicLock structure and update the header
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str(hdr, Address(disp_hdr, mark_offset));
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cas_for_lock_acquire(hdr, disp_hdr, obj, tmp2, slow_case);
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bind(fast_lock_done);
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#ifndef PRODUCT
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if (PrintBiasedLockingStatistics) {
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cond_atomic_inc32(al, BiasedLocking::fast_path_entry_count_addr());
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}
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#endif // !PRODUCT
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bind(done);
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return null_check_offset;
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}
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void C1_MacroAssembler::unlock_object(Register hdr, Register obj,
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Register disp_hdr, Register tmp,
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Label& slow_case) {
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// Note: this method is not using its 'tmp' argument
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assert_different_registers(hdr, obj, disp_hdr, Rtemp);
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Register tmp2 = Rtemp;
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assert(BasicObjectLock::lock_offset_in_bytes() == 0, "ajust this code");
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const int obj_offset = BasicObjectLock::obj_offset_in_bytes();
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const int mark_offset = BasicLock::displaced_header_offset_in_bytes();
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Label done;
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if (UseBiasedLocking) {
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// load object
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ldr(obj, Address(disp_hdr, obj_offset));
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biased_locking_exit(obj, hdr, done);
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}
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372 |
assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
|
|
373 |
Label retry;
|
|
374 |
|
|
375 |
// Load displaced header and object from the lock
|
|
376 |
ldr(hdr, Address(disp_hdr, mark_offset));
|
|
377 |
// If hdr is NULL, we've got recursive locking and there's nothing more to do
|
|
378 |
cbz(hdr, done);
|
|
379 |
|
|
380 |
if(!UseBiasedLocking) {
|
|
381 |
// load object
|
|
382 |
ldr(obj, Address(disp_hdr, obj_offset));
|
|
383 |
}
|
|
384 |
|
|
385 |
// Restore the object header
|
|
386 |
cas_for_lock_release(disp_hdr, hdr, obj, tmp2, slow_case);
|
|
387 |
|
|
388 |
bind(done);
|
|
389 |
}
|
|
390 |
|
|
391 |
|
|
392 |
#ifndef PRODUCT
|
|
393 |
|
|
394 |
void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
|
|
395 |
if (!VerifyOops) return;
|
|
396 |
verify_oop_addr(Address(SP, stack_offset));
|
|
397 |
}
|
|
398 |
|
|
399 |
void C1_MacroAssembler::verify_not_null_oop(Register r) {
|
|
400 |
Label not_null;
|
|
401 |
cbnz(r, not_null);
|
|
402 |
stop("non-null oop required");
|
|
403 |
bind(not_null);
|
|
404 |
if (!VerifyOops) return;
|
|
405 |
verify_oop(r);
|
|
406 |
}
|
|
407 |
|
|
408 |
#endif // !PRODUCT
|