author | shade |
Thu, 04 Feb 2016 21:44:23 +0300 | |
changeset 35708 | 290a3952e434 |
parent 30552 | ff209a4a81b5 |
permissions | -rw-r--r-- |
29184 | 1 |
/* |
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* Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. |
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* Copyright (c) 2014, Red Hat Inc. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
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* |
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*/ |
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#include "precompiled.hpp" |
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#include "c1/c1_FrameMap.hpp" |
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#include "c1/c1_LIR.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "vmreg_aarch64.inline.hpp" |
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LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) { |
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LIR_Opr opr = LIR_OprFact::illegalOpr; |
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VMReg r_1 = reg->first(); |
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VMReg r_2 = reg->second(); |
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if (r_1->is_stack()) { |
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// Convert stack slot to an SP offset |
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// The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value |
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// so we must add it in here. |
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int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; |
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opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type)); |
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} else if (r_1->is_Register()) { |
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Register reg = r_1->as_Register(); |
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if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) { |
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Register reg2 = r_2->as_Register(); |
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assert(reg2 == reg, "must be same register"); |
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opr = as_long_opr(reg); |
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} else if (type == T_OBJECT || type == T_ARRAY) { |
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opr = as_oop_opr(reg); |
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} else if (type == T_METADATA) { |
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opr = as_metadata_opr(reg); |
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} else { |
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opr = as_opr(reg); |
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} |
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} else if (r_1->is_FloatRegister()) { |
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assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); |
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int num = r_1->as_FloatRegister()->encoding(); |
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if (type == T_FLOAT) { |
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opr = LIR_OprFact::single_fpu(num); |
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} else { |
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opr = LIR_OprFact::double_fpu(num); |
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} |
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} else { |
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ShouldNotReachHere(); |
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} |
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return opr; |
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} |
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LIR_Opr FrameMap::r0_opr; |
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LIR_Opr FrameMap::r1_opr; |
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LIR_Opr FrameMap::r2_opr; |
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LIR_Opr FrameMap::r3_opr; |
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LIR_Opr FrameMap::r4_opr; |
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LIR_Opr FrameMap::r5_opr; |
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LIR_Opr FrameMap::r6_opr; |
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LIR_Opr FrameMap::r7_opr; |
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LIR_Opr FrameMap::r8_opr; |
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LIR_Opr FrameMap::r9_opr; |
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LIR_Opr FrameMap::r10_opr; |
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LIR_Opr FrameMap::r11_opr; |
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LIR_Opr FrameMap::r12_opr; |
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LIR_Opr FrameMap::r13_opr; |
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LIR_Opr FrameMap::r14_opr; |
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LIR_Opr FrameMap::r15_opr; |
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LIR_Opr FrameMap::r16_opr; |
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LIR_Opr FrameMap::r17_opr; |
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LIR_Opr FrameMap::r18_opr; |
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LIR_Opr FrameMap::r19_opr; |
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LIR_Opr FrameMap::r20_opr; |
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LIR_Opr FrameMap::r21_opr; |
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LIR_Opr FrameMap::r22_opr; |
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LIR_Opr FrameMap::r23_opr; |
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LIR_Opr FrameMap::r24_opr; |
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LIR_Opr FrameMap::r25_opr; |
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LIR_Opr FrameMap::r26_opr; |
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LIR_Opr FrameMap::r27_opr; |
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LIR_Opr FrameMap::r28_opr; |
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LIR_Opr FrameMap::r29_opr; |
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LIR_Opr FrameMap::r30_opr; |
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LIR_Opr FrameMap::rfp_opr; |
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LIR_Opr FrameMap::sp_opr; |
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LIR_Opr FrameMap::receiver_opr; |
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LIR_Opr FrameMap::r0_oop_opr; |
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LIR_Opr FrameMap::r1_oop_opr; |
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LIR_Opr FrameMap::r2_oop_opr; |
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LIR_Opr FrameMap::r3_oop_opr; |
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LIR_Opr FrameMap::r4_oop_opr; |
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LIR_Opr FrameMap::r5_oop_opr; |
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LIR_Opr FrameMap::r6_oop_opr; |
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LIR_Opr FrameMap::r7_oop_opr; |
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LIR_Opr FrameMap::r8_oop_opr; |
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LIR_Opr FrameMap::r9_oop_opr; |
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LIR_Opr FrameMap::r10_oop_opr; |
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LIR_Opr FrameMap::r11_oop_opr; |
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LIR_Opr FrameMap::r12_oop_opr; |
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LIR_Opr FrameMap::r13_oop_opr; |
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LIR_Opr FrameMap::r14_oop_opr; |
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LIR_Opr FrameMap::r15_oop_opr; |
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LIR_Opr FrameMap::r16_oop_opr; |
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LIR_Opr FrameMap::r17_oop_opr; |
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LIR_Opr FrameMap::r18_oop_opr; |
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LIR_Opr FrameMap::r19_oop_opr; |
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LIR_Opr FrameMap::r20_oop_opr; |
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LIR_Opr FrameMap::r21_oop_opr; |
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LIR_Opr FrameMap::r22_oop_opr; |
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LIR_Opr FrameMap::r23_oop_opr; |
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LIR_Opr FrameMap::r24_oop_opr; |
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LIR_Opr FrameMap::r25_oop_opr; |
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LIR_Opr FrameMap::r26_oop_opr; |
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LIR_Opr FrameMap::r27_oop_opr; |
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LIR_Opr FrameMap::r28_oop_opr; |
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LIR_Opr FrameMap::r29_oop_opr; |
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LIR_Opr FrameMap::r30_oop_opr; |
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LIR_Opr FrameMap::rscratch1_opr; |
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LIR_Opr FrameMap::rscratch2_opr; |
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LIR_Opr FrameMap::rscratch1_long_opr; |
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LIR_Opr FrameMap::rscratch2_long_opr; |
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LIR_Opr FrameMap::r0_metadata_opr; |
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LIR_Opr FrameMap::r1_metadata_opr; |
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LIR_Opr FrameMap::r2_metadata_opr; |
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LIR_Opr FrameMap::r3_metadata_opr; |
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LIR_Opr FrameMap::r4_metadata_opr; |
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LIR_Opr FrameMap::r5_metadata_opr; |
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LIR_Opr FrameMap::long0_opr; |
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LIR_Opr FrameMap::long1_opr; |
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LIR_Opr FrameMap::fpu0_float_opr; |
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LIR_Opr FrameMap::fpu0_double_opr; |
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LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; |
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LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, }; |
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//-------------------------------------------------------- |
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// FrameMap |
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//-------------------------------------------------------- |
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void FrameMap::initialize() { |
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assert(!_init_done, "once"); |
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int i=0; |
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map_register(i, r0); r0_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r1); r1_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r2); r2_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r3); r3_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r4); r4_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r5); r5_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r6); r6_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r7); r7_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r10); r10_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r11); r11_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r12); r12_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r13); r13_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r14); r14_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r15); r15_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r16); r16_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r17); r17_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r18); r18_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r19); r19_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r20); r20_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r21); r21_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r22); r22_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r23); r23_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r24); r24_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r25); r25_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r26); r26_opr = LIR_OprFact::single_cpu(i); i++; |
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map_register(i, r27); r27_opr = LIR_OprFact::single_cpu(i); i++; // rheapbase |
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map_register(i, r28); r28_opr = LIR_OprFact::single_cpu(i); i++; // rthread |
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map_register(i, r29); r29_opr = LIR_OprFact::single_cpu(i); i++; // rfp |
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map_register(i, r30); r30_opr = LIR_OprFact::single_cpu(i); i++; // lr |
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map_register(i, r31_sp); sp_opr = LIR_OprFact::single_cpu(i); i++; // sp |
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map_register(i, r8); r8_opr = LIR_OprFact::single_cpu(i); i++; // rscratch1 |
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map_register(i, r9); r9_opr = LIR_OprFact::single_cpu(i); i++; // rscratch2 |
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rscratch1_opr = r8_opr; |
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rscratch2_opr = r9_opr; |
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rscratch1_long_opr = LIR_OprFact::double_cpu(r8_opr->cpu_regnr(), r8_opr->cpu_regnr()); |
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rscratch2_long_opr = LIR_OprFact::double_cpu(r9_opr->cpu_regnr(), r9_opr->cpu_regnr()); |
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long0_opr = LIR_OprFact::double_cpu(0, 0); |
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long1_opr = LIR_OprFact::double_cpu(1, 1); |
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fpu0_float_opr = LIR_OprFact::single_fpu(0); |
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fpu0_double_opr = LIR_OprFact::double_fpu(0); |
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_caller_save_cpu_regs[0] = r0_opr; |
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_caller_save_cpu_regs[1] = r1_opr; |
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_caller_save_cpu_regs[2] = r2_opr; |
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_caller_save_cpu_regs[3] = r3_opr; |
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_caller_save_cpu_regs[4] = r4_opr; |
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_caller_save_cpu_regs[5] = r5_opr; |
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_caller_save_cpu_regs[6] = r6_opr; |
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_caller_save_cpu_regs[7] = r7_opr; |
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// rscratch1, rscratch 2 not included |
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_caller_save_cpu_regs[8] = r10_opr; |
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_caller_save_cpu_regs[9] = r11_opr; |
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_caller_save_cpu_regs[10] = r12_opr; |
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_caller_save_cpu_regs[11] = r13_opr; |
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_caller_save_cpu_regs[12] = r14_opr; |
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_caller_save_cpu_regs[13] = r15_opr; |
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_caller_save_cpu_regs[14] = r16_opr; |
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_caller_save_cpu_regs[15] = r17_opr; |
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_caller_save_cpu_regs[16] = r18_opr; |
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for (int i = 0; i < 8; i++) { |
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_caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); |
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} |
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_init_done = true; |
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r0_oop_opr = as_oop_opr(r0); |
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r1_oop_opr = as_oop_opr(r1); |
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r2_oop_opr = as_oop_opr(r2); |
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r3_oop_opr = as_oop_opr(r3); |
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r4_oop_opr = as_oop_opr(r4); |
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r5_oop_opr = as_oop_opr(r5); |
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r6_oop_opr = as_oop_opr(r6); |
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r7_oop_opr = as_oop_opr(r7); |
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r8_oop_opr = as_oop_opr(r8); |
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r9_oop_opr = as_oop_opr(r9); |
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r10_oop_opr = as_oop_opr(r10); |
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r11_oop_opr = as_oop_opr(r11); |
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r12_oop_opr = as_oop_opr(r12); |
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r13_oop_opr = as_oop_opr(r13); |
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r14_oop_opr = as_oop_opr(r14); |
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r15_oop_opr = as_oop_opr(r15); |
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r16_oop_opr = as_oop_opr(r16); |
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r17_oop_opr = as_oop_opr(r17); |
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r18_oop_opr = as_oop_opr(r18); |
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r19_oop_opr = as_oop_opr(r19); |
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r20_oop_opr = as_oop_opr(r20); |
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r21_oop_opr = as_oop_opr(r21); |
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r22_oop_opr = as_oop_opr(r22); |
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r23_oop_opr = as_oop_opr(r23); |
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r24_oop_opr = as_oop_opr(r24); |
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r25_oop_opr = as_oop_opr(r25); |
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r26_oop_opr = as_oop_opr(r26); |
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r27_oop_opr = as_oop_opr(r27); |
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r28_oop_opr = as_oop_opr(r28); |
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r29_oop_opr = as_oop_opr(r29); |
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r30_oop_opr = as_oop_opr(r30); |
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r0_metadata_opr = as_metadata_opr(r0); |
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r1_metadata_opr = as_metadata_opr(r1); |
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r2_metadata_opr = as_metadata_opr(r2); |
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r3_metadata_opr = as_metadata_opr(r3); |
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r4_metadata_opr = as_metadata_opr(r4); |
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r5_metadata_opr = as_metadata_opr(r5); |
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sp_opr = as_pointer_opr(r31_sp); |
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rfp_opr = as_pointer_opr(rfp); |
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VMRegPair regs; |
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BasicType sig_bt = T_OBJECT; |
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SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true); |
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receiver_opr = as_oop_opr(regs.first()->as_Register()); |
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for (int i = 0; i < nof_caller_save_fpu_regs; i++) { |
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_caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); |
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} |
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} |
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Address FrameMap::make_new_address(ByteSize sp_offset) const { |
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// for rbp, based address use this: |
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// return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4); |
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return Address(sp, in_bytes(sp_offset)); |
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} |
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// ----------------mapping----------------------- |
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297 |
// all mapping is based on rfp addressing, except for simple leaf methods where we access |
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298 |
// the locals sp based (and no frame is built) |
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299 |
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300 |
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// Frame for simple leaf methods (quick entries) |
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// |
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// +----------+ |
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// | ret addr | <- TOS |
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// +----------+ |
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// | args | |
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// | ...... | |
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// Frame for standard methods |
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// |
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// | .........| <- TOS |
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// | locals | |
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// +----------+ |
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// | old fp, | <- RFP |
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// +----------+ |
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// | ret addr | |
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// +----------+ |
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// | args | |
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// | .........| |
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320 |
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// For OopMaps, map a local variable or spill index to an VMRegImpl name. |
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323 |
// This is the offset from sp() in the frame of the slot for the index, |
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324 |
// skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.) |
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// |
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// framesize + |
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327 |
// stack0 stack0 0 <- VMReg |
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328 |
// | | <registers> | |
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329 |
// ...........|..............|.............| |
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330 |
// 0 1 2 3 x x 4 5 6 ... | <- local indices |
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331 |
// ^ ^ sp() ( x x indicate link |
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332 |
// | | and return addr) |
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333 |
// arguments non-argument locals |
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334 |
||
335 |
||
336 |
VMReg FrameMap::fpu_regname (int n) { |
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337 |
// Return the OptoReg name for the fpu stack slot "n" |
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338 |
// A spilled fpu stack slot comprises to two single-word OptoReg's. |
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339 |
return as_FloatRegister(n)->as_VMReg(); |
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340 |
} |
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341 |
||
342 |
LIR_Opr FrameMap::stack_pointer() { |
|
343 |
return FrameMap::sp_opr; |
|
344 |
} |
|
345 |
||
346 |
||
347 |
// JSR 292 |
|
348 |
LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() { |
|
30552
ff209a4a81b5
8079564: Use FP register as proper frame pointer in JIT compiled code on aarch64
enevill
parents:
29184
diff
changeset
|
349 |
return LIR_OprFact::illegalOpr; // Not needed on aarch64 |
29184 | 350 |
} |
351 |
||
352 |
||
353 |
bool FrameMap::validate_frame() { |
|
354 |
return true; |
|
355 |
} |