hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.cpp
author twisti
Tue, 09 Mar 2010 20:16:19 +0100
changeset 5046 27e801a857cb
parent 2867 69187054225f
child 5547 f4b087cbb361
permissions -rw-r--r--
6919934: JSR 292 needs to support x86 C1 Summary: This implements JSR 292 support for C1 x86. Reviewed-by: never, jrose, kvn
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/*
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 * Copyright 1999-2010 Sun Microsystems, Inc.  All Rights Reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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 * CA 95054 USA or visit www.sun.com if you need additional information or
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 * have any questions.
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 *
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 */
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#include "incls/_precompiled.incl"
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#include "incls/_c1_MacroAssembler_sparc.cpp.incl"
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void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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  Label L;
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  const Register temp_reg = G3_scratch;
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  // Note: needs more testing of out-of-line vs. inline slow case
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  verify_oop(receiver);
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  ld_ptr(receiver, oopDesc::klass_offset_in_bytes(), temp_reg);
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  cmp(temp_reg, iCache);
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  brx(Assembler::equal, true, Assembler::pt, L);
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  delayed()->nop();
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  AddressLiteral ic_miss(SharedRuntime::get_ic_miss_stub());
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  jump_to(ic_miss, temp_reg);
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  delayed()->nop();
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  align(CodeEntryAlignment);
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  bind(L);
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}
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void C1_MacroAssembler::explicit_null_check(Register base) {
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  Unimplemented();
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}
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void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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  generate_stack_overflow_check(frame_size_in_bytes);
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  // Create the frame.
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  save_frame_c1(frame_size_in_bytes);
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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  if (C1Breakpoint) breakpoint_trap();
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  inline_cache_check(receiver, ic_klass);
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}
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void C1_MacroAssembler::verified_entry() {
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  if (C1Breakpoint) breakpoint_trap();
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  // build frame
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  verify_FPU(0, "method_entry");
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}
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void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox, Register Rscratch, Label& slow_case) {
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  assert_different_registers(Rmark, Roop, Rbox, Rscratch);
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  Label done;
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  Address mark_addr(Roop, oopDesc::mark_offset_in_bytes());
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  // The following move must be the first instruction of emitted since debug
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  // information may be generated for it.
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  // Load object header
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  ld_ptr(mark_addr, Rmark);
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  verify_oop(Roop);
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  // save object being locked into the BasicObjectLock
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  st_ptr(Roop, Rbox, BasicObjectLock::obj_offset_in_bytes());
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  if (UseBiasedLocking) {
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    biased_locking_enter(Roop, Rmark, Rscratch, done, &slow_case);
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  }
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  // Save Rbox in Rscratch to be used for the cas operation
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  mov(Rbox, Rscratch);
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  // and mark it unlocked
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  or3(Rmark, markOopDesc::unlocked_value, Rmark);
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  // save unlocked object header into the displaced header location on the stack
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  st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
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  // compare object markOop with Rmark and if equal exchange Rscratch with object markOop
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  assert(mark_addr.disp() == 0, "cas must take a zero displacement");
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  casx_under_lock(mark_addr.base(), Rmark, Rscratch, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
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  // if compare/exchange succeeded we found an unlocked object and we now have locked it
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  // hence we are done
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  cmp(Rmark, Rscratch);
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  brx(Assembler::equal, false, Assembler::pt, done);
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  delayed()->sub(Rscratch, SP, Rscratch);  //pull next instruction into delay slot
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  // we did not find an unlocked object so see if this is a recursive case
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  // sub(Rscratch, SP, Rscratch);
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  assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
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  andcc(Rscratch, 0xfffff003, Rscratch);
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  brx(Assembler::notZero, false, Assembler::pn, slow_case);
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  delayed()->st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
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  bind(done);
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}
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void C1_MacroAssembler::unlock_object(Register Rmark, Register Roop, Register Rbox, Label& slow_case) {
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  assert_different_registers(Rmark, Roop, Rbox);
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  Label done;
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  Address mark_addr(Roop, oopDesc::mark_offset_in_bytes());
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  assert(mark_addr.disp() == 0, "cas must take a zero displacement");
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  if (UseBiasedLocking) {
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    // load the object out of the BasicObjectLock
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    ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop);
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    verify_oop(Roop);
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    biased_locking_exit(mark_addr, Rmark, done);
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  }
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  // Test first it it is a fast recursive unlock
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  ld_ptr(Rbox, BasicLock::displaced_header_offset_in_bytes(), Rmark);
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  br_null(Rmark, false, Assembler::pt, done);
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  delayed()->nop();
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  if (!UseBiasedLocking) {
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    // load object
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    ld_ptr(Rbox, BasicObjectLock::obj_offset_in_bytes(), Roop);
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    verify_oop(Roop);
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  }
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  // Check if it is still a light weight lock, this is is true if we see
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  // the stack address of the basicLock in the markOop of the object
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  casx_under_lock(mark_addr.base(), Rbox, Rmark, (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
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  cmp(Rbox, Rmark);
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  brx(Assembler::notEqual, false, Assembler::pn, slow_case);
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  delayed()->nop();
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  // Done
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  bind(done);
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}
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void C1_MacroAssembler::try_allocate(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
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  int      con_size_in_bytes,          // object size in bytes if   known at compile time
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  Register t1,                         // temp register
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  Register t2,                         // temp register
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  Label&   slow_case                   // continuation point if fast allocation fails
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) {
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  if (UseTLAB) {
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    tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
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  } else {
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    eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
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  }
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}
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void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
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  assert_different_registers(obj, klass, len, t1, t2);
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  if (UseBiasedLocking && !len->is_valid()) {
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    ld_ptr(klass, Klass::prototype_header_offset_in_bytes() + klassOopDesc::klass_part_offset_in_bytes(), t1);
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  } else {
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    set((intx)markOopDesc::prototype(), t1);
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  }
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  st_ptr(t1  , obj, oopDesc::mark_offset_in_bytes       ());
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  st_ptr(klass, obj, oopDesc::klass_offset_in_bytes      ());
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  if (len->is_valid()) st(len  , obj, arrayOopDesc::length_offset_in_bytes());
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}
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void C1_MacroAssembler::initialize_body(Register base, Register index) {
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  assert_different_registers(base, index);
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  Label loop;
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  bind(loop);
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  subcc(index, HeapWordSize, index);
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  brx(Assembler::greaterEqual, true, Assembler::pt, loop);
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  delayed()->st_ptr(G0, base, index);
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}
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void C1_MacroAssembler::allocate_object(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register t1,                         // temp register
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  Register t2,                         // temp register
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  Register t3,                         // temp register
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  int      hdr_size,                   // object header size in words
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  int      obj_size,                   // object size in words
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  Register klass,                      // object klass
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  Label&   slow_case                   // continuation point if fast allocation fails
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) {
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  assert_different_registers(obj, t1, t2, t3, klass);
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  assert(klass == G5, "must be G5");
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  // allocate space & initialize header
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  if (!is_simm13(obj_size * wordSize)) {
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    // would need to use extra register to load
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    // object size => go the slow case for now
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    br(Assembler::always, false, Assembler::pt, slow_case);
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    delayed()->nop();
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    return;
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  }
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  try_allocate(obj, noreg, obj_size * wordSize, t2, t3, slow_case);
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  initialize_object(obj, klass, noreg, obj_size * HeapWordSize, t1, t2);
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}
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void C1_MacroAssembler::initialize_object(
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  Register obj,                        // result: pointer to object after successful allocation
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  Register klass,                      // object klass
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  Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
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  int      con_size_in_bytes,          // object size in bytes if   known at compile time
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  Register t1,                         // temp register
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  Register t2                          // temp register
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  ) {
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  const int hdr_size_in_bytes = instanceOopDesc::base_offset_in_bytes();
1
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  initialize_header(obj, klass, noreg, t1, t2);
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   231
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#ifdef ASSERT
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  {
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   234
    Label ok;
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    ld(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), t1);
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   236
    if (var_size_in_bytes != noreg) {
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      cmp(t1, var_size_in_bytes);
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   238
    } else {
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      cmp(t1, con_size_in_bytes);
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    }
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   241
    brx(Assembler::equal, false, Assembler::pt, ok);
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    delayed()->nop();
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    stop("bad size in initialize_object");
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    should_not_reach_here();
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   245
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    bind(ok);
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  }
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   248
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   249
#endif
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   250
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  // initialize body
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  const int threshold = 5 * HeapWordSize;              // approximate break even point for code size
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  if (var_size_in_bytes != noreg) {
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    // use a loop
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    add(obj, hdr_size_in_bytes, t1);               // compute address of first element
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    sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body
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    initialize_body(t1, t2);
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   258
#ifndef _LP64
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   259
  } else if (VM_Version::v9_instructions_work() && con_size_in_bytes < threshold * 2) {
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    // on v9 we can do double word stores to fill twice as much space.
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    assert(hdr_size_in_bytes % 8 == 0, "double word aligned");
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    assert(con_size_in_bytes % 8 == 0, "double word aligned");
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    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += 2 * HeapWordSize) stx(G0, obj, i);
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   264
#endif
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   265
  } else if (con_size_in_bytes <= threshold) {
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   266
    // use explicit NULL stores
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    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += HeapWordSize)     st_ptr(G0, obj, i);
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   268
  } else if (con_size_in_bytes > hdr_size_in_bytes) {
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    // use a loop
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    const Register base  = t1;
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    const Register index = t2;
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    add(obj, hdr_size_in_bytes, base);               // compute address of first element
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   273
    // compute index = number of words to clear
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    set(con_size_in_bytes - hdr_size_in_bytes, index);
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    initialize_body(base, index);
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   276
  }
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   277
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   278
  if (CURRENT_ENV->dtrace_alloc_probes()) {
1
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   279
    assert(obj == O0, "must be");
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   280
    call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)),
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   281
         relocInfo::runtime_call_type);
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   282
    delayed()->nop();
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   283
  }
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   284
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  verify_oop(obj);
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   286
}
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   287
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   288
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   289
void C1_MacroAssembler::allocate_array(
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   290
  Register obj,                        // result: pointer to array after successful allocation
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   291
  Register len,                        // array length
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   292
  Register t1,                         // temp register
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   293
  Register t2,                         // temp register
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   294
  Register t3,                         // temp register
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   295
  int      hdr_size,                   // object header size in words
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   296
  int      elt_size,                   // element size in bytes
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   297
  Register klass,                      // object klass
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   298
  Label&   slow_case                   // continuation point if fast allocation fails
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   299
) {
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   300
  assert_different_registers(obj, len, t1, t2, t3, klass);
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   301
  assert(klass == G5, "must be G5");
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   302
  assert(t1 == G1, "must be G1");
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   303
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   304
  // determine alignment mask
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   305
  assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
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   306
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   307
  // check for negative or excessive length
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   308
  // note: the maximum length allowed is chosen so that arrays of any
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   309
  //       element size with this length are always smaller or equal
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   310
  //       to the largest integer (i.e., array size computation will
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   311
  //       not overflow)
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   312
  set(max_array_allocation_length, t1);
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   313
  cmp(len, t1);
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diff changeset
   314
  br(Assembler::greaterUnsigned, false, Assembler::pn, slow_case);
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diff changeset
   315
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   316
  // compute array size
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   317
  // note: if 0 <= len <= max_length, len*elt_size + header + alignment is
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   318
  //       smaller or equal to the largest integer; also, since top is always
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   319
  //       aligned, we can do the alignment here instead of at the end address
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   320
  //       computation
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   321
  const Register arr_size = t1;
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diff changeset
   322
  switch (elt_size) {
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diff changeset
   323
    case  1: delayed()->mov(len,    arr_size); break;
489c9b5090e2 Initial load
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   324
    case  2: delayed()->sll(len, 1, arr_size); break;
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   325
    case  4: delayed()->sll(len, 2, arr_size); break;
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diff changeset
   326
    case  8: delayed()->sll(len, 3, arr_size); break;
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   327
    default: ShouldNotReachHere();
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   328
  }
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   329
  add(arr_size, hdr_size * wordSize + MinObjAlignmentInBytesMask, arr_size); // add space for header & alignment
489c9b5090e2 Initial load
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diff changeset
   330
  and3(arr_size, ~MinObjAlignmentInBytesMask, arr_size);                     // align array size
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diff changeset
   331
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   332
  // allocate space & initialize header
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diff changeset
   333
  if (UseTLAB) {
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diff changeset
   334
    tlab_allocate(obj, arr_size, 0, t2, slow_case);
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   335
  } else {
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diff changeset
   336
    eden_allocate(obj, arr_size, 0, t2, t3, slow_case);
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   337
  }
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   338
  initialize_header(obj, klass, len, t2, t3);
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   339
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   340
  // initialize body
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   341
  const Register base  = t2;
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   342
  const Register index = t3;
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diff changeset
   343
  add(obj, hdr_size * wordSize, base);               // compute address of first element
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   344
  sub(arr_size, hdr_size * wordSize, index);         // compute index = number of words to clear
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   345
  initialize_body(base, index);
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diff changeset
   346
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diff changeset
   347
  if (CURRENT_ENV->dtrace_alloc_probes()) {
1
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diff changeset
   348
    assert(obj == O0, "must be");
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   349
    call(CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)),
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diff changeset
   350
         relocInfo::runtime_call_type);
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   351
    delayed()->nop();
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diff changeset
   352
  }
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diff changeset
   353
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   354
  verify_oop(obj);
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diff changeset
   355
}
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diff changeset
   356
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diff changeset
   357
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diff changeset
   358
#ifndef PRODUCT
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diff changeset
   359
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   360
void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
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diff changeset
   361
  if (!VerifyOops) return;
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d602ad6538bd 6822110: Add AddressLiteral class on SPARC
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diff changeset
   362
  verify_oop_addr(Address(SP, stack_offset + STACK_BIAS));
1
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   363
}
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diff changeset
   364
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diff changeset
   365
void C1_MacroAssembler::verify_not_null_oop(Register r) {
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diff changeset
   366
  Label not_null;
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   367
  br_zero(Assembler::notEqual, false, Assembler::pt, r, not_null);
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diff changeset
   368
  delayed()->nop();
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diff changeset
   369
  stop("non-null oop required");
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diff changeset
   370
  bind(not_null);
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diff changeset
   371
  if (!VerifyOops) return;
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diff changeset
   372
  verify_oop(r);
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diff changeset
   373
}
489c9b5090e2 Initial load
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parents:
diff changeset
   374
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   375
void C1_MacroAssembler::invalidate_registers(bool iregisters, bool lregisters, bool oregisters,
489c9b5090e2 Initial load
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diff changeset
   376
                                             Register preserve1, Register preserve2) {
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diff changeset
   377
  if (iregisters) {
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diff changeset
   378
    for (int i = 0; i < 6; i++) {
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diff changeset
   379
      Register r = as_iRegister(i);
489c9b5090e2 Initial load
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diff changeset
   380
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
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diff changeset
   381
    }
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diff changeset
   382
  }
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diff changeset
   383
  if (oregisters) {
489c9b5090e2 Initial load
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parents:
diff changeset
   384
    for (int i = 0; i < 6; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   385
      Register r = as_oRegister(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   386
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   387
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   388
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   389
  if (lregisters) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   390
    for (int i = 0; i < 8; i++) {
489c9b5090e2 Initial load
duke
parents:
diff changeset
   391
      Register r = as_lRegister(i);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   392
      if (r != preserve1 && r != preserve2)  set(0xdead, r);
489c9b5090e2 Initial load
duke
parents:
diff changeset
   393
    }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   394
  }
489c9b5090e2 Initial load
duke
parents:
diff changeset
   395
}
489c9b5090e2 Initial load
duke
parents:
diff changeset
   396
489c9b5090e2 Initial load
duke
parents:
diff changeset
   397
489c9b5090e2 Initial load
duke
parents:
diff changeset
   398
#endif