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/*
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* Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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#include "incls/_precompiled.incl"
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#include "incls/_machnode.cpp.incl"
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//=============================================================================
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// Return the value requested
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// result register lookup, corresponding to int_format
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int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
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return (int)ra_->get_encode(node);
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}
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// input register lookup, corresponding to ext_format
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int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
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return (int)(ra_->get_encode(node->in(idx)));
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}
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intptr_t MachOper::constant() const { return 0x00; }
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bool MachOper::constant_is_oop() const { return false; }
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jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
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jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
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jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
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TypeOopPtr *MachOper::oop() const { return NULL; }
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int MachOper::ccode() const { return 0x00; }
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// A zero, default, indicates this value is not needed.
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// May need to lookup the base register, as done in int_ and ext_format
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int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
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int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
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int MachOper::scale() const { return 0x00; }
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int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
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int MachOper::constant_disp() const { return 0; }
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int MachOper::base_position() const { return -1; } // no base input
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int MachOper::index_position() const { return -1; } // no index input
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// Check for PC-Relative displacement
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bool MachOper::disp_is_oop() const { return false; }
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// Return the label
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Label* MachOper::label() const { ShouldNotReachHere(); return 0; }
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intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
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//------------------------------negate-----------------------------------------
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// Negate conditional branches. Error for non-branch operands
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void MachOper::negate() {
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ShouldNotCallThis();
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}
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//-----------------------------type--------------------------------------------
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const Type *MachOper::type() const {
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return Type::BOTTOM;
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}
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//------------------------------in_RegMask-------------------------------------
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const RegMask *MachOper::in_RegMask(int index) const {
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ShouldNotReachHere();
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return NULL;
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}
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//------------------------------dump_spec--------------------------------------
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// Print any per-operand special info
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#ifndef PRODUCT
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void MachOper::dump_spec(outputStream *st) const { }
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#endif
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//------------------------------hash-------------------------------------------
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// Print any per-operand special info
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uint MachOper::hash() const {
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ShouldNotCallThis();
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return 5;
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}
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//------------------------------cmp--------------------------------------------
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// Print any per-operand special info
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uint MachOper::cmp( const MachOper &oper ) const {
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ShouldNotCallThis();
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return opcode() == oper.opcode();
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}
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//------------------------------hash-------------------------------------------
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// Print any per-operand special info
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uint labelOper::hash() const {
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return _block_num;
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}
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//------------------------------cmp--------------------------------------------
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// Print any per-operand special info
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uint labelOper::cmp( const MachOper &oper ) const {
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return (opcode() == oper.opcode()) && (_label == oper.label());
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}
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//------------------------------hash-------------------------------------------
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// Print any per-operand special info
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uint methodOper::hash() const {
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return (uint)_method;
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}
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//------------------------------cmp--------------------------------------------
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// Print any per-operand special info
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uint methodOper::cmp( const MachOper &oper ) const {
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return (opcode() == oper.opcode()) && (_method == oper.method());
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}
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//=============================================================================
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//------------------------------MachNode---------------------------------------
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//------------------------------emit-------------------------------------------
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void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
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#ifdef ASSERT
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tty->print("missing MachNode emit function: ");
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dump();
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#endif
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ShouldNotCallThis();
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}
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//------------------------------size-------------------------------------------
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// Size of instruction in bytes
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uint MachNode::size(PhaseRegAlloc *ra_) const {
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// If a virtual was not defined for this specific instruction,
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// Call the helper which finds the size by emiting the bits.
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return MachNode::emit_size(ra_);
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}
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//------------------------------size-------------------------------------------
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// Helper function that computes size by emitting code
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uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
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// Emit into a trash buffer and count bytes emitted.
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assert(ra_ == ra_->C->regalloc(), "sanity");
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return ra_->C->scratch_emit_size(this);
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}
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//------------------------------hash-------------------------------------------
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uint MachNode::hash() const {
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uint no = num_opnds();
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uint sum = rule();
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for( uint i=0; i<no; i++ )
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sum += _opnds[i]->hash();
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return sum+Node::hash();
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}
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//-----------------------------cmp---------------------------------------------
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uint MachNode::cmp( const Node &node ) const {
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MachNode& n = *((Node&)node).as_Mach();
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uint no = num_opnds();
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if( no != n.num_opnds() ) return 0;
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if( rule() != n.rule() ) return 0;
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for( uint i=0; i<no; i++ ) // All operands must match
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if( !_opnds[i]->cmp( *n._opnds[i] ) )
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return 0; // mis-matched operands
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return 1; // match
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}
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// Return an equivalent instruction using memory for cisc_operand position
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MachNode *MachNode::cisc_version(int offset, Compile* C) {
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ShouldNotCallThis();
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return NULL;
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}
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void MachNode::use_cisc_RegMask() {
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ShouldNotReachHere();
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}
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//-----------------------------in_RegMask--------------------------------------
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const RegMask &MachNode::in_RegMask( uint idx ) const {
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uint numopnds = num_opnds(); // Virtual call for number of operands
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uint skipped = oper_input_base(); // Sum of leaves skipped so far
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if( idx < skipped ) {
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assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
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assert( idx == 1, "expected base ptr here" );
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// debug info can be anywhere
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return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
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}
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uint opcnt = 1; // First operand
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uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
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while( idx >= skipped+num_edges ) {
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skipped += num_edges;
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opcnt++; // Bump operand count
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assert( opcnt < numopnds, "Accessing non-existent operand" );
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num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
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}
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const RegMask *rm = cisc_RegMask();
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if( rm == NULL || (int)opcnt != cisc_operand() ) {
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rm = _opnds[opcnt]->in_RegMask(idx-skipped);
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}
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return *rm;
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}
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//-----------------------------memory_inputs--------------------------------
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const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const {
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const MachOper* oper = memory_operand();
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if (oper == (MachOper*)-1) {
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base = NodeSentinel;
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index = NodeSentinel;
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} else {
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base = NULL;
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index = NULL;
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if (oper != NULL) {
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// It has a unique memory operand. Find its index.
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int oper_idx = num_opnds();
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while (--oper_idx >= 0) {
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if (_opnds[oper_idx] == oper) break;
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}
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int oper_pos = operand_index(oper_idx);
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int base_pos = oper->base_position();
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if (base_pos >= 0) {
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base = _in[oper_pos+base_pos];
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}
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int index_pos = oper->index_position();
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if (index_pos >= 0) {
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index = _in[oper_pos+index_pos];
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}
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}
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}
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return oper;
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}
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//-----------------------------get_base_and_disp----------------------------
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const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
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// Find the memory inputs using our helper function
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Node* base;
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Node* index;
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const MachOper* oper = memory_inputs(base, index);
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if (oper == NULL) {
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// Base has been set to NULL
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offset = 0;
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} else if (oper == (MachOper*)-1) {
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// Base has been set to NodeSentinel
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// There is not a unique memory use here. We will fall to AliasIdxBot.
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offset = Type::OffsetBot;
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} else {
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// Base may be NULL, even if offset turns out to be != 0
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intptr_t disp = oper->constant_disp();
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int scale = oper->scale();
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// Now we have collected every part of the ADLC MEMORY_INTER.
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// See if it adds up to a base + offset.
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if (index != NULL) {
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if (!index->is_Con()) {
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disp = Type::OffsetBot;
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} else if (disp != Type::OffsetBot) {
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const TypeX* ti = index->bottom_type()->isa_intptr_t();
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if (ti == NULL) {
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disp = Type::OffsetBot; // a random constant??
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} else {
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disp += ti->get_con() << scale;
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}
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}
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}
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offset = disp;
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// In i486.ad, indOffset32X uses base==RegI and disp==RegP,
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// this will prevent alias analysis without the following support:
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// Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
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// Add the offset determined by the "base", or use Type::OffsetBot.
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if( adr_type == TYPE_PTR_SENTINAL ) {
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const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X
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if (t_disp != NULL) {
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offset = Type::OffsetBot;
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const Type* t_base = base->bottom_type();
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if (t_base->isa_intptr_t()) {
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const TypeX *t_offset = t_base->is_intptr_t();
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if( t_offset->is_con() ) {
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offset = t_offset->get_con();
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}
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}
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adr_type = t_disp->add_offset(offset);
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}
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}
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}
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return base;
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}
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//---------------------------------adr_type---------------------------------
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const class TypePtr *MachNode::adr_type() const {
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intptr_t offset = 0;
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const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type
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const Node *base = get_base_and_disp(offset, adr_type);
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if( adr_type != TYPE_PTR_SENTINAL ) {
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return adr_type; // get_base_and_disp has the answer
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}
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// Direct addressing modes have no base node, simply an indirect
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// offset, which is always to raw memory.
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// %%%%% Someday we'd like to allow constant oop offsets which
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// would let Intel load from static globals in 1 instruction.
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// Currently Intel requires 2 instructions and a register temp.
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if (base == NULL) {
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// NULL base, zero offset means no memory at all (a null pointer!)
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if (offset == 0) {
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return NULL;
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}
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// NULL base, any offset means any pointer whatever
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if (offset == Type::OffsetBot) {
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return TypePtr::BOTTOM;
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}
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// %%% make offset be intptr_t
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assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr");
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return TypeRawPtr::BOTTOM;
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}
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// base of -1 with no particular offset means all of memory
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if (base == NodeSentinel) return TypePtr::BOTTOM;
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const Type* t = base->bottom_type();
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if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
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// We cannot assert that the offset does not look oop-ish here.
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// Depending on the heap layout the cardmark base could land
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// inside some oopish region. It definitely does for Win2K.
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// The sum of cardmark-base plus shift-by-9-oop lands outside
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// the oop-ish area but we can't assert for that statically.
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return TypeRawPtr::BOTTOM;
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}
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const TypePtr *tp = t->isa_ptr();
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// be conservative if we do not recognize the type
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if (tp == NULL) {
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return TypePtr::BOTTOM;
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}
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assert(tp->base() != Type::AnyPtr, "not a bare pointer");
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return tp->add_offset(offset);
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}
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//-----------------------------operand_index---------------------------------
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int MachNode::operand_index( uint operand ) const {
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if( operand < 1 ) return -1;
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assert(operand < num_opnds(), "oob");
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if( _opnds[operand]->num_edges() == 0 ) return -1;
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uint skipped = oper_input_base(); // Sum of leaves skipped so far
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for (uint opcnt = 1; opcnt < operand; opcnt++) {
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uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
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skipped += num_edges;
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}
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return skipped;
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}
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//------------------------------negate-----------------------------------------
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// Negate conditional branches. Error for non-branch Nodes
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void MachNode::negate() {
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ShouldNotCallThis();
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}
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//------------------------------peephole---------------------------------------
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// Apply peephole rule(s) to this instruction
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MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {
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return NULL;
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}
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//------------------------------add_case_label---------------------------------
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// Adds the label for the case
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void MachNode::add_case_label( int index_num, Label* blockLabel) {
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ShouldNotCallThis();
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}
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//------------------------------label_set--------------------------------------
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// Set the Label for a LabelOper, if an operand for this instruction
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void MachNode::label_set( Label& label, uint block_num ) {
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ShouldNotCallThis();
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}
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//------------------------------method_set-------------------------------------
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// Set the absolute address of a method
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void MachNode::method_set( intptr_t addr ) {
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ShouldNotCallThis();
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}
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//------------------------------rematerialize----------------------------------
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bool MachNode::rematerialize() const {
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// Temps are always rematerializable
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if (is_MachTemp()) return true;
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|
404 |
|
|
405 |
uint r = rule(); // Match rule
|
|
406 |
if( r < Matcher::_begin_rematerialize ||
|
|
407 |
r >= Matcher::_end_rematerialize )
|
|
408 |
return false;
|
|
409 |
|
|
410 |
// For 2-address instructions, the input live range is also the output
|
|
411 |
// live range. Remateralizing does not make progress on the that live range.
|
|
412 |
if( two_adr() ) return false;
|
|
413 |
|
|
414 |
// Check for rematerializing float constants, or not
|
|
415 |
if( !Matcher::rematerialize_float_constants ) {
|
|
416 |
int op = ideal_Opcode();
|
|
417 |
if( op == Op_ConF || op == Op_ConD )
|
|
418 |
return false;
|
|
419 |
}
|
|
420 |
|
|
421 |
// Defining flags - can't spill these! Must remateralize.
|
|
422 |
if( ideal_reg() == Op_RegFlags )
|
|
423 |
return true;
|
|
424 |
|
|
425 |
// Stretching lots of inputs - don't do it.
|
|
426 |
if( req() > 2 )
|
|
427 |
return false;
|
|
428 |
|
|
429 |
// Don't remateralize somebody with bound inputs - it stretches a
|
|
430 |
// fixed register lifetime.
|
|
431 |
uint idx = oper_input_base();
|
|
432 |
if( req() > idx ) {
|
|
433 |
const RegMask &rm = in_RegMask(idx);
|
|
434 |
if( rm.is_bound1() || rm.is_bound2() )
|
|
435 |
return false;
|
|
436 |
}
|
|
437 |
|
|
438 |
return true;
|
|
439 |
}
|
|
440 |
|
|
441 |
#ifndef PRODUCT
|
|
442 |
//------------------------------dump_spec--------------------------------------
|
|
443 |
// Print any per-operand special info
|
|
444 |
void MachNode::dump_spec(outputStream *st) const {
|
|
445 |
uint cnt = num_opnds();
|
|
446 |
for( uint i=0; i<cnt; i++ )
|
|
447 |
_opnds[i]->dump_spec(st);
|
|
448 |
const TypePtr *t = adr_type();
|
|
449 |
if( t ) {
|
|
450 |
Compile* C = Compile::current();
|
|
451 |
if( C->alias_type(t)->is_volatile() )
|
|
452 |
st->print(" Volatile!");
|
|
453 |
}
|
|
454 |
}
|
|
455 |
|
|
456 |
//------------------------------dump_format------------------------------------
|
|
457 |
// access to virtual
|
|
458 |
void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
|
|
459 |
format(ra, st); // access to virtual
|
|
460 |
}
|
|
461 |
#endif
|
|
462 |
|
|
463 |
//=============================================================================
|
|
464 |
#ifndef PRODUCT
|
|
465 |
void MachTypeNode::dump_spec(outputStream *st) const {
|
|
466 |
_bottom_type->dump_on(st);
|
|
467 |
}
|
|
468 |
#endif
|
|
469 |
|
|
470 |
//=============================================================================
|
|
471 |
#ifndef PRODUCT
|
|
472 |
void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
|
|
473 |
int reg = ra_->get_reg_first(in(1)->in(_vidx));
|
|
474 |
tty->print("%s %s", Name(), Matcher::regName[reg]);
|
|
475 |
}
|
|
476 |
#endif
|
|
477 |
|
|
478 |
void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
|
|
479 |
// only emits entries in the null-pointer exception handler table
|
|
480 |
}
|
|
481 |
|
|
482 |
const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
|
|
483 |
if( idx == 0 ) return RegMask::Empty;
|
|
484 |
else return in(1)->as_Mach()->out_RegMask();
|
|
485 |
}
|
|
486 |
|
|
487 |
//=============================================================================
|
|
488 |
const Type *MachProjNode::bottom_type() const {
|
|
489 |
if( _ideal_reg == fat_proj ) return Type::BOTTOM;
|
|
490 |
// Try the normal mechanism first
|
|
491 |
const Type *t = in(0)->bottom_type();
|
|
492 |
if( t->base() == Type::Tuple ) {
|
|
493 |
const TypeTuple *tt = t->is_tuple();
|
|
494 |
if (_con < tt->cnt())
|
|
495 |
return tt->field_at(_con);
|
|
496 |
}
|
|
497 |
// Else use generic type from ideal register set
|
|
498 |
assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
|
|
499 |
return Type::mreg2type[_ideal_reg];
|
|
500 |
}
|
|
501 |
|
|
502 |
const TypePtr *MachProjNode::adr_type() const {
|
|
503 |
if (bottom_type() == Type::MEMORY) {
|
|
504 |
// in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
|
|
505 |
const TypePtr* adr_type = in(0)->adr_type();
|
|
506 |
#ifdef ASSERT
|
|
507 |
if (!is_error_reported() && !Node::in_dump())
|
|
508 |
assert(adr_type != NULL, "source must have adr_type");
|
|
509 |
#endif
|
|
510 |
return adr_type;
|
|
511 |
}
|
|
512 |
assert(bottom_type()->base() != Type::Memory, "no other memories?");
|
|
513 |
return NULL;
|
|
514 |
}
|
|
515 |
|
|
516 |
#ifndef PRODUCT
|
|
517 |
void MachProjNode::dump_spec(outputStream *st) const {
|
|
518 |
ProjNode::dump_spec(st);
|
|
519 |
switch (_ideal_reg) {
|
|
520 |
case unmatched_proj: st->print("/unmatched"); break;
|
|
521 |
case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break;
|
|
522 |
}
|
|
523 |
}
|
|
524 |
#endif
|
|
525 |
|
|
526 |
//=============================================================================
|
|
527 |
#ifndef PRODUCT
|
|
528 |
void MachIfNode::dump_spec(outputStream *st) const {
|
|
529 |
st->print("P=%f, C=%f",_prob, _fcnt);
|
|
530 |
}
|
|
531 |
#endif
|
|
532 |
|
|
533 |
//=============================================================================
|
|
534 |
uint MachReturnNode::size_of() const { return sizeof(*this); }
|
|
535 |
|
|
536 |
//------------------------------Registers--------------------------------------
|
|
537 |
const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
|
|
538 |
return _in_rms[idx];
|
|
539 |
}
|
|
540 |
|
|
541 |
const TypePtr *MachReturnNode::adr_type() const {
|
|
542 |
// most returns and calls are assumed to consume & modify all of memory
|
|
543 |
// the matcher will copy non-wide adr_types from ideal originals
|
|
544 |
return _adr_type;
|
|
545 |
}
|
|
546 |
|
|
547 |
//=============================================================================
|
|
548 |
const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; }
|
|
549 |
|
|
550 |
//------------------------------Registers--------------------------------------
|
|
551 |
const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
|
|
552 |
// Values in the domain use the users calling convention, embodied in the
|
|
553 |
// _in_rms array of RegMasks.
|
|
554 |
if( idx < TypeFunc::Parms ) return _in_rms[idx];
|
|
555 |
|
|
556 |
if (SafePointNode::needs_polling_address_input() &&
|
|
557 |
idx == TypeFunc::Parms &&
|
|
558 |
ideal_Opcode() == Op_SafePoint) {
|
|
559 |
return MachNode::in_RegMask(idx);
|
|
560 |
}
|
|
561 |
|
|
562 |
// Values outside the domain represent debug info
|
|
563 |
return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
|
|
564 |
}
|
|
565 |
|
|
566 |
|
|
567 |
//=============================================================================
|
|
568 |
|
|
569 |
uint MachCallNode::cmp( const Node &n ) const
|
|
570 |
{ return _tf == ((MachCallNode&)n)._tf; }
|
|
571 |
const Type *MachCallNode::bottom_type() const { return tf()->range(); }
|
|
572 |
const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }
|
|
573 |
|
|
574 |
#ifndef PRODUCT
|
|
575 |
void MachCallNode::dump_spec(outputStream *st) const {
|
|
576 |
st->print("# ");
|
|
577 |
tf()->dump_on(st);
|
|
578 |
if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt);
|
|
579 |
if (jvms() != NULL) jvms()->dump_spec(st);
|
|
580 |
}
|
|
581 |
#endif
|
|
582 |
|
|
583 |
|
|
584 |
bool MachCallNode::return_value_is_used() const {
|
|
585 |
if (tf()->range()->cnt() == TypeFunc::Parms) {
|
|
586 |
// void return
|
|
587 |
return false;
|
|
588 |
}
|
|
589 |
|
|
590 |
// find the projection corresponding to the return value
|
|
591 |
for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
|
|
592 |
Node *use = fast_out(i);
|
|
593 |
if (!use->is_Proj()) continue;
|
|
594 |
if (use->as_Proj()->_con == TypeFunc::Parms) {
|
|
595 |
return true;
|
|
596 |
}
|
|
597 |
}
|
|
598 |
return false;
|
|
599 |
}
|
|
600 |
|
|
601 |
|
|
602 |
//------------------------------Registers--------------------------------------
|
|
603 |
const RegMask &MachCallNode::in_RegMask( uint idx ) const {
|
|
604 |
// Values in the domain use the users calling convention, embodied in the
|
|
605 |
// _in_rms array of RegMasks.
|
|
606 |
if (idx < tf()->domain()->cnt()) return _in_rms[idx];
|
|
607 |
// Values outside the domain represent debug info
|
|
608 |
return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
|
|
609 |
}
|
|
610 |
|
|
611 |
//=============================================================================
|
|
612 |
uint MachCallJavaNode::size_of() const { return sizeof(*this); }
|
|
613 |
uint MachCallJavaNode::cmp( const Node &n ) const {
|
|
614 |
MachCallJavaNode &call = (MachCallJavaNode&)n;
|
|
615 |
return MachCallNode::cmp(call) && _method->equals(call._method);
|
|
616 |
}
|
|
617 |
#ifndef PRODUCT
|
|
618 |
void MachCallJavaNode::dump_spec(outputStream *st) const {
|
|
619 |
if( _method ) {
|
|
620 |
_method->print_short_name(st);
|
|
621 |
st->print(" ");
|
|
622 |
}
|
|
623 |
MachCallNode::dump_spec(st);
|
|
624 |
}
|
|
625 |
#endif
|
|
626 |
|
|
627 |
//=============================================================================
|
|
628 |
uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
|
|
629 |
uint MachCallStaticJavaNode::cmp( const Node &n ) const {
|
|
630 |
MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
|
|
631 |
return MachCallJavaNode::cmp(call) && _name == call._name;
|
|
632 |
}
|
|
633 |
|
|
634 |
//----------------------------uncommon_trap_request----------------------------
|
|
635 |
// If this is an uncommon trap, return the request code, else zero.
|
|
636 |
int MachCallStaticJavaNode::uncommon_trap_request() const {
|
|
637 |
if (_name != NULL && !strcmp(_name, "uncommon_trap")) {
|
|
638 |
return CallStaticJavaNode::extract_uncommon_trap_request(this);
|
|
639 |
}
|
|
640 |
return 0;
|
|
641 |
}
|
|
642 |
|
|
643 |
#ifndef PRODUCT
|
|
644 |
// Helper for summarizing uncommon_trap arguments.
|
|
645 |
void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
|
|
646 |
int trap_req = uncommon_trap_request();
|
|
647 |
if (trap_req != 0) {
|
|
648 |
char buf[100];
|
|
649 |
st->print("(%s)",
|
|
650 |
Deoptimization::format_trap_request(buf, sizeof(buf),
|
|
651 |
trap_req));
|
|
652 |
}
|
|
653 |
}
|
|
654 |
|
|
655 |
void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
|
|
656 |
st->print("Static ");
|
|
657 |
if (_name != NULL) {
|
|
658 |
st->print("wrapper for: %s", _name );
|
|
659 |
dump_trap_args(st);
|
|
660 |
st->print(" ");
|
|
661 |
}
|
|
662 |
MachCallJavaNode::dump_spec(st);
|
|
663 |
}
|
|
664 |
#endif
|
|
665 |
|
|
666 |
//=============================================================================
|
|
667 |
#ifndef PRODUCT
|
|
668 |
void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
|
|
669 |
st->print("Dynamic ");
|
|
670 |
MachCallJavaNode::dump_spec(st);
|
|
671 |
}
|
|
672 |
#endif
|
|
673 |
//=============================================================================
|
|
674 |
uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
|
|
675 |
uint MachCallRuntimeNode::cmp( const Node &n ) const {
|
|
676 |
MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
|
|
677 |
return MachCallNode::cmp(call) && !strcmp(_name,call._name);
|
|
678 |
}
|
|
679 |
#ifndef PRODUCT
|
|
680 |
void MachCallRuntimeNode::dump_spec(outputStream *st) const {
|
|
681 |
st->print("%s ",_name);
|
|
682 |
MachCallNode::dump_spec(st);
|
|
683 |
}
|
|
684 |
#endif
|
|
685 |
//=============================================================================
|
|
686 |
// A shared JVMState for all HaltNodes. Indicates the start of debug info
|
|
687 |
// is at TypeFunc::Parms. Only required for SOE register spill handling -
|
|
688 |
// to indicate where the stack-slot-only debug info inputs begin.
|
|
689 |
// There is no other JVM state needed here.
|
|
690 |
JVMState jvms_for_throw(0);
|
|
691 |
JVMState *MachHaltNode::jvms() const {
|
|
692 |
return &jvms_for_throw;
|
|
693 |
}
|
|
694 |
|
|
695 |
//=============================================================================
|
|
696 |
#ifndef PRODUCT
|
|
697 |
void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
|
|
698 |
st->print("B%d", _block_num);
|
|
699 |
}
|
|
700 |
#endif // PRODUCT
|
|
701 |
|
|
702 |
//=============================================================================
|
|
703 |
#ifndef PRODUCT
|
|
704 |
void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
|
|
705 |
st->print(INTPTR_FORMAT, _method);
|
|
706 |
}
|
|
707 |
#endif // PRODUCT
|