author | never |
Wed, 31 Aug 2011 16:46:11 -0700 | |
changeset 10508 | 233d2e7c462d |
parent 8882 | f852635a6383 |
child 10972 | ef164805934c |
permissions | -rw-r--r-- |
1 | 1 |
/* |
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* Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved. |
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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* |
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* This code is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 only, as |
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* published by the Free Software Foundation. |
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* |
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* This code is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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* version 2 for more details (a copy is included in the LICENSE file that |
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* accompanied this code). |
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* |
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* You should have received a copy of the GNU General Public License version |
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* 2 along with this work; if not, write to the Free Software Foundation, |
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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* |
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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* or visit www.oracle.com if you need additional information or have any |
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* questions. |
1 | 22 |
* |
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*/ |
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||
7397 | 25 |
#include "precompiled.hpp" |
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#include "asm/assembler.hpp" |
7397 | 27 |
#include "c1/c1_Defs.hpp" |
28 |
#include "c1/c1_MacroAssembler.hpp" |
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#include "c1/c1_Runtime1.hpp" |
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30 |
#include "interpreter/interpreter.hpp" |
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31 |
#include "nativeInst_x86.hpp" |
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#include "oops/compiledICHolderOop.hpp" |
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#include "oops/oop.inline.hpp" |
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#include "prims/jvmtiExport.hpp" |
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#include "register_x86.hpp" |
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#include "runtime/sharedRuntime.hpp" |
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#include "runtime/signature.hpp" |
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#include "runtime/vframeArray.hpp" |
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#include "vmreg_x86.inline.hpp" |
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||
42 |
// Implementation of StubAssembler |
|
43 |
||
44 |
int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { |
|
45 |
// setup registers |
|
1066 | 46 |
const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
1 | 47 |
assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
48 |
assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); |
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assert(args_size >= 0, "illegal args_size"); |
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||
1066 | 51 |
#ifdef _LP64 |
52 |
mov(c_rarg0, thread); |
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set_num_rt_args(0); // Nothing on stack |
|
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#else |
|
1 | 55 |
set_num_rt_args(1 + args_size); |
56 |
||
57 |
// push java thread (becomes first argument of C function) |
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get_thread(thread); |
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1066 | 59 |
push(thread); |
60 |
#endif // _LP64 |
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|
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set_last_Java_frame(thread, noreg, rbp, NULL); |
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1066 | 63 |
|
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// do the call |
65 |
call(RuntimeAddress(entry)); |
|
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int call_offset = offset(); |
|
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// verify callee-saved register |
|
68 |
#ifdef ASSERT |
|
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guarantee(thread != rax, "change this code"); |
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1066 | 70 |
push(rax); |
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{ Label L; |
72 |
get_thread(rax); |
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1066 | 73 |
cmpptr(thread, rax); |
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jcc(Assembler::equal, L); |
75 |
int3(); |
|
76 |
stop("StubAssembler::call_RT: rdi not callee saved?"); |
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bind(L); |
|
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} |
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1066 | 79 |
pop(rax); |
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#endif |
81 |
reset_last_Java_frame(thread, true, false); |
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||
83 |
// discard thread and arguments |
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1066 | 84 |
NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
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|
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// check for pending exceptions |
|
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{ Label L; |
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1066 | 88 |
cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
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jcc(Assembler::equal, L); |
90 |
// exception pending => remove activation and forward to exception handler |
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1066 | 91 |
movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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// make sure that the vm_results are cleared |
93 |
if (oop_result1->is_valid()) { |
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movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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} |
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if (oop_result2->is_valid()) { |
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movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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} |
99 |
if (frame_size() == no_frame_size) { |
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leave(); |
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jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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} else if (_stub_id == Runtime1::forward_exception_id) { |
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should_not_reach_here(); |
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104 |
} else { |
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105 |
jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); |
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} |
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bind(L); |
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108 |
} |
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// get oop results if there are any and reset the values in the thread |
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if (oop_result1->is_valid()) { |
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movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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verify_oop(oop_result1); |
114 |
} |
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if (oop_result2->is_valid()) { |
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movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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verify_oop(oop_result2); |
119 |
} |
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return call_offset; |
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} |
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||
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int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { |
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1066 | 125 |
#ifdef _LP64 |
126 |
mov(c_rarg1, arg1); |
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#else |
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push(arg1); |
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#endif // _LP64 |
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return call_RT(oop_result1, oop_result2, entry, 1); |
131 |
} |
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int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { |
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1066 | 135 |
#ifdef _LP64 |
136 |
if (c_rarg1 == arg2) { |
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if (c_rarg2 == arg1) { |
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xchgq(arg1, arg2); |
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} else { |
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mov(c_rarg2, arg2); |
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mov(c_rarg1, arg1); |
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} |
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} else { |
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mov(c_rarg1, arg1); |
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mov(c_rarg2, arg2); |
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} |
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#else |
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push(arg2); |
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push(arg1); |
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#endif // _LP64 |
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return call_RT(oop_result1, oop_result2, entry, 2); |
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} |
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int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { |
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1066 | 156 |
#ifdef _LP64 |
157 |
// if there is any conflict use the stack |
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if (arg1 == c_rarg2 || arg1 == c_rarg3 || |
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arg2 == c_rarg1 || arg1 == c_rarg3 || |
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arg3 == c_rarg1 || arg1 == c_rarg2) { |
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push(arg3); |
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push(arg2); |
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push(arg1); |
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pop(c_rarg1); |
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pop(c_rarg2); |
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pop(c_rarg3); |
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} else { |
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mov(c_rarg1, arg1); |
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mov(c_rarg2, arg2); |
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mov(c_rarg3, arg3); |
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} |
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#else |
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push(arg3); |
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push(arg2); |
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push(arg1); |
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#endif // _LP64 |
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return call_RT(oop_result1, oop_result2, entry, 3); |
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} |
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// Implementation of StubFrame |
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182 |
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183 |
class StubFrame: public StackObj { |
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private: |
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StubAssembler* _sasm; |
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186 |
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public: |
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StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); |
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void load_argument(int offset_in_words, Register reg); |
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190 |
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~StubFrame(); |
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}; |
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193 |
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194 |
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#define __ _sasm-> |
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196 |
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StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { |
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_sasm = sasm; |
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__ set_info(name, must_gc_arguments); |
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__ enter(); |
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} |
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// load parameters that were stored with LIR_Assembler::store_parameter |
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// Note: offsets for store_parameter and load_argument must match |
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void StubFrame::load_argument(int offset_in_words, Register reg) { |
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// rbp, + 0: link |
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// + 1: return address |
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// + 2: argument with offset 0 |
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// + 3: argument with offset 1 |
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// + 4: ... |
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211 |
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1066 | 212 |
__ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
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} |
214 |
||
215 |
||
216 |
StubFrame::~StubFrame() { |
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217 |
__ leave(); |
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218 |
__ ret(0); |
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} |
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220 |
||
221 |
#undef __ |
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222 |
||
223 |
||
224 |
// Implementation of Runtime1 |
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225 |
||
226 |
#define __ sasm-> |
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227 |
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1066 | 228 |
const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
229 |
const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; |
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1 | 230 |
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// Stack layout for saving/restoring all the registers needed during a runtime |
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// call (this includes deoptimization) |
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// Note: note that users of this frame may well have arguments to some runtime |
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// while these values are on the stack. These positions neglect those arguments |
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// but the code in save_live_registers will take the argument count into |
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236 |
// account. |
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237 |
// |
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1066 | 238 |
#ifdef _LP64 |
239 |
#define SLOT2(x) x, |
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240 |
#define SLOT_PER_WORD 2 |
|
241 |
#else |
|
242 |
#define SLOT2(x) |
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243 |
#define SLOT_PER_WORD 1 |
|
244 |
#endif // _LP64 |
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245 |
||
1 | 246 |
enum reg_save_layout { |
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// 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
248 |
// happen and will assert if the stack size we create is misaligned |
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249 |
#ifdef _LP64 |
|
250 |
align_dummy_0, align_dummy_1, |
|
251 |
#endif // _LP64 |
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#ifdef _WIN64 |
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// Windows always allocates space for it's argument registers (see |
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// frame::arg_reg_save_area_bytes). |
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arg_reg_save_1, arg_reg_save_1H, // 0, 4 |
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arg_reg_save_2, arg_reg_save_2H, // 8, 12 |
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arg_reg_save_3, arg_reg_save_3H, // 16, 20 |
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arg_reg_save_4, arg_reg_save_4H, // 24, 28 |
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259 |
#endif // _WIN64 |
1066 | 260 |
xmm_regs_as_doubles_off, // 32 |
261 |
float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 |
|
262 |
fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 |
|
263 |
// fpu_state_end_off is exclusive |
|
264 |
fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 |
|
265 |
marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 |
|
266 |
extra_space_offset, // 360 |
|
267 |
#ifdef _LP64 |
|
268 |
r15_off = extra_space_offset, r15H_off, // 360, 364 |
|
269 |
r14_off, r14H_off, // 368, 372 |
|
270 |
r13_off, r13H_off, // 376, 380 |
|
271 |
r12_off, r12H_off, // 384, 388 |
|
272 |
r11_off, r11H_off, // 392, 396 |
|
273 |
r10_off, r10H_off, // 400, 404 |
|
274 |
r9_off, r9H_off, // 408, 412 |
|
275 |
r8_off, r8H_off, // 416, 420 |
|
276 |
rdi_off, rdiH_off, // 424, 428 |
|
277 |
#else |
|
1 | 278 |
rdi_off = extra_space_offset, |
1066 | 279 |
#endif // _LP64 |
280 |
rsi_off, SLOT2(rsiH_off) // 432, 436 |
|
281 |
rbp_off, SLOT2(rbpH_off) // 440, 444 |
|
282 |
rsp_off, SLOT2(rspH_off) // 448, 452 |
|
283 |
rbx_off, SLOT2(rbxH_off) // 456, 460 |
|
284 |
rdx_off, SLOT2(rdxH_off) // 464, 468 |
|
285 |
rcx_off, SLOT2(rcxH_off) // 472, 476 |
|
286 |
rax_off, SLOT2(raxH_off) // 480, 484 |
|
287 |
saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 |
|
288 |
return_off, SLOT2(returnH_off) // 496, 500 |
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289 |
reg_save_frame_size // As noted: neglects any parameters to runtime // 504 |
1 | 290 |
}; |
291 |
||
292 |
||
293 |
||
294 |
// Save off registers which might be killed by calls into the runtime. |
|
295 |
// Tries to smart of about FP registers. In particular we separate |
|
296 |
// saving and describing the FPU registers for deoptimization since we |
|
297 |
// have to save the FPU registers twice if we describe them and on P4 |
|
298 |
// saving FPU registers which don't contain anything appears |
|
299 |
// expensive. The deopt blob is the only thing which needs to |
|
300 |
// describe FPU registers. In all other cases it should be sufficient |
|
301 |
// to simply save their current value. |
|
302 |
||
303 |
static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, |
|
304 |
bool save_fpu_registers = true) { |
|
1066 | 305 |
|
306 |
// In 64bit all the args are in regs so there are no additional stack slots |
|
307 |
LP64_ONLY(num_rt_args = 0); |
|
308 |
LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) |
|
309 |
int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread |
|
310 |
sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); |
|
1 | 311 |
|
312 |
// record saved value locations in an OopMap |
|
313 |
// locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread |
|
1066 | 314 |
OopMap* map = new OopMap(frame_size_in_slots, 0); |
1 | 315 |
map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
316 |
map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); |
|
317 |
map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); |
|
318 |
map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); |
|
319 |
map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); |
|
320 |
map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); |
|
1066 | 321 |
#ifdef _LP64 |
322 |
map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); |
|
323 |
map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); |
|
324 |
map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); |
|
325 |
map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); |
|
326 |
map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); |
|
327 |
map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); |
|
328 |
map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); |
|
329 |
map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); |
|
330 |
||
331 |
// This is stupid but needed. |
|
332 |
map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); |
|
333 |
map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); |
|
334 |
map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); |
|
335 |
map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); |
|
336 |
map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); |
|
337 |
map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); |
|
338 |
||
339 |
map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); |
|
340 |
map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); |
|
341 |
map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); |
|
342 |
map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); |
|
343 |
map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); |
|
344 |
map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); |
|
345 |
map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); |
|
346 |
map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); |
|
347 |
#endif // _LP64 |
|
1 | 348 |
|
349 |
if (save_fpu_registers) { |
|
350 |
if (UseSSE < 2) { |
|
351 |
int fpu_off = float_regs_as_doubles_off; |
|
352 |
for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { |
|
353 |
VMReg fpu_name_0 = FrameMap::fpu_regname(n); |
|
354 |
map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); |
|
355 |
// %%% This is really a waste but we'll keep things as they were for now |
|
356 |
if (true) { |
|
357 |
map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); |
|
358 |
} |
|
359 |
fpu_off += 2; |
|
360 |
} |
|
361 |
assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); |
|
362 |
} |
|
363 |
||
364 |
if (UseSSE >= 2) { |
|
365 |
int xmm_off = xmm_regs_as_doubles_off; |
|
366 |
for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { |
|
367 |
VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); |
|
368 |
map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); |
|
369 |
// %%% This is really a waste but we'll keep things as they were for now |
|
370 |
if (true) { |
|
371 |
map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); |
|
372 |
} |
|
373 |
xmm_off += 2; |
|
374 |
} |
|
375 |
assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); |
|
376 |
||
377 |
} else if (UseSSE == 1) { |
|
378 |
int xmm_off = xmm_regs_as_doubles_off; |
|
379 |
for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { |
|
380 |
VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); |
|
381 |
map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); |
|
382 |
xmm_off += 2; |
|
383 |
} |
|
384 |
assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); |
|
385 |
} |
|
386 |
} |
|
387 |
||
388 |
return map; |
|
389 |
} |
|
390 |
||
391 |
static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, |
|
392 |
bool save_fpu_registers = true) { |
|
393 |
__ block_comment("save_live_registers"); |
|
394 |
||
1066 | 395 |
__ pusha(); // integer registers |
1 | 396 |
|
397 |
// assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); |
|
398 |
// assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); |
|
399 |
||
1066 | 400 |
__ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
1 | 401 |
|
402 |
#ifdef ASSERT |
|
1066 | 403 |
__ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
1 | 404 |
#endif |
405 |
||
406 |
if (save_fpu_registers) { |
|
407 |
if (UseSSE < 2) { |
|
408 |
// save FPU stack |
|
1066 | 409 |
__ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
1 | 410 |
__ fwait(); |
411 |
||
412 |
#ifdef ASSERT |
|
413 |
Label ok; |
|
1066 | 414 |
__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
1 | 415 |
__ jccb(Assembler::equal, ok); |
416 |
__ stop("corrupted control word detected"); |
|
417 |
__ bind(ok); |
|
418 |
#endif |
|
419 |
||
420 |
// Reset the control word to guard against exceptions being unmasked |
|
421 |
// since fstp_d can cause FPU stack underflow exceptions. Write it |
|
422 |
// into the on stack copy and then reload that to make sure that the |
|
423 |
// current and future values are correct. |
|
1066 | 424 |
__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
425 |
__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
|
1 | 426 |
|
427 |
// Save the FPU registers in de-opt-able form |
|
1066 | 428 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
429 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); |
|
430 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); |
|
431 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); |
|
432 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); |
|
433 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); |
|
434 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); |
|
435 |
__ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); |
|
1 | 436 |
} |
437 |
||
438 |
if (UseSSE >= 2) { |
|
439 |
// save XMM registers |
|
440 |
// XMM registers can contain float or double values, but this is not known here, |
|
441 |
// so always save them as doubles. |
|
442 |
// note that float values are _not_ converted automatically, so for float values |
|
443 |
// the second word contains only garbage data. |
|
1066 | 444 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
445 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); |
|
446 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); |
|
447 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); |
|
448 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); |
|
449 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); |
|
450 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); |
|
451 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); |
|
452 |
#ifdef _LP64 |
|
453 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); |
|
454 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); |
|
455 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); |
|
456 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); |
|
457 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); |
|
458 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); |
|
459 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); |
|
460 |
__ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); |
|
461 |
#endif // _LP64 |
|
1 | 462 |
} else if (UseSSE == 1) { |
463 |
// save XMM registers as float because double not supported without SSE2 |
|
1066 | 464 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
465 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); |
|
466 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); |
|
467 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); |
|
468 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); |
|
469 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); |
|
470 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); |
|
471 |
__ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); |
|
1 | 472 |
} |
473 |
} |
|
474 |
||
475 |
// FPU stack must be empty now |
|
476 |
__ verify_FPU(0, "save_live_registers"); |
|
477 |
||
478 |
return generate_oop_map(sasm, num_rt_args, save_fpu_registers); |
|
479 |
} |
|
480 |
||
481 |
||
482 |
static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { |
|
483 |
if (restore_fpu_registers) { |
|
484 |
if (UseSSE >= 2) { |
|
485 |
// restore XMM registers |
|
1066 | 486 |
__ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
487 |
__ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); |
|
488 |
__ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); |
|
489 |
__ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); |
|
490 |
__ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); |
|
491 |
__ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); |
|
492 |
__ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); |
|
493 |
__ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); |
|
494 |
#ifdef _LP64 |
|
495 |
__ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); |
|
496 |
__ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); |
|
497 |
__ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); |
|
498 |
__ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); |
|
499 |
__ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); |
|
500 |
__ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); |
|
501 |
__ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); |
|
502 |
__ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); |
|
503 |
#endif // _LP64 |
|
1 | 504 |
} else if (UseSSE == 1) { |
505 |
// restore XMM registers |
|
1066 | 506 |
__ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
507 |
__ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); |
|
508 |
__ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); |
|
509 |
__ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); |
|
510 |
__ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); |
|
511 |
__ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); |
|
512 |
__ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); |
|
513 |
__ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); |
|
1 | 514 |
} |
515 |
||
516 |
if (UseSSE < 2) { |
|
1066 | 517 |
__ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
1 | 518 |
} else { |
519 |
// check that FPU stack is really empty |
|
520 |
__ verify_FPU(0, "restore_live_registers"); |
|
521 |
} |
|
522 |
||
523 |
} else { |
|
524 |
// check that FPU stack is really empty |
|
525 |
__ verify_FPU(0, "restore_live_registers"); |
|
526 |
} |
|
527 |
||
528 |
#ifdef ASSERT |
|
529 |
{ |
|
530 |
Label ok; |
|
1066 | 531 |
__ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
1 | 532 |
__ jcc(Assembler::equal, ok); |
533 |
__ stop("bad offsets in frame"); |
|
534 |
__ bind(ok); |
|
535 |
} |
|
1066 | 536 |
#endif // ASSERT |
1 | 537 |
|
1066 | 538 |
__ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
1 | 539 |
} |
540 |
||
541 |
||
542 |
static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { |
|
543 |
__ block_comment("restore_live_registers"); |
|
544 |
||
545 |
restore_fpu(sasm, restore_fpu_registers); |
|
1066 | 546 |
__ popa(); |
1 | 547 |
} |
548 |
||
549 |
||
550 |
static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { |
|
551 |
__ block_comment("restore_live_registers_except_rax"); |
|
552 |
||
553 |
restore_fpu(sasm, restore_fpu_registers); |
|
554 |
||
1066 | 555 |
#ifdef _LP64 |
556 |
__ movptr(r15, Address(rsp, 0)); |
|
557 |
__ movptr(r14, Address(rsp, wordSize)); |
|
558 |
__ movptr(r13, Address(rsp, 2 * wordSize)); |
|
559 |
__ movptr(r12, Address(rsp, 3 * wordSize)); |
|
560 |
__ movptr(r11, Address(rsp, 4 * wordSize)); |
|
561 |
__ movptr(r10, Address(rsp, 5 * wordSize)); |
|
562 |
__ movptr(r9, Address(rsp, 6 * wordSize)); |
|
563 |
__ movptr(r8, Address(rsp, 7 * wordSize)); |
|
564 |
__ movptr(rdi, Address(rsp, 8 * wordSize)); |
|
565 |
__ movptr(rsi, Address(rsp, 9 * wordSize)); |
|
566 |
__ movptr(rbp, Address(rsp, 10 * wordSize)); |
|
567 |
// skip rsp |
|
568 |
__ movptr(rbx, Address(rsp, 12 * wordSize)); |
|
569 |
__ movptr(rdx, Address(rsp, 13 * wordSize)); |
|
570 |
__ movptr(rcx, Address(rsp, 14 * wordSize)); |
|
571 |
||
572 |
__ addptr(rsp, 16 * wordSize); |
|
573 |
#else |
|
574 |
||
575 |
__ pop(rdi); |
|
576 |
__ pop(rsi); |
|
577 |
__ pop(rbp); |
|
578 |
__ pop(rbx); // skip this value |
|
579 |
__ pop(rbx); |
|
580 |
__ pop(rdx); |
|
581 |
__ pop(rcx); |
|
582 |
__ addptr(rsp, BytesPerWord); |
|
583 |
#endif // _LP64 |
|
1 | 584 |
} |
585 |
||
586 |
||
587 |
void Runtime1::initialize_pd() { |
|
588 |
// nothing to do |
|
589 |
} |
|
590 |
||
591 |
||
592 |
// target: the entry point of the method that creates and posts the exception oop |
|
593 |
// has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) |
|
594 |
||
595 |
OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { |
|
596 |
// preserve all registers |
|
597 |
int num_rt_args = has_argument ? 2 : 1; |
|
598 |
OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
|
599 |
||
600 |
// now all registers are saved and can be used freely |
|
601 |
// verify that no old value is used accidentally |
|
602 |
__ invalidate_registers(true, true, true, true, true, true); |
|
603 |
||
604 |
// registers used by this stub |
|
605 |
const Register temp_reg = rbx; |
|
606 |
||
607 |
// load argument for exception that is passed as an argument into the stub |
|
608 |
if (has_argument) { |
|
1066 | 609 |
#ifdef _LP64 |
610 |
__ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
|
611 |
#else |
|
612 |
__ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
|
613 |
__ push(temp_reg); |
|
614 |
#endif // _LP64 |
|
1 | 615 |
} |
616 |
int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
|
617 |
||
618 |
OopMapSet* oop_maps = new OopMapSet(); |
|
619 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
620 |
||
621 |
__ stop("should not reach here"); |
|
622 |
||
623 |
return oop_maps; |
|
624 |
} |
|
625 |
||
626 |
||
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
627 |
OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
628 |
__ block_comment("generate_handle_exception"); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
629 |
|
1 | 630 |
// incoming parameters |
631 |
const Register exception_oop = rax; |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
632 |
const Register exception_pc = rdx; |
1 | 633 |
// other registers used in this stub |
1066 | 634 |
const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
1 | 635 |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
636 |
// Save registers, if required. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
637 |
OopMapSet* oop_maps = new OopMapSet(); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
638 |
OopMap* oop_map = NULL; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
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diff
changeset
|
639 |
switch (id) { |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
640 |
case forward_exception_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
641 |
// We're handling an exception in the context of a compiled frame. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
642 |
// The registers have been saved in the standard places. Perform |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
643 |
// an exception lookup in the caller and dispatch to the handler |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
644 |
// if found. Otherwise unwind and dispatch to the callers |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
645 |
// exception handler. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
646 |
oop_map = generate_oop_map(sasm, 1 /*thread*/); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
647 |
|
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
648 |
// load and clear pending exception oop into RAX |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
649 |
__ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
650 |
__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
651 |
|
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
652 |
// load issuing PC (the return address for this stub) into rdx |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
653 |
__ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
654 |
|
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
655 |
// make sure that the vm_results are cleared (may be unnecessary) |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
656 |
__ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
657 |
__ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
658 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
659 |
case handle_exception_nofpu_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
660 |
case handle_exception_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
661 |
// At this point all registers MAY be live. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
662 |
oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
663 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
664 |
case handle_exception_from_callee_id: { |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
665 |
// At this point all registers except exception oop (RAX) and |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
666 |
// exception pc (RDX) are dead. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
667 |
const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
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diff
changeset
|
668 |
oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
669 |
sasm->set_frame_size(frame_size); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
670 |
WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
671 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
672 |
} |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
673 |
default: ShouldNotReachHere(); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
674 |
} |
1 | 675 |
|
676 |
#ifdef TIERED |
|
677 |
// C2 can leave the fpu stack dirty |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
678 |
if (UseSSE < 2) { |
1 | 679 |
__ empty_FPU_stack(); |
680 |
} |
|
681 |
#endif // TIERED |
|
682 |
||
683 |
// verify that only rax, and rdx is valid at this time |
|
684 |
__ invalidate_registers(false, true, true, false, true, true); |
|
685 |
// verify that rax, contains a valid exception |
|
686 |
__ verify_not_null_oop(exception_oop); |
|
687 |
||
688 |
// load address of JavaThread object for thread-local data |
|
1066 | 689 |
NOT_LP64(__ get_thread(thread);) |
1 | 690 |
|
691 |
#ifdef ASSERT |
|
692 |
// check that fields in JavaThread for exception oop and issuing pc are |
|
693 |
// empty before writing to them |
|
694 |
Label oop_empty; |
|
1066 | 695 |
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
1 | 696 |
__ jcc(Assembler::equal, oop_empty); |
697 |
__ stop("exception oop already set"); |
|
698 |
__ bind(oop_empty); |
|
699 |
||
700 |
Label pc_empty; |
|
1066 | 701 |
__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
1 | 702 |
__ jcc(Assembler::equal, pc_empty); |
703 |
__ stop("exception pc already set"); |
|
704 |
__ bind(pc_empty); |
|
705 |
#endif |
|
706 |
||
707 |
// save exception oop and issuing pc into JavaThread |
|
708 |
// (exception handler will load it from here) |
|
1066 | 709 |
__ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
710 |
__ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
1 | 711 |
|
712 |
// patch throwing pc into return address (has bci & oop map) |
|
1066 | 713 |
__ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
1 | 714 |
|
715 |
// compute the exception handler. |
|
716 |
// the exception oop and the throwing pc are read from the fields in JavaThread |
|
717 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); |
|
718 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
719 |
||
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
720 |
// rax: handler address |
1 | 721 |
// will be the deopt blob if nmethod was deoptimized while we looked up |
722 |
// handler regardless of whether handler existed in the nmethod. |
|
723 |
||
724 |
// only rax, is valid at this time, all other registers have been destroyed by the runtime call |
|
725 |
__ invalidate_registers(false, true, true, true, true, true); |
|
726 |
||
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
727 |
// patch the return address, this stub will directly return to the exception handler |
1066 | 728 |
__ movptr(Address(rbp, 1*BytesPerWord), rax); |
1 | 729 |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
730 |
switch (id) { |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
731 |
case forward_exception_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
732 |
case handle_exception_nofpu_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
733 |
case handle_exception_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
734 |
// Restore the registers that were saved at the beginning. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
735 |
restore_live_registers(sasm, id == handle_exception_nofpu_id); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
736 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
737 |
case handle_exception_from_callee_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
738 |
// WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
739 |
// since we do a leave anyway. |
1 | 740 |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
741 |
// Pop the return address since we are possibly changing SP (restoring from BP). |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
742 |
__ leave(); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
743 |
__ pop(rcx); |
1 | 744 |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
745 |
// Restore SP from BP if the exception PC is a method handle call site. |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
746 |
NOT_LP64(__ get_thread(thread);) |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
747 |
__ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
748 |
__ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
749 |
__ jmp(rcx); // jump to exception handler |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
750 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
751 |
default: ShouldNotReachHere(); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
752 |
} |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
753 |
|
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
754 |
return oop_maps; |
1 | 755 |
} |
756 |
||
757 |
||
758 |
void Runtime1::generate_unwind_exception(StubAssembler *sasm) { |
|
759 |
// incoming parameters |
|
760 |
const Register exception_oop = rax; |
|
5046 | 761 |
// callee-saved copy of exception_oop during runtime call |
762 |
const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); |
|
1 | 763 |
// other registers used in this stub |
764 |
const Register exception_pc = rdx; |
|
765 |
const Register handler_addr = rbx; |
|
1066 | 766 |
const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
1 | 767 |
|
768 |
// verify that only rax, is valid at this time |
|
769 |
__ invalidate_registers(false, true, true, true, true, true); |
|
770 |
||
771 |
#ifdef ASSERT |
|
772 |
// check that fields in JavaThread for exception oop and issuing pc are empty |
|
1066 | 773 |
NOT_LP64(__ get_thread(thread);) |
1 | 774 |
Label oop_empty; |
1066 | 775 |
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
1 | 776 |
__ jcc(Assembler::equal, oop_empty); |
777 |
__ stop("exception oop must be empty"); |
|
778 |
__ bind(oop_empty); |
|
779 |
||
780 |
Label pc_empty; |
|
1066 | 781 |
__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
1 | 782 |
__ jcc(Assembler::equal, pc_empty); |
783 |
__ stop("exception pc must be empty"); |
|
784 |
__ bind(pc_empty); |
|
785 |
#endif |
|
786 |
||
787 |
// clear the FPU stack in case any FPU results are left behind |
|
788 |
__ empty_FPU_stack(); |
|
789 |
||
5046 | 790 |
// save exception_oop in callee-saved register to preserve it during runtime calls |
791 |
__ verify_not_null_oop(exception_oop); |
|
792 |
__ movptr(exception_oop_callee_saved, exception_oop); |
|
793 |
||
794 |
NOT_LP64(__ get_thread(thread);) |
|
795 |
// Get return address (is on top of stack after leave). |
|
1066 | 796 |
__ movptr(exception_pc, Address(rsp, 0)); |
1 | 797 |
|
5046 | 798 |
// search the exception handler address of the caller (using the return address) |
799 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); |
|
800 |
// rax: exception handler address of the caller |
|
1 | 801 |
|
5046 | 802 |
// Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
803 |
__ invalidate_registers(false, true, true, true, false, true); |
|
1 | 804 |
|
805 |
// move result of call into correct register |
|
1066 | 806 |
__ movptr(handler_addr, rax); |
1 | 807 |
|
5046 | 808 |
// Restore exception oop to RAX (required convention of exception handler). |
809 |
__ movptr(exception_oop, exception_oop_callee_saved); |
|
1 | 810 |
|
5046 | 811 |
// verify that there is really a valid exception in rax |
812 |
__ verify_not_null_oop(exception_oop); |
|
1 | 813 |
|
814 |
// get throwing pc (= return address). |
|
815 |
// rdx has been destroyed by the call, so it must be set again |
|
816 |
// the pop is also necessary to simulate the effect of a ret(0) |
|
1066 | 817 |
__ pop(exception_pc); |
1 | 818 |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
819 |
// Restore SP from BP if the exception PC is a method handle call site. |
5046 | 820 |
NOT_LP64(__ get_thread(thread);) |
5252
58f23871a5b6
6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents:
5046
diff
changeset
|
821 |
__ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
5687 | 822 |
__ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
1 | 823 |
|
824 |
// continue at exception handler (return address removed) |
|
825 |
// note: do *not* remove arguments when unwinding the |
|
826 |
// activation since the caller assumes having |
|
827 |
// all arguments on the stack when entering the |
|
828 |
// runtime to determine the exception handler |
|
829 |
// (GC happens at call site with arguments!) |
|
5046 | 830 |
// rax: exception oop |
1 | 831 |
// rdx: throwing pc |
5046 | 832 |
// rbx: exception handler |
1 | 833 |
__ jmp(handler_addr); |
834 |
} |
|
835 |
||
836 |
||
837 |
OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { |
|
838 |
// use the maximum number of runtime-arguments here because it is difficult to |
|
839 |
// distinguish each RT-Call. |
|
840 |
// Note: This number affects also the RT-Call in generate_handle_exception because |
|
841 |
// the oop-map is shared for all calls. |
|
842 |
const int num_rt_args = 2; // thread + dummy |
|
843 |
||
844 |
DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
|
845 |
assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
|
846 |
||
847 |
OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
|
848 |
||
1066 | 849 |
#ifdef _LP64 |
850 |
const Register thread = r15_thread; |
|
851 |
// No need to worry about dummy |
|
852 |
__ mov(c_rarg0, thread); |
|
853 |
#else |
|
854 |
__ push(rax); // push dummy |
|
1 | 855 |
|
856 |
const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) |
|
857 |
// push java thread (becomes first argument of C function) |
|
858 |
__ get_thread(thread); |
|
1066 | 859 |
__ push(thread); |
860 |
#endif // _LP64 |
|
1 | 861 |
__ set_last_Java_frame(thread, noreg, rbp, NULL); |
862 |
// do the call |
|
863 |
__ call(RuntimeAddress(target)); |
|
864 |
OopMapSet* oop_maps = new OopMapSet(); |
|
865 |
oop_maps->add_gc_map(__ offset(), oop_map); |
|
866 |
// verify callee-saved register |
|
867 |
#ifdef ASSERT |
|
868 |
guarantee(thread != rax, "change this code"); |
|
1066 | 869 |
__ push(rax); |
1 | 870 |
{ Label L; |
871 |
__ get_thread(rax); |
|
1066 | 872 |
__ cmpptr(thread, rax); |
1 | 873 |
__ jcc(Assembler::equal, L); |
1066 | 874 |
__ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
1 | 875 |
__ bind(L); |
876 |
} |
|
1066 | 877 |
__ pop(rax); |
1 | 878 |
#endif |
879 |
__ reset_last_Java_frame(thread, true, false); |
|
1066 | 880 |
#ifndef _LP64 |
881 |
__ pop(rcx); // discard thread arg |
|
882 |
__ pop(rcx); // discard dummy |
|
883 |
#endif // _LP64 |
|
1 | 884 |
|
885 |
// check for pending exceptions |
|
886 |
{ Label L; |
|
1066 | 887 |
__ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
1 | 888 |
__ jcc(Assembler::equal, L); |
889 |
// exception pending => remove activation and forward to exception handler |
|
890 |
||
1066 | 891 |
__ testptr(rax, rax); // have we deoptimized? |
1 | 892 |
__ jump_cc(Assembler::equal, |
893 |
RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); |
|
894 |
||
895 |
// the deopt blob expects exceptions in the special fields of |
|
896 |
// JavaThread, so copy and clear pending exception. |
|
897 |
||
898 |
// load and clear pending exception |
|
1066 | 899 |
__ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
1888
bbf498fb4354
6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
xlu
parents:
1412
diff
changeset
|
900 |
__ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
1 | 901 |
|
902 |
// check that there is really a valid exception |
|
903 |
__ verify_not_null_oop(rax); |
|
904 |
||
905 |
// load throwing pc: this is the return address of the stub |
|
1066 | 906 |
__ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
1 | 907 |
|
908 |
#ifdef ASSERT |
|
909 |
// check that fields in JavaThread for exception oop and issuing pc are empty |
|
910 |
Label oop_empty; |
|
1066 | 911 |
__ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
1 | 912 |
__ jcc(Assembler::equal, oop_empty); |
913 |
__ stop("exception oop must be empty"); |
|
914 |
__ bind(oop_empty); |
|
915 |
||
916 |
Label pc_empty; |
|
1066 | 917 |
__ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
1 | 918 |
__ jcc(Assembler::equal, pc_empty); |
919 |
__ stop("exception pc must be empty"); |
|
920 |
__ bind(pc_empty); |
|
921 |
#endif |
|
922 |
||
923 |
// store exception oop and throwing pc to JavaThread |
|
1066 | 924 |
__ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
925 |
__ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); |
|
1 | 926 |
|
927 |
restore_live_registers(sasm); |
|
928 |
||
929 |
__ leave(); |
|
1066 | 930 |
__ addptr(rsp, BytesPerWord); // remove return address from stack |
1 | 931 |
|
932 |
// Forward the exception directly to deopt blob. We can blow no |
|
933 |
// registers and must leave throwing pc on the stack. A patch may |
|
934 |
// have values live in registers so the entry point with the |
|
935 |
// exception in tls. |
|
936 |
__ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); |
|
937 |
||
938 |
__ bind(L); |
|
939 |
} |
|
940 |
||
941 |
||
942 |
// Runtime will return true if the nmethod has been deoptimized during |
|
943 |
// the patching process. In that case we must do a deopt reexecute instead. |
|
944 |
||
945 |
Label reexecuteEntry, cont; |
|
946 |
||
1066 | 947 |
__ testptr(rax, rax); // have we deoptimized? |
1 | 948 |
__ jcc(Assembler::equal, cont); // no |
949 |
||
950 |
// Will reexecute. Proper return address is already on the stack we just restore |
|
951 |
// registers, pop all of our frame but the return address and jump to the deopt blob |
|
952 |
restore_live_registers(sasm); |
|
953 |
__ leave(); |
|
954 |
__ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
|
955 |
||
956 |
__ bind(cont); |
|
957 |
restore_live_registers(sasm); |
|
958 |
__ leave(); |
|
959 |
__ ret(0); |
|
960 |
||
961 |
return oop_maps; |
|
962 |
} |
|
963 |
||
964 |
||
965 |
OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { |
|
966 |
||
967 |
// for better readability |
|
968 |
const bool must_gc_arguments = true; |
|
969 |
const bool dont_gc_arguments = false; |
|
970 |
||
971 |
// default value; overwritten for some optimized stubs that are called from methods that do not use the fpu |
|
972 |
bool save_fpu_registers = true; |
|
973 |
||
974 |
// stub code & info for the different stubs |
|
975 |
OopMapSet* oop_maps = NULL; |
|
976 |
switch (id) { |
|
977 |
case forward_exception_id: |
|
978 |
{ |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
979 |
oop_maps = generate_handle_exception(id, sasm); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
980 |
__ leave(); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
981 |
__ ret(0); |
1 | 982 |
} |
983 |
break; |
|
984 |
||
985 |
case new_instance_id: |
|
986 |
case fast_new_instance_id: |
|
987 |
case fast_new_instance_init_check_id: |
|
988 |
{ |
|
989 |
Register klass = rdx; // Incoming |
|
990 |
Register obj = rax; // Result |
|
991 |
||
992 |
if (id == new_instance_id) { |
|
993 |
__ set_info("new_instance", dont_gc_arguments); |
|
994 |
} else if (id == fast_new_instance_id) { |
|
995 |
__ set_info("fast new_instance", dont_gc_arguments); |
|
996 |
} else { |
|
997 |
assert(id == fast_new_instance_init_check_id, "bad StubID"); |
|
998 |
__ set_info("fast new_instance init check", dont_gc_arguments); |
|
999 |
} |
|
1000 |
||
1001 |
if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && |
|
1002 |
UseTLAB && FastTLABRefill) { |
|
1003 |
Label slow_path; |
|
1004 |
Register obj_size = rcx; |
|
1005 |
Register t1 = rbx; |
|
1006 |
Register t2 = rsi; |
|
1007 |
assert_different_registers(klass, obj, obj_size, t1, t2); |
|
1008 |
||
1066 | 1009 |
__ push(rdi); |
1010 |
__ push(rbx); |
|
1 | 1011 |
|
1012 |
if (id == fast_new_instance_init_check_id) { |
|
1013 |
// make sure the klass is initialized |
|
1014 |
__ cmpl(Address(klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc)), instanceKlass::fully_initialized); |
|
1015 |
__ jcc(Assembler::notEqual, slow_path); |
|
1016 |
} |
|
1017 |
||
1018 |
#ifdef ASSERT |
|
1019 |
// assert object can be fast path allocated |
|
1020 |
{ |
|
1021 |
Label ok, not_ok; |
|
1022 |
__ movl(obj_size, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); |
|
1023 |
__ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) |
|
1024 |
__ jcc(Assembler::lessEqual, not_ok); |
|
1025 |
__ testl(obj_size, Klass::_lh_instance_slow_path_bit); |
|
1026 |
__ jcc(Assembler::zero, ok); |
|
1027 |
__ bind(not_ok); |
|
1028 |
__ stop("assert(can be fast path allocated)"); |
|
1029 |
__ should_not_reach_here(); |
|
1030 |
__ bind(ok); |
|
1031 |
} |
|
1032 |
#endif // ASSERT |
|
1033 |
||
1034 |
// if we got here then the TLAB allocation failed, so try |
|
1035 |
// refilling the TLAB or allocating directly from eden. |
|
1036 |
Label retry_tlab, try_eden; |
|
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1037 |
const Register thread = |
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1038 |
__ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi |
1 | 1039 |
|
1040 |
__ bind(retry_tlab); |
|
1041 |
||
1066 | 1042 |
// get the instance size (size is postive so movl is fine for 64bit) |
1 | 1043 |
__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1044 |
|
1 | 1045 |
__ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); |
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1046 |
|
1 | 1047 |
__ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1048 |
__ verify_oop(obj); |
|
1066 | 1049 |
__ pop(rbx); |
1050 |
__ pop(rdi); |
|
1 | 1051 |
__ ret(0); |
1052 |
||
1053 |
__ bind(try_eden); |
|
1066 | 1054 |
// get the instance size (size is postive so movl is fine for 64bit) |
1 | 1055 |
__ movl(obj_size, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1056 |
|
1 | 1057 |
__ eden_allocate(obj, obj_size, 0, t1, slow_path); |
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1058 |
__ incr_allocated_bytes(thread, obj_size, 0); |
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1059 |
|
1 | 1060 |
__ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1061 |
__ verify_oop(obj); |
|
1066 | 1062 |
__ pop(rbx); |
1063 |
__ pop(rdi); |
|
1 | 1064 |
__ ret(0); |
1065 |
||
1066 |
__ bind(slow_path); |
|
1066 | 1067 |
__ pop(rbx); |
1068 |
__ pop(rdi); |
|
1 | 1069 |
} |
1070 |
||
1071 |
__ enter(); |
|
1072 |
OopMap* map = save_live_registers(sasm, 2); |
|
1073 |
int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); |
|
1074 |
oop_maps = new OopMapSet(); |
|
1075 |
oop_maps->add_gc_map(call_offset, map); |
|
1076 |
restore_live_registers_except_rax(sasm); |
|
1077 |
__ verify_oop(obj); |
|
1078 |
__ leave(); |
|
1079 |
__ ret(0); |
|
1080 |
||
1081 |
// rax,: new instance |
|
1082 |
} |
|
1083 |
||
1084 |
break; |
|
1085 |
||
1086 |
case counter_overflow_id: |
|
1087 |
{ |
|
6453 | 1088 |
Register bci = rax, method = rbx; |
1 | 1089 |
__ enter(); |
6453 | 1090 |
OopMap* map = save_live_registers(sasm, 3); |
1 | 1091 |
// Retrieve bci |
1092 |
__ movl(bci, Address(rbp, 2*BytesPerWord)); |
|
6453 | 1093 |
// And a pointer to the methodOop |
1094 |
__ movptr(method, Address(rbp, 3*BytesPerWord)); |
|
1095 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); |
|
1 | 1096 |
oop_maps = new OopMapSet(); |
1097 |
oop_maps->add_gc_map(call_offset, map); |
|
1098 |
restore_live_registers(sasm); |
|
1099 |
__ leave(); |
|
1100 |
__ ret(0); |
|
1101 |
} |
|
1102 |
break; |
|
1103 |
||
1104 |
case new_type_array_id: |
|
1105 |
case new_object_array_id: |
|
1106 |
{ |
|
1107 |
Register length = rbx; // Incoming |
|
1108 |
Register klass = rdx; // Incoming |
|
1109 |
Register obj = rax; // Result |
|
1110 |
||
1111 |
if (id == new_type_array_id) { |
|
1112 |
__ set_info("new_type_array", dont_gc_arguments); |
|
1113 |
} else { |
|
1114 |
__ set_info("new_object_array", dont_gc_arguments); |
|
1115 |
} |
|
1116 |
||
1117 |
#ifdef ASSERT |
|
1118 |
// assert object type is really an array of the proper kind |
|
1119 |
{ |
|
1120 |
Label ok; |
|
1121 |
Register t0 = obj; |
|
1122 |
__ movl(t0, Address(klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc))); |
|
1123 |
__ sarl(t0, Klass::_lh_array_tag_shift); |
|
1124 |
int tag = ((id == new_type_array_id) |
|
1125 |
? Klass::_lh_array_tag_type_value |
|
1126 |
: Klass::_lh_array_tag_obj_value); |
|
1127 |
__ cmpl(t0, tag); |
|
1128 |
__ jcc(Assembler::equal, ok); |
|
1129 |
__ stop("assert(is an array klass)"); |
|
1130 |
__ should_not_reach_here(); |
|
1131 |
__ bind(ok); |
|
1132 |
} |
|
1133 |
#endif // ASSERT |
|
1134 |
||
1135 |
if (UseTLAB && FastTLABRefill) { |
|
1136 |
Register arr_size = rsi; |
|
1137 |
Register t1 = rcx; // must be rcx for use as shift count |
|
1138 |
Register t2 = rdi; |
|
1139 |
Label slow_path; |
|
1140 |
assert_different_registers(length, klass, obj, arr_size, t1, t2); |
|
1141 |
||
1142 |
// check that array length is small enough for fast path. |
|
1143 |
__ cmpl(length, C1_MacroAssembler::max_array_allocation_length); |
|
1144 |
__ jcc(Assembler::above, slow_path); |
|
1145 |
||
1146 |
// if we got here then the TLAB allocation failed, so try |
|
1147 |
// refilling the TLAB or allocating directly from eden. |
|
1148 |
Label retry_tlab, try_eden; |
|
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1149 |
const Register thread = |
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1150 |
__ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi |
1 | 1151 |
|
1152 |
__ bind(retry_tlab); |
|
1153 |
||
1154 |
// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) |
|
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1155 |
// since size is positive movl does right thing on 64bit |
1 | 1156 |
__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1066 | 1157 |
// since size is postive movl does right thing on 64bit |
1 | 1158 |
__ movl(arr_size, length); |
1159 |
assert(t1 == rcx, "fixed register usage"); |
|
1066 | 1160 |
__ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1161 |
__ shrptr(t1, Klass::_lh_header_size_shift); |
|
1162 |
__ andptr(t1, Klass::_lh_header_size_mask); |
|
1163 |
__ addptr(arr_size, t1); |
|
1164 |
__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up |
|
1165 |
__ andptr(arr_size, ~MinObjAlignmentInBytesMask); |
|
1 | 1166 |
|
1167 |
__ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size |
|
1168 |
||
1169 |
__ initialize_header(obj, klass, length, t1, t2); |
|
1170 |
__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); |
|
1171 |
assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
|
1172 |
assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); |
|
1066 | 1173 |
__ andptr(t1, Klass::_lh_header_size_mask); |
1174 |
__ subptr(arr_size, t1); // body length |
|
1175 |
__ addptr(t1, obj); // body start |
|
1 | 1176 |
__ initialize_body(t1, arr_size, 0, t2); |
1177 |
__ verify_oop(obj); |
|
1178 |
__ ret(0); |
|
1179 |
||
1180 |
__ bind(try_eden); |
|
1181 |
// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) |
|
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1182 |
// since size is positive movl does right thing on 64bit |
1 | 1183 |
__ movl(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes())); |
1066 | 1184 |
// since size is postive movl does right thing on 64bit |
1 | 1185 |
__ movl(arr_size, length); |
1186 |
assert(t1 == rcx, "fixed register usage"); |
|
1066 | 1187 |
__ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1188 |
__ shrptr(t1, Klass::_lh_header_size_shift); |
|
1189 |
__ andptr(t1, Klass::_lh_header_size_mask); |
|
1190 |
__ addptr(arr_size, t1); |
|
1191 |
__ addptr(arr_size, MinObjAlignmentInBytesMask); // align up |
|
1192 |
__ andptr(arr_size, ~MinObjAlignmentInBytesMask); |
|
1 | 1193 |
|
1194 |
__ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size |
|
7724
a92d706dbdd5
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
7427
diff
changeset
|
1195 |
__ incr_allocated_bytes(thread, arr_size, 0); |
1 | 1196 |
|
1197 |
__ initialize_header(obj, klass, length, t1, t2); |
|
1198 |
__ movb(t1, Address(klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes() + (Klass::_lh_header_size_shift / BitsPerByte))); |
|
1199 |
assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
|
1200 |
assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); |
|
1066 | 1201 |
__ andptr(t1, Klass::_lh_header_size_mask); |
1202 |
__ subptr(arr_size, t1); // body length |
|
1203 |
__ addptr(t1, obj); // body start |
|
1 | 1204 |
__ initialize_body(t1, arr_size, 0, t2); |
1205 |
__ verify_oop(obj); |
|
1206 |
__ ret(0); |
|
1207 |
||
1208 |
__ bind(slow_path); |
|
1209 |
} |
|
1210 |
||
1211 |
__ enter(); |
|
1212 |
OopMap* map = save_live_registers(sasm, 3); |
|
1213 |
int call_offset; |
|
1214 |
if (id == new_type_array_id) { |
|
1215 |
call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); |
|
1216 |
} else { |
|
1217 |
call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); |
|
1218 |
} |
|
1219 |
||
1220 |
oop_maps = new OopMapSet(); |
|
1221 |
oop_maps->add_gc_map(call_offset, map); |
|
1222 |
restore_live_registers_except_rax(sasm); |
|
1223 |
||
1224 |
__ verify_oop(obj); |
|
1225 |
__ leave(); |
|
1226 |
__ ret(0); |
|
1227 |
||
1228 |
// rax,: new array |
|
1229 |
} |
|
1230 |
break; |
|
1231 |
||
1232 |
case new_multi_array_id: |
|
1233 |
{ StubFrame f(sasm, "new_multi_array", dont_gc_arguments); |
|
1234 |
// rax,: klass |
|
1235 |
// rbx,: rank |
|
1236 |
// rcx: address of 1st dimension |
|
1237 |
OopMap* map = save_live_registers(sasm, 4); |
|
1238 |
int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); |
|
1239 |
||
1240 |
oop_maps = new OopMapSet(); |
|
1241 |
oop_maps->add_gc_map(call_offset, map); |
|
1242 |
restore_live_registers_except_rax(sasm); |
|
1243 |
||
1244 |
// rax,: new multi array |
|
1245 |
__ verify_oop(rax); |
|
1246 |
} |
|
1247 |
break; |
|
1248 |
||
1249 |
case register_finalizer_id: |
|
1250 |
{ |
|
1251 |
__ set_info("register_finalizer", dont_gc_arguments); |
|
1252 |
||
1066 | 1253 |
// This is called via call_runtime so the arguments |
1254 |
// will be place in C abi locations |
|
1255 |
||
1256 |
#ifdef _LP64 |
|
1257 |
__ verify_oop(c_rarg0); |
|
1258 |
__ mov(rax, c_rarg0); |
|
1259 |
#else |
|
1 | 1260 |
// The object is passed on the stack and we haven't pushed a |
1261 |
// frame yet so it's one work away from top of stack. |
|
1066 | 1262 |
__ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
1 | 1263 |
__ verify_oop(rax); |
1066 | 1264 |
#endif // _LP64 |
1 | 1265 |
|
1266 |
// load the klass and check the has finalizer flag |
|
1267 |
Label register_finalizer; |
|
1268 |
Register t = rsi; |
|
7427 | 1269 |
__ load_klass(t, rax); |
1 | 1270 |
__ movl(t, Address(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc))); |
1271 |
__ testl(t, JVM_ACC_HAS_FINALIZER); |
|
1272 |
__ jcc(Assembler::notZero, register_finalizer); |
|
1273 |
__ ret(0); |
|
1274 |
||
1275 |
__ bind(register_finalizer); |
|
1276 |
__ enter(); |
|
1277 |
OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); |
|
1278 |
int call_offset = __ call_RT(noreg, noreg, |
|
1279 |
CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); |
|
1280 |
oop_maps = new OopMapSet(); |
|
1281 |
oop_maps->add_gc_map(call_offset, oop_map); |
|
1282 |
||
1283 |
// Now restore all the live registers |
|
1284 |
restore_live_registers(sasm); |
|
1285 |
||
1286 |
__ leave(); |
|
1287 |
__ ret(0); |
|
1288 |
} |
|
1289 |
break; |
|
1290 |
||
1291 |
case throw_range_check_failed_id: |
|
1292 |
{ StubFrame f(sasm, "range_check_failed", dont_gc_arguments); |
|
1293 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); |
|
1294 |
} |
|
1295 |
break; |
|
1296 |
||
1297 |
case throw_index_exception_id: |
|
1298 |
{ StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); |
|
1299 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); |
|
1300 |
} |
|
1301 |
break; |
|
1302 |
||
1303 |
case throw_div0_exception_id: |
|
1304 |
{ StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); |
|
1305 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); |
|
1306 |
} |
|
1307 |
break; |
|
1308 |
||
1309 |
case throw_null_pointer_exception_id: |
|
1310 |
{ StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); |
|
1311 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); |
|
1312 |
} |
|
1313 |
break; |
|
1314 |
||
1315 |
case handle_exception_nofpu_id: |
|
1316 |
case handle_exception_id: |
|
1317 |
{ StubFrame f(sasm, "handle_exception", dont_gc_arguments); |
|
8495
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1318 |
oop_maps = generate_handle_exception(id, sasm); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1319 |
} |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1320 |
break; |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1321 |
|
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1322 |
case handle_exception_from_callee_id: |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1323 |
{ StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
a4959965eaa3
7012914: JSR 292 MethodHandlesTest C1: frame::verify_return_pc(return_address) failed: must be a return pc
twisti
parents:
8067
diff
changeset
|
1324 |
oop_maps = generate_handle_exception(id, sasm); |
1 | 1325 |
} |
1326 |
break; |
|
1327 |
||
1328 |
case unwind_exception_id: |
|
1329 |
{ __ set_info("unwind_exception", dont_gc_arguments); |
|
1330 |
// note: no stubframe since we are about to leave the current |
|
1331 |
// activation and we are calling a leaf VM function only. |
|
1332 |
generate_unwind_exception(sasm); |
|
1333 |
} |
|
1334 |
break; |
|
1335 |
||
1336 |
case throw_array_store_exception_id: |
|
1337 |
{ StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); |
|
1338 |
// tos + 0: link |
|
1339 |
// + 1: return address |
|
8067
f5f4eac4c48f
7008809: should report the class in ArrayStoreExceptions from compiled code
never
parents:
7724
diff
changeset
|
1340 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
1 | 1341 |
} |
1342 |
break; |
|
1343 |
||
1344 |
case throw_class_cast_exception_id: |
|
1345 |
{ StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); |
|
1346 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); |
|
1347 |
} |
|
1348 |
break; |
|
1349 |
||
1350 |
case throw_incompatible_class_change_error_id: |
|
1351 |
{ StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); |
|
1352 |
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); |
|
1353 |
} |
|
1354 |
break; |
|
1355 |
||
1356 |
case slow_subtype_check_id: |
|
1357 |
{ |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1358 |
// Typical calling sequence: |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1359 |
// __ push(klass_RInfo); // object klass or other subclass |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1360 |
// __ push(sup_k_RInfo); // array element klass or other superclass |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1361 |
// __ call(slow_subtype_check); |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1362 |
// Note that the subclass is pushed first, and is therefore deepest. |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1363 |
// Previous versions of this code reversed the names 'sub' and 'super'. |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1364 |
// This was operationally harmless but made the code unreadable. |
1 | 1365 |
enum layout { |
1066 | 1366 |
rax_off, SLOT2(raxH_off) |
1367 |
rcx_off, SLOT2(rcxH_off) |
|
1368 |
rsi_off, SLOT2(rsiH_off) |
|
1369 |
rdi_off, SLOT2(rdiH_off) |
|
1370 |
// saved_rbp_off, SLOT2(saved_rbpH_off) |
|
1371 |
return_off, SLOT2(returnH_off) |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1372 |
sup_k_off, SLOT2(sup_kH_off) |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1373 |
klass_off, SLOT2(superH_off) |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1374 |
framesize, |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1375 |
result_off = klass_off // deepest argument is also the return value |
1 | 1376 |
}; |
1377 |
||
1378 |
__ set_info("slow_subtype_check", dont_gc_arguments); |
|
1066 | 1379 |
__ push(rdi); |
1380 |
__ push(rsi); |
|
1381 |
__ push(rcx); |
|
1382 |
__ push(rax); |
|
1 | 1383 |
|
1066 | 1384 |
// This is called by pushing args and not with C abi |
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1385 |
__ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1386 |
__ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
1 | 1387 |
|
1388 |
Label miss; |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1389 |
__ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1390 |
|
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1391 |
// fallthrough on success: |
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1392 |
__ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
1066 | 1393 |
__ pop(rax); |
1394 |
__ pop(rcx); |
|
1395 |
__ pop(rsi); |
|
1396 |
__ pop(rdi); |
|
1 | 1397 |
__ ret(0); |
1398 |
||
1399 |
__ bind(miss); |
|
2256
82d4e10b7c6b
6813212: factor duplicated assembly code for general subclass check (for 6655638)
jrose
parents:
1909
diff
changeset
|
1400 |
__ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
1066 | 1401 |
__ pop(rax); |
1402 |
__ pop(rcx); |
|
1403 |
__ pop(rsi); |
|
1404 |
__ pop(rdi); |
|
1 | 1405 |
__ ret(0); |
1406 |
} |
|
1407 |
break; |
|
1408 |
||
1409 |
case monitorenter_nofpu_id: |
|
1410 |
save_fpu_registers = false; |
|
1411 |
// fall through |
|
1412 |
case monitorenter_id: |
|
1413 |
{ |
|
1414 |
StubFrame f(sasm, "monitorenter", dont_gc_arguments); |
|
1415 |
OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); |
|
1416 |
||
1066 | 1417 |
// Called with store_parameter and not C abi |
1418 |
||
1 | 1419 |
f.load_argument(1, rax); // rax,: object |
1420 |
f.load_argument(0, rbx); // rbx,: lock address |
|
1421 |
||
1422 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); |
|
1423 |
||
1424 |
oop_maps = new OopMapSet(); |
|
1425 |
oop_maps->add_gc_map(call_offset, map); |
|
1426 |
restore_live_registers(sasm, save_fpu_registers); |
|
1427 |
} |
|
1428 |
break; |
|
1429 |
||
1430 |
case monitorexit_nofpu_id: |
|
1431 |
save_fpu_registers = false; |
|
1432 |
// fall through |
|
1433 |
case monitorexit_id: |
|
1434 |
{ |
|
1435 |
StubFrame f(sasm, "monitorexit", dont_gc_arguments); |
|
1436 |
OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
|
1437 |
||
1066 | 1438 |
// Called with store_parameter and not C abi |
1439 |
||
1 | 1440 |
f.load_argument(0, rax); // rax,: lock address |
1441 |
||
1442 |
// note: really a leaf routine but must setup last java sp |
|
1443 |
// => use call_RT for now (speed can be improved by |
|
1444 |
// doing last java sp setup manually) |
|
1445 |
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); |
|
1446 |
||
1447 |
oop_maps = new OopMapSet(); |
|
1448 |
oop_maps->add_gc_map(call_offset, map); |
|
1449 |
restore_live_registers(sasm, save_fpu_registers); |
|
1450 |
||
1451 |
} |
|
1452 |
break; |
|
1453 |
||
1454 |
case access_field_patching_id: |
|
1455 |
{ StubFrame f(sasm, "access_field_patching", dont_gc_arguments); |
|
1456 |
// we should set up register map |
|
1457 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); |
|
1458 |
} |
|
1459 |
break; |
|
1460 |
||
1461 |
case load_klass_patching_id: |
|
1462 |
{ StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); |
|
1463 |
// we should set up register map |
|
1464 |
oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); |
|
1465 |
} |
|
1466 |
break; |
|
1467 |
||
1468 |
case dtrace_object_alloc_id: |
|
1469 |
{ // rax,: object |
|
1470 |
StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); |
|
1471 |
// we can't gc here so skip the oopmap but make sure that all |
|
1472 |
// the live registers get saved. |
|
1473 |
save_live_registers(sasm, 1); |
|
1474 |
||
1066 | 1475 |
__ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
1 | 1476 |
__ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
1066 | 1477 |
NOT_LP64(__ pop(rax)); |
1 | 1478 |
|
1479 |
restore_live_registers(sasm); |
|
1480 |
} |
|
1481 |
break; |
|
1482 |
||
1483 |
case fpu2long_stub_id: |
|
1484 |
{ |
|
1485 |
// rax, and rdx are destroyed, but should be free since the result is returned there |
|
1486 |
// preserve rsi,ecx |
|
1066 | 1487 |
__ push(rsi); |
1488 |
__ push(rcx); |
|
1489 |
LP64_ONLY(__ push(rdx);) |
|
1 | 1490 |
|
1491 |
// check for NaN |
|
1492 |
Label return0, do_return, return_min_jlong, do_convert; |
|
1493 |
||
1066 | 1494 |
Address value_high_word(rsp, wordSize + 4); |
1495 |
Address value_low_word(rsp, wordSize); |
|
1496 |
Address result_high_word(rsp, 3*wordSize + 4); |
|
1497 |
Address result_low_word(rsp, 3*wordSize); |
|
1 | 1498 |
|
1066 | 1499 |
__ subptr(rsp, 32); // more than enough on 32bit |
1 | 1500 |
__ fst_d(value_low_word); |
1501 |
__ movl(rax, value_high_word); |
|
1502 |
__ andl(rax, 0x7ff00000); |
|
1503 |
__ cmpl(rax, 0x7ff00000); |
|
1504 |
__ jcc(Assembler::notEqual, do_convert); |
|
1505 |
__ movl(rax, value_high_word); |
|
1506 |
__ andl(rax, 0xfffff); |
|
1507 |
__ orl(rax, value_low_word); |
|
1508 |
__ jcc(Assembler::notZero, return0); |
|
1509 |
||
1510 |
__ bind(do_convert); |
|
1511 |
__ fnstcw(Address(rsp, 0)); |
|
1066 | 1512 |
__ movzwl(rax, Address(rsp, 0)); |
1 | 1513 |
__ orl(rax, 0xc00); |
1514 |
__ movw(Address(rsp, 2), rax); |
|
1515 |
__ fldcw(Address(rsp, 2)); |
|
1516 |
__ fwait(); |
|
1517 |
__ fistp_d(result_low_word); |
|
1518 |
__ fldcw(Address(rsp, 0)); |
|
1519 |
__ fwait(); |
|
1066 | 1520 |
// This gets the entire long in rax on 64bit |
1521 |
__ movptr(rax, result_low_word); |
|
1522 |
// testing of high bits |
|
1 | 1523 |
__ movl(rdx, result_high_word); |
1066 | 1524 |
__ mov(rcx, rax); |
1 | 1525 |
// What the heck is the point of the next instruction??? |
1526 |
__ xorl(rcx, 0x0); |
|
1527 |
__ movl(rsi, 0x80000000); |
|
1528 |
__ xorl(rsi, rdx); |
|
1529 |
__ orl(rcx, rsi); |
|
1530 |
__ jcc(Assembler::notEqual, do_return); |
|
1531 |
__ fldz(); |
|
1532 |
__ fcomp_d(value_low_word); |
|
1533 |
__ fnstsw_ax(); |
|
1066 | 1534 |
#ifdef _LP64 |
1535 |
__ testl(rax, 0x4100); // ZF & CF == 0 |
|
1536 |
__ jcc(Assembler::equal, return_min_jlong); |
|
1537 |
#else |
|
1 | 1538 |
__ sahf(); |
1539 |
__ jcc(Assembler::above, return_min_jlong); |
|
1066 | 1540 |
#endif // _LP64 |
1 | 1541 |
// return max_jlong |
1066 | 1542 |
#ifndef _LP64 |
1 | 1543 |
__ movl(rdx, 0x7fffffff); |
1544 |
__ movl(rax, 0xffffffff); |
|
1066 | 1545 |
#else |
1546 |
__ mov64(rax, CONST64(0x7fffffffffffffff)); |
|
1547 |
#endif // _LP64 |
|
1 | 1548 |
__ jmp(do_return); |
1549 |
||
1550 |
__ bind(return_min_jlong); |
|
1066 | 1551 |
#ifndef _LP64 |
1 | 1552 |
__ movl(rdx, 0x80000000); |
1553 |
__ xorl(rax, rax); |
|
1066 | 1554 |
#else |
1555 |
__ mov64(rax, CONST64(0x8000000000000000)); |
|
1556 |
#endif // _LP64 |
|
1 | 1557 |
__ jmp(do_return); |
1558 |
||
1559 |
__ bind(return0); |
|
1560 |
__ fpop(); |
|
1066 | 1561 |
#ifndef _LP64 |
1562 |
__ xorptr(rdx,rdx); |
|
1563 |
__ xorptr(rax,rax); |
|
1564 |
#else |
|
1565 |
__ xorptr(rax, rax); |
|
1566 |
#endif // _LP64 |
|
1 | 1567 |
|
1568 |
__ bind(do_return); |
|
1066 | 1569 |
__ addptr(rsp, 32); |
1570 |
LP64_ONLY(__ pop(rdx);) |
|
1571 |
__ pop(rcx); |
|
1572 |
__ pop(rsi); |
|
1 | 1573 |
__ ret(0); |
1574 |
} |
|
1575 |
break; |
|
1576 |
||
1374 | 1577 |
#ifndef SERIALGC |
1578 |
case g1_pre_barrier_slow_id: |
|
1579 |
{ |
|
1580 |
StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); |
|
1581 |
// arg0 : previous value of memory |
|
1582 |
||
1583 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
|
1584 |
if (bs->kind() != BarrierSet::G1SATBCTLogging) { |
|
1394 | 1585 |
__ movptr(rax, (int)id); |
1374 | 1586 |
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1587 |
__ should_not_reach_here(); |
|
1588 |
break; |
|
1589 |
} |
|
1394 | 1590 |
__ push(rax); |
1591 |
__ push(rdx); |
|
1374 | 1592 |
|
1593 |
const Register pre_val = rax; |
|
1394 | 1594 |
const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
1374 | 1595 |
const Register tmp = rdx; |
1596 |
||
1394 | 1597 |
NOT_LP64(__ get_thread(thread);) |
1374 | 1598 |
|
1599 |
Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
|
1600 |
PtrQueue::byte_offset_of_active())); |
|
1601 |
||
1602 |
Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
|
1603 |
PtrQueue::byte_offset_of_index())); |
|
1604 |
Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
|
1605 |
PtrQueue::byte_offset_of_buf())); |
|
1606 |
||
1607 |
||
1608 |
Label done; |
|
1609 |
Label runtime; |
|
1610 |
||
1611 |
// Can we store original value in the thread's buffer? |
|
1612 |
||
1394 | 1613 |
#ifdef _LP64 |
5695 | 1614 |
__ movslq(tmp, queue_index); |
1394 | 1615 |
__ cmpq(tmp, 0); |
1616 |
#else |
|
1374 | 1617 |
__ cmpl(queue_index, 0); |
1394 | 1618 |
#endif |
1374 | 1619 |
__ jcc(Assembler::equal, runtime); |
1394 | 1620 |
#ifdef _LP64 |
1621 |
__ subq(tmp, wordSize); |
|
1622 |
__ movl(queue_index, tmp); |
|
1623 |
__ addq(tmp, buffer); |
|
1624 |
#else |
|
1374 | 1625 |
__ subl(queue_index, wordSize); |
1626 |
__ movl(tmp, buffer); |
|
1627 |
__ addl(tmp, queue_index); |
|
1394 | 1628 |
#endif |
1629 |
||
1374 | 1630 |
// prev_val (rax) |
1631 |
f.load_argument(0, pre_val); |
|
1394 | 1632 |
__ movptr(Address(tmp, 0), pre_val); |
1374 | 1633 |
__ jmp(done); |
1634 |
||
1635 |
__ bind(runtime); |
|
5695 | 1636 |
__ push(rcx); |
1637 |
#ifdef _LP64 |
|
1638 |
__ push(r8); |
|
1639 |
__ push(r9); |
|
1640 |
__ push(r10); |
|
1641 |
__ push(r11); |
|
1642 |
# ifndef _WIN64 |
|
1643 |
__ push(rdi); |
|
1644 |
__ push(rsi); |
|
1645 |
# endif |
|
1646 |
#endif |
|
1374 | 1647 |
// load the pre-value |
1648 |
f.load_argument(0, rcx); |
|
1649 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); |
|
5695 | 1650 |
#ifdef _LP64 |
1651 |
# ifndef _WIN64 |
|
1652 |
__ pop(rsi); |
|
1653 |
__ pop(rdi); |
|
1654 |
# endif |
|
1655 |
__ pop(r11); |
|
1656 |
__ pop(r10); |
|
1657 |
__ pop(r9); |
|
1658 |
__ pop(r8); |
|
1659 |
#endif |
|
1394 | 1660 |
__ pop(rcx); |
5695 | 1661 |
__ bind(done); |
1374 | 1662 |
|
1394 | 1663 |
__ pop(rdx); |
1664 |
__ pop(rax); |
|
1374 | 1665 |
} |
1666 |
break; |
|
1667 |
||
1668 |
case g1_post_barrier_slow_id: |
|
1669 |
{ |
|
1670 |
StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); |
|
1671 |
||
1672 |
||
1673 |
// arg0: store_address |
|
1674 |
Address store_addr(rbp, 2*BytesPerWord); |
|
1675 |
||
1676 |
BarrierSet* bs = Universe::heap()->barrier_set(); |
|
1677 |
CardTableModRefBS* ct = (CardTableModRefBS*)bs; |
|
1678 |
Label done; |
|
1679 |
Label runtime; |
|
1680 |
||
1681 |
// At this point we know new_value is non-NULL and the new_value crosses regsion. |
|
1682 |
// Must check to see if card is already dirty |
|
1683 |
||
1394 | 1684 |
const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
1374 | 1685 |
|
1686 |
Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
|
1687 |
PtrQueue::byte_offset_of_index())); |
|
1688 |
Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
|
1689 |
PtrQueue::byte_offset_of_buf())); |
|
1690 |
||
1394 | 1691 |
__ push(rax); |
5695 | 1692 |
__ push(rcx); |
1374 | 1693 |
|
1394 | 1694 |
NOT_LP64(__ get_thread(thread);) |
1695 |
ExternalAddress cardtable((address)ct->byte_map_base); |
|
1374 | 1696 |
assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1697 |
||
5695 | 1698 |
const Register card_addr = rcx; |
1394 | 1699 |
#ifdef _LP64 |
1700 |
const Register tmp = rscratch1; |
|
1701 |
f.load_argument(0, card_addr); |
|
1702 |
__ shrq(card_addr, CardTableModRefBS::card_shift); |
|
1703 |
__ lea(tmp, cardtable); |
|
1704 |
// get the address of the card |
|
1705 |
__ addq(card_addr, tmp); |
|
1706 |
#else |
|
5695 | 1707 |
const Register card_index = rcx; |
1394 | 1708 |
f.load_argument(0, card_index); |
1709 |
__ shrl(card_index, CardTableModRefBS::card_shift); |
|
1710 |
||
1374 | 1711 |
Address index(noreg, card_index, Address::times_1); |
1712 |
__ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); |
|
1394 | 1713 |
#endif |
1714 |
||
1374 | 1715 |
__ cmpb(Address(card_addr, 0), 0); |
1716 |
__ jcc(Assembler::equal, done); |
|
1717 |
||
1718 |
// storing region crossing non-NULL, card is clean. |
|
1719 |
// dirty card and log. |
|
1720 |
||
1721 |
__ movb(Address(card_addr, 0), 0); |
|
1722 |
||
1723 |
__ cmpl(queue_index, 0); |
|
1724 |
__ jcc(Assembler::equal, runtime); |
|
1725 |
__ subl(queue_index, wordSize); |
|
1726 |
||
1727 |
const Register buffer_addr = rbx; |
|
1394 | 1728 |
__ push(rbx); |
1729 |
||
1730 |
__ movptr(buffer_addr, buffer); |
|
1374 | 1731 |
|
1394 | 1732 |
#ifdef _LP64 |
1733 |
__ movslq(rscratch1, queue_index); |
|
1734 |
__ addptr(buffer_addr, rscratch1); |
|
1735 |
#else |
|
1736 |
__ addptr(buffer_addr, queue_index); |
|
1737 |
#endif |
|
1738 |
__ movptr(Address(buffer_addr, 0), card_addr); |
|
1739 |
||
1740 |
__ pop(rbx); |
|
1374 | 1741 |
__ jmp(done); |
1742 |
||
1743 |
__ bind(runtime); |
|
5695 | 1744 |
__ push(rdx); |
1745 |
#ifdef _LP64 |
|
1746 |
__ push(r8); |
|
1747 |
__ push(r9); |
|
1748 |
__ push(r10); |
|
1749 |
__ push(r11); |
|
1750 |
# ifndef _WIN64 |
|
1751 |
__ push(rdi); |
|
1752 |
__ push(rsi); |
|
1753 |
# endif |
|
1754 |
#endif |
|
1374 | 1755 |
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
5695 | 1756 |
#ifdef _LP64 |
1757 |
# ifndef _WIN64 |
|
1758 |
__ pop(rsi); |
|
1759 |
__ pop(rdi); |
|
1760 |
# endif |
|
1761 |
__ pop(r11); |
|
1762 |
__ pop(r10); |
|
1763 |
__ pop(r9); |
|
1764 |
__ pop(r8); |
|
1765 |
#endif |
|
1766 |
__ pop(rdx); |
|
1767 |
__ bind(done); |
|
1374 | 1768 |
|
5695 | 1769 |
__ pop(rcx); |
1394 | 1770 |
__ pop(rax); |
1374 | 1771 |
|
1772 |
} |
|
1773 |
break; |
|
1774 |
#endif // !SERIALGC |
|
1775 |
||
1 | 1776 |
default: |
1777 |
{ StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); |
|
1066 | 1778 |
__ movptr(rax, (int)id); |
1 | 1779 |
__ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1780 |
__ should_not_reach_here(); |
|
1781 |
} |
|
1782 |
break; |
|
1783 |
} |
|
1784 |
return oop_maps; |
|
1785 |
} |
|
1786 |
||
1787 |
#undef __ |
|
6176
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1788 |
|
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1789 |
const char *Runtime1::pd_name_for_address(address entry) { |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1790 |
return "<unknown function>"; |
4d9030fe341f
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
5702
diff
changeset
|
1791 |
} |