hotspot/src/share/vm/c1/c1_Defs.hpp
author roland
Tue, 15 May 2012 10:10:23 +0200
changeset 12739 09f26b73ae66
parent 8921 14bfe81f2a9d
child 25715 d5a8dbdc5150
permissions -rw-r--r--
7133857: exp() and pow() should use the x87 ISA on x86 Summary: use x87 instructions to implement exp() and pow() in interpreter/c1/c2. Reviewed-by: kvn, never, twisti
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/*
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 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#ifndef SHARE_VM_C1_C1_DEFS_HPP
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#define SHARE_VM_C1_C1_DEFS_HPP
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#include "utilities/globalDefinitions.hpp"
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#ifdef TARGET_ARCH_x86
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# include "register_x86.hpp"
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#endif
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#ifdef TARGET_ARCH_sparc
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# include "register_sparc.hpp"
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#endif
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#ifdef TARGET_ARCH_zero
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# include "register_zero.hpp"
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#endif
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#ifdef TARGET_ARCH_arm
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# include "register_arm.hpp"
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#endif
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#ifdef TARGET_ARCH_ppc
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# include "register_ppc.hpp"
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#endif
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// set frame size and return address offset to these values in blobs
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// (if the compiled frame uses ebp as link pointer on IA; otherwise,
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// the frame size must be fixed)
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enum {
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  no_frame_size            = -1
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};
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#ifdef TARGET_ARCH_x86
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# include "c1_Defs_x86.hpp"
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#endif
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#ifdef TARGET_ARCH_sparc
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# include "c1_Defs_sparc.hpp"
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#endif
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#ifdef TARGET_ARCH_arm
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# include "c1_Defs_arm.hpp"
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#endif
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#ifdef TARGET_ARCH_ppc
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# include "c1_Defs_ppc.hpp"
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#endif
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// native word offsets from memory address
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enum {
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  lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
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  hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
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};
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// the processor may require explicit rounding operations to implement the strictFP mode
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enum {
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  strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
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};
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// for debug info: a float value in a register may be saved in double precision by runtime stubs
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enum {
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  float_saved_as_double = pd_float_saved_as_double
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};
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#endif // SHARE_VM_C1_C1_DEFS_HPP